From patchwork Thu Apr 27 12:33:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 13225447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D0D3C77B73 for ; Thu, 27 Apr 2023 12:33:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243444AbjD0Mdc (ORCPT ); Thu, 27 Apr 2023 08:33:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243371AbjD0Mdb (ORCPT ); Thu, 27 Apr 2023 08:33:31 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E3934EC8 for ; Thu, 27 Apr 2023 05:33:26 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-54faf2edb18so156668967b3.0 for ; Thu, 27 Apr 2023 05:33:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1682598805; x=1685190805; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=S6Q/VO/y6Fq41tZ4izLIBk5IF+y5iSwGGeoALfMszCI=; b=7SF3AaYcSGoW/ypNoGCNNc3chh/C711C/2zAVabYkzWAjXS5uyIHJjMv2VhpJCI9gE Ry4FjZgURKjz7Orp7MNpjEeG+C+Ud35NeSimsViU8ifp/RZjHbUQoHR2KqcOcI73D27C KIMkrFI0jgZiBCRYSEOaW7GJo+hme96imkeLIPRGUp+zzoG9rX9fqexYwtdXAne8cxIY E1Izj/Lk3eB8spEO5RpQr2XxNYls/ajcmzrfrQCxYOUnjVzOsNkXQl5IPHQMp67aon4J 2LojHEtH9Nkvr90LmeyKmUEzS6yaQ5RN4fuDox9tgy4P5j5DVnHnggAWctFk9STKNJQG 0m0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682598805; x=1685190805; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=S6Q/VO/y6Fq41tZ4izLIBk5IF+y5iSwGGeoALfMszCI=; b=QZn13DVXKVW/9qzMWeMdtf7uEokLbcqQ8ji9Zm3nzrB0kBn9tqdqWO+AtJNsRES5jB 8i0Ia8xQW3Ut4nFxSVn+/nmxjahw6kzodCrUU6WFr212j/PKzNqoSwm/YrPOpYHoAtrl PsujyjsTpIK3i7UmHchnPkEFvdxIMYd1kp/hQgBb5e/VX9eMnL8ThHM9B7JdwH6XvPWW Gu0EtBen0CYgpp4RSuhtwzIcYfOpLnSHhlDn/8NAC2m7mFNj4P3vdI/SPQActxapXpbh pL9D1WKeJUMUcA/cRsj4IQnHmFC57X9vbbziivdMaDeJzQTjok4u0r0k1aEHiNHW1YGY Eveg== X-Gm-Message-State: AC+VfDxuTobkKPUz2TG6Q0nheqaQ0wBgvHjzB4hwiZn5tLJb0dPQlkp5 ctsYCjO97jagzY/CoTbHoof3ng9aXquozw== X-Google-Smtp-Source: ACHHUZ59yN8E5dtSO5tzVDd5U2bsSoxWIN/Ukfp5B6oPJ3ymIlU4hZ+d1CGo5MLyBoRd1KMhlhK6Ee3naK8Mcg== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a05:690c:725:b0:54f:bb71:c7b3 with SMTP id bt5-20020a05690c072500b0054fbb71c7b3mr997276ywb.9.1682598805726; Thu, 27 Apr 2023 05:33:25 -0700 (PDT) Date: Thu, 27 Apr 2023 12:33:10 +0000 In-Reply-To: <20230427123314.1997152-1-joychakr@google.com> Mime-Version: 1.0 References: <20230427123314.1997152-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230427123314.1997152-2-joychakr@google.com> Subject: [PATCH v9 1/5] spi: dw: Add 32 bpw support to SPI DW DMA driver From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add Support for AxSize = 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Hence, for bits per word values between 17 and 32 n_bytes should be equal to 4. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index ababb910b391..c1b42cb59965 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -208,12 +208,16 @@ static bool dw_spi_can_dma(struct spi_controller *master, static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { - if (n_bytes == 1) + switch (n_bytes) { + case 1: return DMA_SLAVE_BUSWIDTH_1_BYTE; - else if (n_bytes == 2) + case 2: return DMA_SLAVE_BUSWIDTH_2_BYTES; - - return DMA_SLAVE_BUSWIDTH_UNDEFINED; + case 4: + return DMA_SLAVE_BUSWIDTH_4_BYTES; + default: + return DMA_SLAVE_BUSWIDTH_UNDEFINED; + } } static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) From patchwork Thu Apr 27 12:33:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 13225448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1ECE2C77B61 for ; Thu, 27 Apr 2023 12:33:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243767AbjD0Mdj (ORCPT ); Thu, 27 Apr 2023 08:33:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243643AbjD0Mdg (ORCPT ); Thu, 27 Apr 2023 08:33:36 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 319F64EC3 for ; Thu, 27 Apr 2023 05:33:31 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b9a7550dca3so1113050276.0 for ; Thu, 27 Apr 2023 05:33:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1682598810; x=1685190810; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=Adm4j45gizFfC/DwqDNV4am9AZ8vYB5z8Xwbghf5BGo=; b=zsszPebuf3cwDmVN7gVllalvKOsKsT+K5wl7znryh8N/HuMkkoSIt3lbU+p0W3aYVh SSSaO27ReLEqOCzG3BSuuDNm2DML74Zfb99YQZlQWs65vMnUHWeMpPKTpa65fLps3gi2 vSlUH4rS8Pu+gwunef7GF7styB0VyU+lahLQDrrM1XEL1K1PH+DfH0h555dj0y86CX4S lKaRbe6XIL1XAsx1lcGj5DnQdzwgD/3Qx6kdhWH5H24GnIS9WomZLqartGvw6G98OBZf 1P06hkAeYdfaQtcpR4dTlCKGVVZ+Bs7kqxOzix3okyVRG7k5QpKflpKuUzNRhgNZeD0I XdeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682598810; x=1685190810; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Adm4j45gizFfC/DwqDNV4am9AZ8vYB5z8Xwbghf5BGo=; b=H3AqPOnZ7tM6agfhSHWIFZpIGUmyjv64LxF2fBJv780BIGsRblRUg8KRRi2XZKH7c3 cfRW7DPjn1pHGVDNK389kSWC3faT4QfkdpiLvxhzY2w+9hB9BNK8sTBlVvfdgXKWRS6G 9iDZiRP535dWmZK4w3W5/o8RbuwPF2qVTC+AwtAFNjGS7jP+BhW7HbZXDYhYT4fcyv/8 c4aFcZ45A95NuNcdCEFjSHmFQmZGaLR9Yw1TQlsa7DoPMZ/nQ8lIg2v7QbOqmokY+uXN zYHEz1t/GEzlZu8/VFWArOBPA2YF4YFS9fkneOJdDdlqEcYgYDvw1MWgzeIMIXG3yTsg Vg0g== X-Gm-Message-State: AC+VfDzyol0uGAGLtU7S23uWH6PagNhZ+NH5vPgYRmqt99piCUweZKA5 L1mNea2GKkDxTU3AGKsU8dIzSefwZ1y67w== X-Google-Smtp-Source: ACHHUZ7M04scCze/HzlYDa0ELaHPi0YkisN5CNwzyTjHI34vXKspkNUPI/gWhSH8mErgeQAKSzNyVnx+go8Fyw== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a25:c041:0:b0:b96:5b8a:3c34 with SMTP id c62-20020a25c041000000b00b965b8a3c34mr441564ybf.11.1682598810419; Thu, 27 Apr 2023 05:33:30 -0700 (PDT) Date: Thu, 27 Apr 2023 12:33:11 +0000 In-Reply-To: <20230427123314.1997152-1-joychakr@google.com> Mime-Version: 1.0 References: <20230427123314.1997152-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230427123314.1997152-3-joychakr@google.com> Subject: [PATCH v9 2/5] spi: dw: Move dw_spi_can_dma() From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Move dw_spi_can_dma() implementation below dw_spi_dma_convert_width() for handing compile dependency in future patches. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index c1b42cb59965..f19c092920a1 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -198,14 +198,6 @@ static irqreturn_t dw_spi_dma_transfer_handler(struct dw_spi *dws) return IRQ_HANDLED; } -static bool dw_spi_can_dma(struct spi_controller *master, - struct spi_device *spi, struct spi_transfer *xfer) -{ - struct dw_spi *dws = spi_controller_get_devdata(master); - - return xfer->len > dws->fifo_len; -} - static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { switch (n_bytes) { @@ -220,6 +212,14 @@ static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) } } +static bool dw_spi_can_dma(struct spi_controller *master, + struct spi_device *spi, struct spi_transfer *xfer) +{ + struct dw_spi *dws = spi_controller_get_devdata(master); + + return xfer->len > dws->fifo_len; +} + static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) { unsigned long long ms; From patchwork Thu Apr 27 12:33:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 13225449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FD7EC77B73 for ; Thu, 27 Apr 2023 12:33:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243781AbjD0Mdr (ORCPT ); Thu, 27 Apr 2023 08:33:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243792AbjD0Mdo (ORCPT ); Thu, 27 Apr 2023 08:33:44 -0400 Received: from mail-yb1-xb49.google.com (mail-yb1-xb49.google.com [IPv6:2607:f8b0:4864:20::b49]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04BCA4EDC for ; Thu, 27 Apr 2023 05:33:35 -0700 (PDT) Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-b9a6f15287eso4353672276.1 for ; Thu, 27 Apr 2023 05:33:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1682598815; x=1685190815; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=o8GsQCBaZJI/kD+802nQ+4grvsSl0JkV2Q+XulPct0A=; b=CIwS7rv0Bt1NRSpeLAH2zHX1mFDLuSSyyWHxoyQnbpJ6drNZh7T5je0G8bmM11LmtV sL2mbhnvGL7nmxnTE6+xDc4VfwbDWu/5t1acHTsWuPeOvHsVRykoUE6+pvz8q6BaKzym td3aouq+E4LHEGNotLcWdg+FDtThdDALNOnC8q5SnosK4pGYp5t0MGHPgfknsNEIVqSE EtAEPpGLrbirluU/9g7gyc2fpsW0t48xDoA4+qCWWt0zzax/0JchhEaVOcaFUPYF2FT4 D/GdvuTD+e422rsRMt+nW8BTLCXrybYZ1nCdgL6dzfzTMh+57+xMBcbVtNNg46RCkZX2 +lWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682598815; x=1685190815; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=o8GsQCBaZJI/kD+802nQ+4grvsSl0JkV2Q+XulPct0A=; b=TvaQDT89TgD4SFCvXFGMDr6PGptle6FsVfMbg361hK8bwNQ5Exi+hu3KrqD4De8gBb OhfvDYKgi5X+PJqOSOBnL5CdLbChj5aUYwYM4Qz1V6mqww1Cr97yEy3pma7pFyf8x/lH SXoaSKuL7+bc+jpQL8hSJO8sS7Pglv7e08MqNMjbLTtzfXG+qv4aF3IVOi6ADtkyRIes Ebl4FbZc3PzNbQLZvFr73Z8+/RtTu3fiZtMbqWt4jvnpj027FLMsiTBVfeTRzyg+r1tF ymvA4CQcP1yirJV8CAODiGwSPhfT4h9blTRMbyfKQrurZ/hUaqCWciTUp05Hu8QruCxV f3bQ== X-Gm-Message-State: AC+VfDwoN2DAiBzXx35K0OfA4EiP/y6hvXL7BGWyY94jiQm3oD8T3DHS rhY2FHXq/YXe37o+sAv4b7nSWh0SAAT4yw== X-Google-Smtp-Source: ACHHUZ7dGt3m0BH4d6R7Es7xe/L3JTq8vbJ+EbpYa0o9nvD4cehchfM9KGMPtjXE8smT3s/sOphJXPEOZ3PWWw== X-Received: from joychakr.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:6ea]) (user=joychakr job=sendgmr) by 2002:a5b:ac5:0:b0:b8f:5b11:6d6c with SMTP id a5-20020a5b0ac5000000b00b8f5b116d6cmr3736264ybr.1.1682598815226; Thu, 27 Apr 2023 05:33:35 -0700 (PDT) Date: Thu, 27 Apr 2023 12:33:12 +0000 In-Reply-To: <20230427123314.1997152-1-joychakr@google.com> Mime-Version: 1.0 References: <20230427123314.1997152-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230427123314.1997152-4-joychakr@google.com> Subject: [PATCH v9 3/5] spi: dw: Add DMA directional capability check From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Check capabilities of DMA controller during init to make sure it is capable of handling MEM2DEV for tx channel, DEV2MEM for rx channel. Current DW DMA driver requires both tx and rx channel to be configured and functional for any kind of transfers to take effect including half duplex. Hence, check for both tx and rx direction and fail on unavailbility of either. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index f19c092920a1..22d0727a3789 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -72,12 +72,22 @@ static void dw_spi_dma_maxburst_init(struct dw_spi *dws) dw_writel(dws, DW_SPI_DMATDLR, dws->txburst); } -static void dw_spi_dma_sg_burst_init(struct dw_spi *dws) +static int dw_spi_dma_caps_init(struct dw_spi *dws) { - struct dma_slave_caps tx = {0}, rx = {0}; + struct dma_slave_caps tx, rx; + int ret; + + ret = dma_get_slave_caps(dws->txchan, &tx); + if (ret) + return ret; + + ret = dma_get_slave_caps(dws->rxchan, &rx); + if (ret) + return ret; - dma_get_slave_caps(dws->txchan, &tx); - dma_get_slave_caps(dws->rxchan, &rx); + if (!(tx.directions & BIT(DMA_MEM_TO_DEV) && + rx.directions & BIT(DMA_DEV_TO_MEM))) + return -ENXIO; if (tx.max_sg_burst > 0 && rx.max_sg_burst > 0) dws->dma_sg_burst = min(tx.max_sg_burst, rx.max_sg_burst); @@ -95,6 +105,7 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) struct dw_dma_slave dma_rx = { .src_id = 0 }, *rx = &dma_rx; struct pci_dev *dma_dev; dma_cap_mask_t mask; + int ret = -EBUSY; /* * Get pci device for DMA controller, currently it could only @@ -124,20 +135,25 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) init_completion(&dws->dma_completion); - dw_spi_dma_maxburst_init(dws); + ret = dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); pci_dev_put(dma_dev); return 0; +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan = NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan = NULL; err_exit: pci_dev_put(dma_dev); - return -EBUSY; + return ret; } static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) @@ -163,12 +179,17 @@ static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) init_completion(&dws->dma_completion); - dw_spi_dma_maxburst_init(dws); + ret = dw_spi_dma_caps_init(dws); + if (ret) + goto free_txchan; - dw_spi_dma_sg_burst_init(dws); + dw_spi_dma_maxburst_init(dws); return 0; +free_txchan: + dma_release_channel(dws->txchan); + dws->txchan = NULL; free_rxchan: dma_release_channel(dws->rxchan); dws->rxchan = NULL; From patchwork Thu Apr 27 12:33:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 13225450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CF58C77B61 for ; Thu, 27 Apr 2023 12:33:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243721AbjD0Mdu (ORCPT ); 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Thu, 27 Apr 2023 05:33:39 -0700 (PDT) Date: Thu, 27 Apr 2023 12:33:13 +0000 In-Reply-To: <20230427123314.1997152-1-joychakr@google.com> Mime-Version: 1.0 References: <20230427123314.1997152-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230427123314.1997152-5-joychakr@google.com> Subject: [PATCH v9 4/5] spi: dw: Add DMA address widths capability check From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Store address width capabilities of DMA controller during init and check the same per transfer to make sure the bits/word requirement can be met. Current DW DMA driver requires both tx and rx channel to be configured and functional hence a subset of both tx and rx channel address width capability is checked with the width requirement(n_bytes) for a transfer. Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-dma.c | 17 ++++++++++++++++- drivers/spi/spi-dw.h | 1 + 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index 22d0727a3789..df819652901a 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -97,6 +97,15 @@ static int dw_spi_dma_caps_init(struct dw_spi *dws) dws->dma_sg_burst = rx.max_sg_burst; else dws->dma_sg_burst = 0; + + /* + * Assuming both channels belong to the same DMA controller hence the + * peripheral side address width capabilities most likely would be + * the same. + */ + dws->dma_addr_widths = tx.dst_addr_widths & rx.src_addr_widths; + + return 0; } static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) @@ -237,8 +246,14 @@ static bool dw_spi_can_dma(struct spi_controller *master, struct spi_device *spi, struct spi_transfer *xfer) { struct dw_spi *dws = spi_controller_get_devdata(master); + enum dma_slave_buswidth dma_bus_width; + + if (xfer->len <= dws->fifo_len) + return false; + + dma_bus_width = dw_spi_dma_convert_width(dws->n_bytes); - return xfer->len > dws->fifo_len; + return dws->dma_addr_widths & BIT(dma_bus_width); } static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 9e8eb2b52d5c..3962e6dcf880 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -190,6 +190,7 @@ struct dw_spi { struct dma_chan *rxchan; u32 rxburst; u32 dma_sg_burst; + u32 dma_addr_widths; unsigned long dma_chan_busy; dma_addr_t dma_addr; /* phy address of the Data register */ const struct dw_spi_dma_ops *dma_ops; From patchwork Thu Apr 27 12:33:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joy Chakraborty X-Patchwork-Id: 13225451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88653C77B73 for ; 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Thu, 27 Apr 2023 05:33:44 -0700 (PDT) Date: Thu, 27 Apr 2023 12:33:14 +0000 In-Reply-To: <20230427123314.1997152-1-joychakr@google.com> Mime-Version: 1.0 References: <20230427123314.1997152-1-joychakr@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230427123314.1997152-6-joychakr@google.com> Subject: [PATCH v9 5/5] spi: dw: Round of n_bytes to power of 2 From: Joy Chakraborty To: Serge Semin , Mark Brown , Andy Shevchenko Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, manugautam@google.com, rohitner@google.com, Joy Chakraborty Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org n_bytes variable in the driver represents the number of bytes per word that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 bits from the client but in memory they are a power of 2, same is mentioned in spi.h header: " * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. " Hence, round of n_bytes to a power of 2 to avoid values like 3 which would generate unalligned/odd accesses to memory/fifo. Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") Suggested-by: Andy Shevchenko Signed-off-by: Joy Chakraborty Reviewed-by: Serge Semin Tested-by: Serge Semin * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. --- drivers/spi/spi-dw-core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index c3bfb6c84cab..4976e3b8923e 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -426,7 +426,10 @@ static int dw_spi_transfer_one(struct spi_controller *master, int ret; dws->dma_mapped = 0; - dws->n_bytes = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE); + dws->n_bytes = + roundup_pow_of_two(DIV_ROUND_UP(transfer->bits_per_word, + BITS_PER_BYTE)); + dws->tx = (void *)transfer->tx_buf; dws->tx_len = transfer->len / dws->n_bytes; dws->rx = transfer->rx_buf;