From patchwork Thu Apr 27 20:45:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 13225751 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDDCAC7EE21 for ; Thu, 27 Apr 2023 20:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0ZdKzlIPPLdCuhUSl0XPmEn/BpANSPTS/wLOiMCg4iA=; b=vI5pENdk62kt5x VAnGckiFR8WmDljNO+be9MnuXyP/8Yyk6SgPdNsjV+t0YG4GJ2iWj6cVNr9FTB7JC/wP45VmNDqAB v3RUdkQj16P+VLCp2fXXYIiSRsgIHVdb1XTzLYlN9hQM/t3zaEiEgBmjCtfRH1nCHMZJvophJ3Qgb 1Pd+Gt38U+xmvUieLs6bg6GQWBBg3+MZMbjmru7DQDHkxZepBttno7YyLrj3JMWba7lb2QOaBQ5Y6 ky49IkhgkDN0AjApVFYhxaA1gWcKZsakNtaswXwTD/LugnyqrQ7cqU6xqTfyOPR8UHW5xfdOlu0gj QNMlGJDySt6xSRnPhByw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ps8V3-007UPS-2m; Thu, 27 Apr 2023 20:45:57 +0000 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ps8Uv-007ULT-2n for linux-arm-kernel@lists.infradead.org; Thu, 27 Apr 2023 20:45:51 +0000 Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-959a3e2dd27so1077478166b.3 for ; Thu, 27 Apr 2023 13:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1682628346; x=1685220346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Hf8K+LPV3HpQoodPsHclIndfavzTHfh5H+b7Pu9+qX0=; b=lYQb9N0DXJFaYlcVpdVJTsWypegS4pxbOgWG4uYPWRv0tlbBFBKpgdjjuIJ7l89OKn MjxoNkkecvtACZfe3IMOjhngU6dFPvHM6Jb0dKqxdqG2fY33lE5vlStJ4DhOLLou9+Oc EFPe8U5O53BQC+dflc06JM2/KRewWS9Fgm8wY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682628346; x=1685220346; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Hf8K+LPV3HpQoodPsHclIndfavzTHfh5H+b7Pu9+qX0=; b=Ed0HZEy4+8ADvtw7bGDmEHbb6XziRmup+2vHLJszmzPLqDI21mxwEQKaijYtX8VOU0 mBqE34Uu6SCb6s4TA2XOLVFCvtg6P2O+hl21u8WylRYdbGYJyVwi4BEUt5xMh+BpUrBi ImagDClRWVu5tom1IhHijy06KY4vsNc8PHgx6KIyA/xt3Y/8YhOma9W7bI1Y0TBMPC8q 7WkWZdEuIZyoihuqgGAfoUPj+kZp/1+/flpQOaohWE446ZENovVxXOOs1G4pPyGj+wuY +BqUtmQew2LVquu0oNB1vugrTQVL9UcIqXebVeQysIOq4L7LmFncEwInhg4ni5HgrR44 mgrA== X-Gm-Message-State: AC+VfDxvdGgBzPyHyNYv5Mh7yi5mXi1q3GdXdaHLQTmIPwGYLeajfdUr 8rMEfjABcWUGKV481u3ehUURNA== X-Google-Smtp-Source: ACHHUZ7f+2fEQbl7Qy1ajgnJooRSCuUwsjTRMFmMCuy0tPNeKm5PO7GL8KTfujgsTrfBLu+ShkBDpA== X-Received: by 2002:a17:906:9b86:b0:957:758e:df57 with SMTP id dd6-20020a1709069b8600b00957758edf57mr3360655ejc.65.1682628346138; Thu, 27 Apr 2023 13:45:46 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-87-5-99-194.retail.telecomitalia.it. [87.5.99.194]) by smtp.gmail.com with ESMTPSA id s12-20020a170906bc4c00b00947ed087a2csm10171360ejv.154.2023.04.27.13.45.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 13:45:45 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Alexandre Torgue , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Marc Kleine-Budde , Maxime Coquelin , Paolo Abeni , Rob Herring , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [PATCH v2 1/5] dt-bindings: net: can: add "st,can-secondary" property Date: Thu, 27 Apr 2023 22:45:36 +0200 Message-Id: <20230427204540.3126234-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> References: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_134549_908470_36BA5D63 X-CRM114-Status: GOOD ( 12.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On the stm32f7 Socs the can peripheral can be in single or dual configuration. In the dual configuration, in turn, it can be in primary or secondary mode. The addition of the 'st,can-secondary' property allows you to specify this mode in the dual configuration. CAN peripheral nodes in single configuration contain neither "st,can-primary" nor "st,can-secondary". Signed-off-by: Dario Binacchi Reviewed-by: Rob Herring --- (no changes since v1) .../bindings/net/can/st,stm32-bxcan.yaml | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml index 769fa5c27b76..de1d4298893b 100644 --- a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -21,11 +21,22 @@ properties: st,can-primary: description: - Primary and secondary mode of the bxCAN peripheral is only relevant - if the chip has two CAN peripherals. In that case they share some - of the required logic. + Primary mode of the bxCAN peripheral is only relevant if the chip has + two CAN peripherals in dual CAN configuration. In that case they share + some of the required logic. + Not to be used if the peripheral is in single CAN configuration. To avoid misunderstandings, it should be noted that ST documentation - uses the terms master/slave instead of primary/secondary. + uses the terms master instead of primary. + type: boolean + + st,can-secondary: + description: + Secondary mode of the bxCAN peripheral is only relevant if the chip + has two CAN peripherals in dual CAN configuration. In that case they + share some of the required logic. + Not to be used if the peripheral is in single CAN configuration. + To avoid misunderstandings, it should be noted that ST documentation + uses the terms slave instead of secondary. type: boolean reg: From patchwork Thu Apr 27 20:45:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 13225750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5DCF9C77B73 for ; Thu, 27 Apr 2023 20:46:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DBVKxgurOR9X9dAkAjo6OSFgqi14+4U2i7kKXoHiPr4=; b=QJmmLElhayat9k 9BfTSEpgPCm2LXztt6BY4cfRY7T/7ksT8kU5yn0dYWlbxEFkrCPmmvB6wlpFxUxkRN+GEXGaQfAw0 Fa/PYDM7KsbVm9qgAs4EHINCAh8m/yShg/DAr4kbSh1MEozXCdReHFCiXGc1YkreI2kQ1BHvbF1hg dN11MvN3jQ2Mu6axw3fmiOlbsJn7fP+4yqc3lu6Pupg1YqUJD2hzOIFO6apO5mZA44SeO8yu6oGuC x95jOGNmyRstKB6HEuPqsp10trJ/jV8t0g3pdH0hsNJZ0XxmqXJMQ83bl4RDOG7E2YgBFVgumQY7n 5GrT6/OC/kTGQ2giityw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ps8V4-007UPu-2z; Thu, 27 Apr 2023 20:45:58 +0000 Received: from mail-ed1-x530.google.com ([2a00:1450:4864:20::530]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ps8Ux-007ULt-1T for linux-arm-kernel@lists.infradead.org; Thu, 27 Apr 2023 20:45:52 +0000 Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-505035e3368so15639816a12.0 for ; Thu, 27 Apr 2023 13:45:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1682628348; x=1685220348; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v2A7EdpRRw4uhUr29cHp9TanChHdCrYmggTLXrFrhPk=; b=hIxfVLSq+nmegxqmVyJw4MiJ83Xqb06fTI1IBsWQL4pGWYAnJTdpzju1aNI+zZuuwD xX5hlc5OhhvXhAJ28lcUTKhZpgp1fGOlxaPd7NsrEqXBWSv7t71UqARcnrEmMUdvbMrX ht0H7epNLh2eseqd5EQA6gI8DPVQZq+ED5daQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682628348; x=1685220348; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v2A7EdpRRw4uhUr29cHp9TanChHdCrYmggTLXrFrhPk=; b=Qxc0EEjOQJfKicPgQkAZ/slHLzFCwQaI0ql5Bh0x+9ZzsLfJds0Zy5WdF5tMedP9NI z1dS3Vbe6O0vBqx/tdqJu7+A9AvrPJa8WFNbeg/ob2GL9sDjTnRZx1cDrgAsxeFChLOQ sGOuokGqZSv58EhgW8n+/vzayggvXcS4GSCmMoUVXkyLj0MjI+rM8GHBSKZoUgN/nn9D dhC0Hidv2uhzM5J/d8UOsvqS8eA2trVdYTQnddflhuPn6pY9kb3juMixFRem81ml9AEQ wELEdkDdFQMtgVhu++QlEToDUvIeZFN+aJVSEs9iob1KtiSmMVbkIVwHAxuj87XAvamS t6cw== X-Gm-Message-State: AC+VfDzHSxLKKUc18rkA89VdLYqV6jpk6Kik8a+Dl934Yon9ZEYTR6mp 0MdPmMx3newHWRCKl8HBtAq/DA== X-Google-Smtp-Source: ACHHUZ5pkrfEo97jWwEggqo9NSV1NaQsI4JAPpU1paNohPHEtxduAxt0kbk7S9GKgqHPZwm14QdW9g== X-Received: by 2002:a17:907:9807:b0:94f:24d7:64d4 with SMTP id ji7-20020a170907980700b0094f24d764d4mr3007723ejc.37.1682628347769; Thu, 27 Apr 2023 13:45:47 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-87-5-99-194.retail.telecomitalia.it. [87.5.99.194]) by smtp.gmail.com with ESMTPSA id s12-20020a170906bc4c00b00947ed087a2csm10171360ejv.154.2023.04.27.13.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 13:45:47 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Alexandre Torgue , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 2/5] ARM: dts: stm32f429: put can2 in secondary mode Date: Thu, 27 Apr 2023 22:45:37 +0200 Message-Id: <20230427204540.3126234-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> References: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_134551_490296_CE34BD0A X-CRM114-Status: UNSURE ( 9.77 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a preparation patch for the upcoming support to manage CAN peripherals in single configuration. The addition ensures backwards compatibility. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f429.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c9e05e3540d6..00bf53f99c29 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -387,6 +387,7 @@ can2: can@40006800 { interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN2)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,can-secondary; st,gcan = <&gcan>; status = "disabled"; }; From patchwork Thu Apr 27 20:45:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 13225752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D47C0C77B7E for ; Thu, 27 Apr 2023 20:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=22N9XRmqkOh+4pQk0gMubbtLoPeW0IgK1+aVLTqSem4=; b=QGJ7KSU6cc/kyU 7jF6mQ4/Bi6yDqiIOLmvZ/Vh3c21sROR2MRwKseu492q6cX7HZwBPEjkx/wbesCQ1zX2MzMvRmcLh lZDLcjAGEVINzwupA8kXDBQGBXIjiPLqpx5octPylVUoWZfi290xvg9PwXVHXn9eBjM6s0kNpA2dR x3d2gTf3P/s8zdc4uo96NEJwujHuv5iPvZwtmO3RwgRAUIh0HzKbx+JQcnMrIMbzJYA0yw3v5Sc50 gRYj+iO3A6gLSbc2t8cuq+vSEb/k6kerIXOfpe3tdpP4PnKcr1KgPz1Spkic/NbvWqF0tChNAwkaf zS0Xj9UMZOK9M4u0S2xw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ps8V6-007UQH-01; Thu, 27 Apr 2023 20:46:00 +0000 Received: from mail-ej1-x633.google.com ([2a00:1450:4864:20::633]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ps8Uz-007UMm-1X for linux-arm-kernel@lists.infradead.org; Thu, 27 Apr 2023 20:45:54 +0000 Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-959a626b622so896759266b.0 for ; Thu, 27 Apr 2023 13:45:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1682628350; x=1685220350; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8zgyM9/Qsb7y0LcnLSlDess36RbYnrfbiOfx4wd1SRU=; b=C0kEWeMPUx9aQmFafDeK++7KxvR/FRLnqASxZ467WKjEKHO4kRSWw8X66kfedTFAZV k4bgWFabp/4gWrqn5uyRPdUTMUct44VJOkbw1eGKd/h5Y2DwEUi20UwtyMTHTRKtOzQ/ uDyeKQzPP2dYzVUk6300KOiLOBWtp47JlVaZA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682628350; x=1685220350; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8zgyM9/Qsb7y0LcnLSlDess36RbYnrfbiOfx4wd1SRU=; b=etYsvGMeQhxjWH+7KoXq0KL4cnFxy2rca6L0fsiNBHppdKShNj0fXDnyXKV3WC5hQk rUYOw4TnigxtflOJvVA5oJhlZJ0L5t6Bho9AJnCgIDSCBvg3VjtreJ2MQWdUrVbgD/WB Czd0/uCIC47dHLABAXu92Fri3Ij7J3ktVVoBouF5vshqw/SlWUdFt+GJ/mcIR3cpF70C OprndmvZdJWM5obBIcbbJrbkTfEROAc0NsWkLfEvtDAFM/MoEu9f/XVQid+RCoWe8je/ 1USWjfVPhn4Dpl5qGbOeWYErhc6Ba0/YKZ7LHB1Ih1Jz3pJI7ti25Yft9WPRX3VYapgx 1GpQ== X-Gm-Message-State: AC+VfDwh3DIia6ULFVs668Pf2c1WseiO8dcXwsK3p9Y8mg9sQlKsZRiw d6zBcuc+HDIpP838THQ2E68zCA== X-Google-Smtp-Source: ACHHUZ7xp3LajXmJwIzUw4bO+6Ie+hY8CRiA9yNimoCacSraqyoqOfQE8akxqqf8UroKvyN6TWHbXQ== X-Received: by 2002:a17:907:3e1a:b0:94f:1a11:e07d with SMTP id hp26-20020a1709073e1a00b0094f1a11e07dmr3458979ejc.32.1682628349735; Thu, 27 Apr 2023 13:45:49 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-87-5-99-194.retail.telecomitalia.it. [87.5.99.194]) by smtp.gmail.com with ESMTPSA id s12-20020a170906bc4c00b00947ed087a2csm10171360ejv.154.2023.04.27.13.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 13:45:49 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Alexandre Torgue , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 3/5] ARM: dts: stm32: add pin map for CAN controller on stm32f7 Date: Thu, 27 Apr 2023 22:45:38 +0200 Message-Id: <20230427204540.3126234-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> References: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_134553_510085_A01DB1DB X-CRM114-Status: GOOD ( 10.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add pin configurations for using CAN controller on stm32f7. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 ++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi index c8e6c52fb248..9f65403295ca 100644 --- a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi @@ -283,6 +283,88 @@ pins2 { slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_b: can1-1 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_c: can1-2 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can1_pins_d: can1-3 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can3_pins_a: can3-0 { + pins1 { + pinmux = ; /* CAN3_TX */ + }; + pins2 { + pinmux = ; /* CAN3_RX */ + bias-pull-up; + }; + }; + + can3_pins_b: can3-1 { + pins1 { + pinmux = ; /* CAN3_TX */ + }; + pins2 { + pinmux = ; /* CAN3_RX */ + bias-pull-up; + }; + }; }; }; }; From patchwork Thu Apr 27 20:45:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 13225753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CAE7C77B73 for ; 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[87.5.99.194]) by smtp.gmail.com with ESMTPSA id s12-20020a170906bc4c00b00947ed087a2csm10171360ejv.154.2023.04.27.13.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 13:45:53 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Alexandre Torgue , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 5/5] ARM: dts: stm32: add CAN support on stm32f746 Date: Thu, 27 Apr 2023 22:45:40 +0200 Message-Id: <20230427204540.3126234-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> References: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_134556_455961_B5030ABE X-CRM114-Status: GOOD ( 14.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration: - Dual CAN peripheral configuration: * CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory. * CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1. - Single CAN peripheral configuration: * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory. ------------------------------------------------------------------------- | features | CAN1 | CAN2 | CAN 3 | ------------------------------------------------------------------------- | SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte | ------------------------------------------------------------------------- | Filters | 26 filters shared between CAN1 & CAN2 | 14 filters | ------------------------------------------------------------------------- Signed-off-by: Dario Binacchi --- Changes in v2: - Move after the patch "can: bxcan: add support for single peripheral configuration". - Add node gcan3. - Rename gcan as gcan1. - Add property "st,can-secondary" to can2 node. - Drop patch "dt-bindings: mfd: stm32f7: add binding definition for CAN3" because it has been accepted. - Add patch "ARM: dts: stm32f429: put can2 in secondary mode". - Add patch "dt-bindings: net: can: add "st,can-secondary" property". arch/arm/boot/dts/stm32f746.dtsi | 47 ++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index dc868e6da40e..973698bc9ef4 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -257,6 +257,23 @@ rtc: rtc@40002800 { status = "disabled"; }; + can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x200>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + st,gcan = <&gcan3>; + status = "disabled"; + }; + + gcan3: gcan@40003600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40003600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -337,6 +354,36 @@ i2c4: i2c@40006000 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + + gcan1: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; + st,can-secondary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>;