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Tue, 2 May 2023 16:08:42 +0000 Date: Wed, 3 May 2023 00:08:31 +0800 From: Changcheng Liu To: leon@kernel.org, saeedm@nvidia.com Cc: linux-rdma@vger.kernel.org, changchengx.liu@outlook.com Subject: [PATCH] mlx5: correct reserved space offset display Message-ID: Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-TMN: [y0afCF4AMY6+zDbWiNcnhddCk6k4KJ6G] X-ClientProxiedBy: FR0P281CA0154.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:b3::11) To OS3P286MB1640.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:161::10) X-Microsoft-Original-Message-ID: <20230502160618.GA49793@gen-mtvr-09.mtvr.labs.mlnx> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS3P286MB1640:EE_|OS3P286MB2294:EE_ X-MS-Office365-Filtering-Correlation-Id: 0531403d-1d03-484f-47e8-08db4b277f9b X-MS-Exchange-SLBlob-MailProps: AZnQBsB9Xmq8x+SGOkCzgiPw6QkSRilgDaoa/EDS8B6pz0hMTkhKYMCmQBefGVA9gzufn+2EDcyctswM+FJugsPOuii8qeKV5/46CAWoQJ+2f9ZvJeNVQLyiPdgozZMJ4hN/SmVKRvALxzajk3Y34DCmMHtlNzzxJPo+ezkOKXtm2dj9sli1gtncp7GKvtOCPbSEo6+yo/3bSnEKhETcCMxFqY8B6Pnkg9hDSY6IsmsX5k7+R9wTgN1F5KtLuzDKwEX7WzOfcC+cVO7L53tTtkmF+e9MoMmnUNpIx0FLnK4ivQX5zcddCLHlxchSIc9kSn2r6YsNn6ew1V7miOvROKxhU+Ox4ZXwulmYp13JxWzVFqhnTg/mO/aepfVxFxb2HYicoBrp+h3qTkCiTX1/ddM9apOt/2KeklpUU2bmBx0NJRr+oQxsRlE5T2qxx+bPMORUEvWXMwsDxgTQ2x99loEr6UU6xbDCkm/d+ynVr7gIioneAxl5HyF7qrMxsuqkqEd3oUdYiD4hDm6zzNEc7ngt34IPok5lq1xdhw38URrDumLC/ZTQvCdVkHIe+tLz2/O0XzFvBCXjSeQsZHPYSG/k3OUMh2Y3oXhPFxjdKAKwUQSqBydoIfPlbTUbLz4TeslpPQAo0MGFS2lBf4vUUv96pF45tLld7/KRCHzrUqn+NAJ5zkUTCtq5CyW51FQxePXMd3aCAizVrhonzHRhmVEw0K7eBTBYCcjqaSkBOelfCvgpQe7UYwOjCAbXnGF2eO/DdN906v0= X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Liu, Changcheng Acked-by: Leon Romanovsky diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 66d76e97a087..d8a48e2dd5ec 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -537,7 +537,7 @@ struct mlx5_ifc_fte_match_set_lyr_2_4_bits { u8 reserved_at_c0[0x10]; u8 ipv4_ihl[0x4]; - u8 reserved_at_c4[0x4]; + u8 reserved_at_d4[0x4]; u8 ttl_hoplimit[0x8]; @@ -937,7 +937,7 @@ struct mlx5_ifc_e_switch_cap_bits { u8 nvgre_encap_decap[0x1]; u8 reserved_at_22[0x1]; u8 log_max_fdb_encap_uplink[0x5]; - u8 reserved_at_21[0x3]; + u8 reserved_at_28[0x3]; u8 log_max_packet_reformat_context[0x5]; u8 reserved_2b[0x6]; u8 max_encap_header_size[0xa]; @@ -1458,7 +1458,7 @@ enum { struct mlx5_ifc_cmd_hca_cap_bits { u8 reserved_at_0[0x10]; u8 shared_object_to_user_object_allowed[0x1]; - u8 reserved_at_13[0xe]; + u8 reserved_at_11[0xe]; u8 vhca_resource_manager[0x1]; u8 hca_cap_2[0x1]; @@ -1618,7 +1618,7 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 pci_sync_for_fw_update_event[0x1]; u8 reserved_at_1f2[0x6]; u8 init2_lag_tx_port_affinity[0x1]; - u8 reserved_at_1fa[0x3]; + u8 reserved_at_1f9[0x3]; u8 cqe_version[0x4]; u8 compact_address_vector[0x1]; @@ -1682,9 +1682,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 reserved_at_241[0x9]; u8 uar_sz[0x6]; u8 port_selection_cap[0x1]; - u8 reserved_at_248[0x1]; + u8 reserved_at_251[0x1]; u8 umem_uid_0[0x1]; - u8 reserved_at_250[0x5]; + u8 reserved_at_253[0x5]; u8 log_pg_sz[0x8]; u8 bf[0x1]; @@ -4062,7 +4062,7 @@ struct mlx5_ifc_mkc_bits { u8 reserved_at_1c0[0x19]; u8 relaxed_ordering_read[0x1]; - u8 reserved_at_1d9[0x1]; + u8 reserved_at_1da[0x1]; u8 log_page_size[0x5]; u8 reserved_at_1e0[0x20]; @@ -5279,7 +5279,7 @@ struct mlx5_ifc_query_special_contexts_out_bits { u8 repeated_mkey[0x20]; - u8 reserved_at_a0[0x20]; + u8 reserved_at_e0[0x20]; }; struct mlx5_ifc_query_special_contexts_in_bits { @@ -11449,9 +11449,9 @@ struct mlx5_ifc_alloc_memic_in_bits { u8 reserved_at_20[0x10]; u8 op_mod[0x10]; - u8 reserved_at_30[0x20]; + u8 reserved_at_40[0x20]; - u8 reserved_at_40[0x18]; + u8 reserved_at_60[0x18]; u8 log_memic_addr_alignment[0x8]; u8 range_start_addr[0x40];