From patchwork Tue May 2 19:31:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Agarwal X-Patchwork-Id: 13229237 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 286DDC77B78 for ; Tue, 2 May 2023 19:31:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229498AbjEBTb6 (ORCPT ); Tue, 2 May 2023 15:31:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229552AbjEBTb5 (ORCPT ); Tue, 2 May 2023 15:31:57 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F0B01BF9 for ; Tue, 2 May 2023 12:31:55 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b9a7df507c5so8353915276.1 for ; Tue, 02 May 2023 12:31:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683055914; x=1685647914; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=AKbTyP7qWyNeHiZExqE9j9/ScUY0ln0RZUFZMZiF+PY=; b=o4uWpfv0yeRuyDGZ1DHRwaNSFiULXiE03zJYyjiB5bHRoQ774FYtwnmbnB/hGVCuZW EuXMJqBck5CyIlgbaBmNT8UOGsLaRWIx5lMtc1IgVXCBRtgJskTQQzs9oFiYzeeNX8Uz bV4zMiFJlDGGoa0iBfAXLfbzpgmDRys1T5IOsPUf464/0LQnAUR/jdT7GJsctIvSVmsx rOnXf4ml+4arcTKzU7ejd9P1NEy1YhX5p5mSrDOw10K1rJ2hKMnvRZe7fT0xr0urKN/h Dm1NhF+u6hnMggrLAtOPxwrqXhZxAeU9gSeo4oGSC3e3YOiRCBFTPdPXablDYsG8ZyH/ jpDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683055914; x=1685647914; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=AKbTyP7qWyNeHiZExqE9j9/ScUY0ln0RZUFZMZiF+PY=; b=ZtvQMdniVFDUAtv6mbTkc8bdfV9B7BuVqSKlUeOSCOeRkwrnxzjQSN2+hwQXQiDL8o 8R9/9X2VZ2HtvUZHrgcFgOrkc6SZxFH2fj3Y6ZKWxJF734oK7Nzpw3FSz90xJGo2XWBJ WTkuuh3Kp/lgYJ8cAY+zkiksStEvmHi9GXYeVcjIQbzHAtOTXav7t3cTGxEFDxbDl2EE 1tJzW7pJneRX7uW0xPf/2f/tqg9ghWAYsDx4aRS1QzoEAOpdO9toRIyc9zIrUwBruRbH JQejTzGPo5pTZn5C7aNFRNMsVt2QeTVuJlOy49s+R6PG/FSo+EzEX2LsZYVMuK2vjIMY bsRQ== X-Gm-Message-State: AC+VfDyHrIYMF6G053uuidi6aeNfDmqJC8xDvczu/mH8eVqQZARdzjRX XpG1sl/J64B6cLaAZTAKSQHF74b5lFH3hLcAQQ== X-Google-Smtp-Source: ACHHUZ5J+mOsKqtZWN9zYOomJBijx6MzBtVYkgLBQZpUoIrZRwsKTtwMr0oGUNtQWxz/11NDdp/1nlwO7ybDqtIC8w== X-Received: from ajaya.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:39b5]) (user=ajayagarwal job=sendgmr) by 2002:a25:ad9b:0:b0:b78:8bd8:6e77 with SMTP id z27-20020a25ad9b000000b00b788bd86e77mr10843815ybi.8.1683055914629; Tue, 02 May 2023 12:31:54 -0700 (PDT) Date: Wed, 3 May 2023 01:01:36 +0530 In-Reply-To: <20230502193140.1062470-1-ajayagarwal@google.com> Mime-Version: 1.0 References: <20230502193140.1062470-1-ajayagarwal@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230502193140.1062470-2-ajayagarwal@google.com> Subject: [PATCH v2 1/5] PCI/ASPM: Disable ASPM_STATE_L1 only when class driver disables L1 ASPM From: Ajay Agarwal To: Bjorn Helgaas , Kuppuswamy Sathyanarayanan , Vidya Sagar , Nikhil Devshatwar , Manu Gautam , "David E. Box" , Kai-Heng Feng , Michael Bottini Cc: linux-pci@vger.kernel.org, Ajay Agarwal Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently the aspm driver sets ASPM_STATE_L1 as well as ASPM_STATE_L1SS bits in aspm_disable when the caller disables L1. pcie_config_aspm_link takes care that L1ss ASPM is not enabled if L1 is disabled. ASPM_STATE_L1SS bits do not need to be explicitly set. The sysfs node store() function, which also modifies the aspm_disable value, does not set these bits either when only L1 ASPM is disabled by the user. Disable ASPM_STATE_L1 only when the caller disables L1 ASPM. Signed-off-by: Ajay Agarwal Reviewed-by: Kuppuswamy Sathyanarayanan --- Changelog since v1: - Better commit message drivers/pci/pcie/aspm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 66d7514ca111..5765b226102a 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -1095,8 +1095,7 @@ static int __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem) if (state & PCIE_LINK_STATE_L0S) link->aspm_disable |= ASPM_STATE_L0S; if (state & PCIE_LINK_STATE_L1) - /* L1 PM substates require L1 */ - link->aspm_disable |= ASPM_STATE_L1 | ASPM_STATE_L1SS; + link->aspm_disable |= ASPM_STATE_L1; if (state & PCIE_LINK_STATE_L1_1) link->aspm_disable |= ASPM_STATE_L1_1; if (state & PCIE_LINK_STATE_L1_2) From patchwork Tue May 2 19:31:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Agarwal X-Patchwork-Id: 13229238 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A33D3C77B73 for ; Tue, 2 May 2023 19:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229556AbjEBTcC (ORCPT ); Tue, 2 May 2023 15:32:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229528AbjEBTcB (ORCPT ); Tue, 2 May 2023 15:32:01 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86FF01BF9 for ; Tue, 2 May 2023 12:32:00 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b9dcfade347so5700916276.2 for ; Tue, 02 May 2023 12:32:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683055919; x=1685647919; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=gwJUylU4tx2YBYWLpswcUDBipNDG8GjX+zB/YTSAsRo=; b=awEZO+qiQQ/Q9PJg/D8xSgR/SLOxEPypra28/HovU3g/gjU0GO5lUBlIJBs8dUmQRX nfe3SaTC8ADcQZnfxkMojymqledGwFz4aToFhZ7oPo8AD4OjMlkZiYBcBKb//Ir16jYI Xn/V0UbLISaLEbEI8s6qIIdSOT/mHXtxvffm7fO+s8f2f1bUBHUIRPsi8dOYz+0J3yV/ vjYQmeagQD1JOr1ceiRUQRaT4z+ukl8/T9PnsevmMaXdP9T1UKRbv1LniCXP8EMGS0Du DmA6/TxEGn/DYWax9n0tKo9vO4ZrBSITyEB99cgm6nCjfZ5vEF9PASeI8loHoDHoVvUA rHxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683055919; x=1685647919; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=gwJUylU4tx2YBYWLpswcUDBipNDG8GjX+zB/YTSAsRo=; b=Sfx7r36mLzEo3m80uNPQxBzOhDoVln2hMGl0/S60SZXqgEeEPw5tQsckF6lRS4WH20 nrohvKMyVxGPCG7NoTHNzEPzXI/nwnrkCFXGbYZtrIovbKgvR5UqZ8B6xaVSOtPJj5OH 0Snm72CrhFJOZ9zs3nDTdmUPvRUavAfB6ZJwFkvLmkIO6sK2VIu4T8gvUIZWAzWqGZvR a5eqiMrNpBTM3aV6Zfkb0h1aT1h3OYzexy2SEidiCYaJo5RnPx4D9zx27u4/JOLMnuFN KusbiSJvXoXJgCs0PbP/V/e+755J6pYhG8ByvI+wkmZwUitK4slsSAiSmpin1Ow5SxTE t6xg== X-Gm-Message-State: AC+VfDydVBMHQpgYrs3mjrUhMM0nX1y8ypvkr7viGmrgVYEPgsw/XB/o K2GoaXyveNfvbvagEY1jvh2FJkEoAiPJWFJncg== X-Google-Smtp-Source: ACHHUZ4vw2y1tj3KoswA2EHsJV2aHNWsSGUnuHcsX+VjT9gXOODHCJIvz6nTvqAIGd3B0ZHDPXF4H+Nh+j4doaynaQ== X-Received: from ajaya.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:39b5]) (user=ajayagarwal job=sendgmr) by 2002:a25:403:0:b0:b9e:7d81:4b91 with SMTP id 3-20020a250403000000b00b9e7d814b91mr1017275ybe.9.1683055919721; Tue, 02 May 2023 12:31:59 -0700 (PDT) Date: Wed, 3 May 2023 01:01:37 +0530 In-Reply-To: <20230502193140.1062470-1-ajayagarwal@google.com> Mime-Version: 1.0 References: <20230502193140.1062470-1-ajayagarwal@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230502193140.1062470-3-ajayagarwal@google.com> Subject: [PATCH v2 2/5] PCI/ASPM: Set ASPM_STATE_L1 only when driver enables L1.0 From: Ajay Agarwal To: Bjorn Helgaas , Kuppuswamy Sathyanarayanan , Vidya Sagar , Nikhil Devshatwar , Manu Gautam , "David E. Box" , Kai-Heng Feng , Michael Bottini Cc: linux-pci@vger.kernel.org, Ajay Agarwal Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently the core driver sets ASPM_STATE_L1 as well as ASPM_STATE_L1SS when the caller wants to enable just L1.0. This is incorrect. Fix this by setting the ASPM_STATE_L1 bit only when the caller wishes to enable L1.0. Signed-off-by: Ajay Agarwal Reviewed-by: Kuppuswamy Sathyanarayanan --- Changelog since v1: - Break down the L1 and L1ss handling into separate patches drivers/pci/pcie/aspm.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 5765b226102a..4ad0bf5d5838 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -1170,8 +1170,7 @@ int pci_enable_link_state(struct pci_dev *pdev, int state) if (state & PCIE_LINK_STATE_L0S) link->aspm_default |= ASPM_STATE_L0S; if (state & PCIE_LINK_STATE_L1) - /* L1 PM substates require L1 */ - link->aspm_default |= ASPM_STATE_L1 | ASPM_STATE_L1SS; + link->aspm_default |= ASPM_STATE_L1; if (state & PCIE_LINK_STATE_L1_1) link->aspm_default |= ASPM_STATE_L1_1; if (state & PCIE_LINK_STATE_L1_2) From patchwork Tue May 2 19:31:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Agarwal X-Patchwork-Id: 13229239 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0BCEC77B78 for ; Tue, 2 May 2023 19:32:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229552AbjEBTcH (ORCPT ); Tue, 2 May 2023 15:32:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229584AbjEBTcG (ORCPT ); Tue, 2 May 2023 15:32:06 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 903901FE2 for ; Tue, 2 May 2023 12:32:05 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-b8f324b3ef8so5236826276.0 for ; Tue, 02 May 2023 12:32:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683055925; x=1685647925; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=OjGj+uU9+T3V55g9RkXA5Hr9eIueNSu8jnz5r8uDglg=; b=7pAcOuNoQQuwyjpcVBq9yaubxHt3Wg72udTISOJdOFGzqUAOCkS/npOH2gNCWk1k2/ YwRUA/BARDv4wWb5NvbKhsm6WcGUOULqQ3dAjYCVoRxc5lmkXwl7m1aby9sd4VNwdgnA sYFVf56PCjr6xne5xuqu3rh2C1r2fJZpHPYLWC8E6N1/S/zLjO5yZ72nXaAJNqtQI4fb spY8RWldLz307sreaUG5a4rVFT5nTlYBrlB+2pkwTc+KcSjlCZKLFn35/9OIrhMjuIE0 2EE06wqxPMtLELV5lNR8MDSdxEPmhg5cuofVaviarHtHg1Yf61AUAwL96vZQsavWUGVc r2kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683055925; x=1685647925; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=OjGj+uU9+T3V55g9RkXA5Hr9eIueNSu8jnz5r8uDglg=; b=jo80m6fH9YNW0Tb7mAxpgokRmaMS9AogchKm689L4EXcAvvRr7OA/OUbtBS/yz5A3i rmFPfNsQNEAjQR4Sn73IxOSLi2TTKdfTWPzOoidkcjr+YrjrUkffIcVuIr4gFy9cqy4D pDOSWzHzUrd97wnWUyXRZuU6okoab1vhkwhKKeO4O0/ZzcKhg/6f38QaltWUs0TM7ada iOve7dmOohk+mpB69Z8vo4UayfGqRi28ycMH9Po7TUNhZvLDeDaa3nF/riTRmFxyDfrm z/rmedytwAYmm7Lfeq91hlw/fWpmYymJ6yiO9wQWC43YuoISlcZHa50RB8vkvnq/aWh8 sBXQ== X-Gm-Message-State: AC+VfDzwmWD2GY0/PHY830Hvvd+60N6rGccbf31IqnLiZsLa1YhnOu9v 1PoGj8QpEn5jfaDe6mMYgTKS7gJjxCTj1TA3bQ== X-Google-Smtp-Source: ACHHUZ4B7tuEWArY6pfOKLezRsrD1nh24mWdeq9N1fxuZiw922qKscZ150nnqycJpyo6lWEBh3EsqS9VE4PybReDBg== X-Received: from ajaya.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:39b5]) (user=ajayagarwal job=sendgmr) by 2002:a25:ac4c:0:b0:b9e:635c:7970 with SMTP id r12-20020a25ac4c000000b00b9e635c7970mr2354030ybd.3.1683055924888; Tue, 02 May 2023 12:32:04 -0700 (PDT) Date: Wed, 3 May 2023 01:01:38 +0530 In-Reply-To: <20230502193140.1062470-1-ajayagarwal@google.com> Mime-Version: 1.0 References: <20230502193140.1062470-1-ajayagarwal@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230502193140.1062470-4-ajayagarwal@google.com> Subject: [PATCH v2 3/5] PCI/ASPM: Set ASPM_STATE_L1 when driver enables L1ss From: Ajay Agarwal To: Bjorn Helgaas , Kuppuswamy Sathyanarayanan , Vidya Sagar , Nikhil Devshatwar , Manu Gautam , "David E. Box" , Kai-Heng Feng , Michael Bottini Cc: linux-pci@vger.kernel.org, Ajay Agarwal Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently the aspm driver does not set ASPM_STATE_L1 bit in aspm_default when the caller requests L1SS ASPM state. This will lead to pcie_config_aspm_link() not enabling the requested L1SS state. Set ASPM_STATE_L1 when driver enables L1ss. Signed-off-by: Ajay Agarwal --- Changelog since v1: - Break down the L1 and L1ss handling into separate patches drivers/pci/pcie/aspm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 4ad0bf5d5838..7c9935f331f1 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -1171,14 +1171,15 @@ int pci_enable_link_state(struct pci_dev *pdev, int state) link->aspm_default |= ASPM_STATE_L0S; if (state & PCIE_LINK_STATE_L1) link->aspm_default |= ASPM_STATE_L1; + /* L1 PM substates require L1 */ if (state & PCIE_LINK_STATE_L1_1) - link->aspm_default |= ASPM_STATE_L1_1; + link->aspm_default |= ASPM_STATE_L1_1 | ASPM_STATE_L1; if (state & PCIE_LINK_STATE_L1_2) - link->aspm_default |= ASPM_STATE_L1_2; + link->aspm_default |= ASPM_STATE_L1_2 | ASPM_STATE_L1; if (state & PCIE_LINK_STATE_L1_1_PCIPM) - link->aspm_default |= ASPM_STATE_L1_1_PCIPM; + link->aspm_default |= ASPM_STATE_L1_1_PCIPM | ASPM_STATE_L1; if (state & PCIE_LINK_STATE_L1_2_PCIPM) - link->aspm_default |= ASPM_STATE_L1_2_PCIPM; + link->aspm_default |= ASPM_STATE_L1_2_PCIPM | ASPM_STATE_L1; pcie_config_aspm_link(link, policy_to_aspm_state(link)); link->clkpm_default = (state & PCIE_LINK_STATE_CLKPM) ? 1 : 0; From patchwork Tue May 2 19:31:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Agarwal X-Patchwork-Id: 13229240 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEE8AC77B78 for ; Tue, 2 May 2023 19:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229625AbjEBTcN (ORCPT ); Tue, 2 May 2023 15:32:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229567AbjEBTcM (ORCPT ); Tue, 2 May 2023 15:32:12 -0400 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A1581FC3 for ; Tue, 2 May 2023 12:32:10 -0700 (PDT) Received: by mail-pf1-x449.google.com with SMTP id d2e1a72fcca58-63b6527a539so2689323b3a.0 for ; Tue, 02 May 2023 12:32:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1683055930; x=1685647930; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=JeYkAsKQQ0HUkQlGdNcCWqmm6pKxSbFqjQ7L6hKU1cI=; b=IJvrnkqYtqY/gza8yo6sMsL8dnzUvt42ulBZukPS4CabKLTOMVUOR8FmFm2wd/FrRF 3UMsNMgFDLJAvI7KZkB2a3pJ2Ff4DWk73W94vDiHPLweBPhZyKuejnOygwfxHE2PrQZu Vy4L7b2uBLpjGhYuncL9irfIA9CfOzPZOggMwhCu8OqefsJ0l0hTh3hGV2psSLRGimQx HSxC7QEcyu0n+KFPCSDl/JA5qSLabBKtBvu3pMCfhsG9aAtB7/7IrmMMxB+UaFzf4bkc QaylLXomFO00bxyQC7rWgvK2rE72NZnsbrJlUt5LYY6UScZuVvGLNPgkB+WOygAGw5SN Yxjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683055930; x=1685647930; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=JeYkAsKQQ0HUkQlGdNcCWqmm6pKxSbFqjQ7L6hKU1cI=; b=AtjmpTlpDf+mYvtBb1YFl8xb5iVdhjLMv47soM2dbguU52nrub8FNgkSIcaIfAd4S7 LVzuRs2PzaegGOQQxmO0dOw3fpQukC3Xz6BbYm4r9w8iMubRpWuEPTINhl2PVkT+VtiW aoITY+LlyuHlXNNCs/0kb+EFlMT1EToBiJMZLWum6taHYlRJT4pLQrvXs3TrVBJD9zUe lRVRnvLOvRyvS1Eb9pvdQn3OnyLJoP8tFosMmczX0TGFoh5IVHvl54ZeKM2J2P3Vybfr HAYdpsVMZKhLO2Z9j1RP/I7mT7Cpc40/GHIz/zLNCNzfB7H1Sf58Y8CXTCwjy7nWnm8X yqdg== X-Gm-Message-State: AC+VfDyCfeFYpV7f4ZdT9uHN38wm0OjC64K1hGZ6BlVDoclx4wwoL1Ht 23Z1sfjxibkQkcftM+fa+c3bzPwWXk9TR8/kHQ== X-Google-Smtp-Source: ACHHUZ56CNsPi9qvIApoShEq3odHTS/m7gRgjB2uNfB6pjtZ9NJPHSeHU4RIBCYKLm7gM9qoQ0Z8aHRmf+IaXyFSfA== X-Received: from ajaya.c.googlers.com ([fda3:e722:ac3:cc00:4f:4b78:c0a8:39b5]) (user=ajayagarwal job=sendgmr) by 2002:a05:6a00:bd4:b0:641:31b1:e781 with SMTP id x20-20020a056a000bd400b0064131b1e781mr3532928pfu.5.1683055930098; Tue, 02 May 2023 12:32:10 -0700 (PDT) Date: Wed, 3 May 2023 01:01:39 +0530 In-Reply-To: <20230502193140.1062470-1-ajayagarwal@google.com> Mime-Version: 1.0 References: <20230502193140.1062470-1-ajayagarwal@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230502193140.1062470-5-ajayagarwal@google.com> Subject: [PATCH v2 4/5] PCI/ASPM: Rename L1.2 specific functions From: Ajay Agarwal To: Bjorn Helgaas , Kuppuswamy Sathyanarayanan , Vidya Sagar , Nikhil Devshatwar , Manu Gautam , "David E. Box" , Kai-Heng Feng , Michael Bottini Cc: linux-pci@vger.kernel.org, Ajay Agarwal Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The functions aspm_calc_l1ss_info() and calc_l1ss_pwron() perform calculations and register programming specific to L1.2 state. Rename them to aspm_calc_l12_info() and calc_l12_pwron() respectively. Signed-off-by: Ajay Agarwal --- Changelog since v1: - New patch to rename L1.2 specific functions drivers/pci/pcie/aspm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 7c9935f331f1..db7c369a0544 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -337,7 +337,7 @@ static u32 calc_l1_acceptable(u32 encoding) } /* Convert L1SS T_pwr encoding to usec */ -static u32 calc_l1ss_pwron(struct pci_dev *pdev, u32 scale, u32 val) +static u32 calc_l12_pwron(struct pci_dev *pdev, u32 scale, u32 val) { switch (scale) { case 0: @@ -471,7 +471,7 @@ static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos, } /* Calculate L1.2 PM substate timing parameters */ -static void aspm_calc_l1ss_info(struct pcie_link_state *link, +static void aspm_calc_l12_info(struct pcie_link_state *link, u32 parent_l1ss_cap, u32 child_l1ss_cap) { struct pci_dev *child = link->downstream, *parent = link->pdev; @@ -495,13 +495,13 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link, val2 = (child_l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_VALUE) >> 19; scale2 = (child_l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_SCALE) >> 16; - if (calc_l1ss_pwron(parent, scale1, val1) > - calc_l1ss_pwron(child, scale2, val2)) { + if (calc_l12_pwron(parent, scale1, val1) > + calc_l12_pwron(child, scale2, val2)) { ctl2 |= scale1 | (val1 << 3); - t_power_on = calc_l1ss_pwron(parent, scale1, val1); + t_power_on = calc_l12_pwron(parent, scale1, val1); } else { ctl2 |= scale2 | (val2 << 3); - t_power_on = calc_l1ss_pwron(child, scale2, val2); + t_power_on = calc_l12_pwron(child, scale2, val2); } /* @@ -617,7 +617,7 @@ static void aspm_l1ss_init(struct pcie_link_state *link) link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM; if (link->aspm_support & ASPM_STATE_L1SS) - aspm_calc_l1ss_info(link, parent_l1ss_cap, child_l1ss_cap); + aspm_calc_l12_info(link, parent_l1ss_cap, child_l1ss_cap); } static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) From patchwork Tue May 2 19:31:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Agarwal X-Patchwork-Id: 13229241 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CDFFC77B78 for ; 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Tue, 02 May 2023 12:32:15 -0700 (PDT) Date: Wed, 3 May 2023 01:01:40 +0530 In-Reply-To: <20230502193140.1062470-1-ajayagarwal@google.com> Mime-Version: 1.0 References: <20230502193140.1062470-1-ajayagarwal@google.com> X-Mailer: git-send-email 2.40.1.495.gc816e09b53d-goog Message-ID: <20230502193140.1062470-6-ajayagarwal@google.com> Subject: [PATCH v2 5/5] PCI/ASPM: Remove unnecessary ASPM_STATE_L1SS check From: Ajay Agarwal To: Bjorn Helgaas , Kuppuswamy Sathyanarayanan , Vidya Sagar , Nikhil Devshatwar , Manu Gautam , "David E. Box" , Kai-Heng Feng , Michael Bottini Cc: linux-pci@vger.kernel.org, Ajay Agarwal Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently the driver checks if ASPM_STATE_L1SS is supported before calling aspm_calc_l12_info(), only for this function to return if ASPM_STATE_L1_2_MASK is not supported. Simplify the logic by directly checking for L1.2 mask. Signed-off-by: Ajay Agarwal --- Changelog since v1: - Rebase on top of the L1.2 function rename patch drivers/pci/pcie/aspm.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index db7c369a0544..e89091cba356 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -481,9 +481,6 @@ static void aspm_calc_l12_info(struct pcie_link_state *link, u32 pctl1, pctl2, cctl1, cctl2; u32 pl1_2_enables, cl1_2_enables; - if (!(link->aspm_support & ASPM_STATE_L1_2_MASK)) - return; - /* Choose the greater of the two Port Common_Mode_Restore_Times */ val1 = (parent_l1ss_cap & PCI_L1SS_CAP_CM_RESTORE_TIME) >> 8; val2 = (child_l1ss_cap & PCI_L1SS_CAP_CM_RESTORE_TIME) >> 8; @@ -616,7 +613,7 @@ static void aspm_l1ss_init(struct pcie_link_state *link) if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_2) link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM; - if (link->aspm_support & ASPM_STATE_L1SS) + if (link->aspm_support & ASPM_STATE_L1_2_MASK) aspm_calc_l12_info(link, parent_l1ss_cap, child_l1ss_cap); }