From patchwork Sun May 7 15:03:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 13233752 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7762AC77B7C for ; Sun, 7 May 2023 15:06:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pWxNmcj7fZ1/Sf8o4CIzEQ2ksG79QCu+kgwsUD68WPs=; b=WCFOjQcLSR+zk0 YurvQImRTQE5NYNgdXKLlOxYTkOGJ5+BfZx6IF5CtA2eEYX6yIrJ4PDdjbErjLDVJm3XQo9fcghxf pvefHhL28tCQoWJqoWVQ0IAidl1Ek1zGjfY/yADmbPIKF6VwlGPcXHmqntXOriNCyo506nSkpGhZs o4kozLiHdmuBNpipXPWkQLfYZvAGkQGqoe88+cYEMcCD7Ghyk717ui5M8Tuh1wqbbo09d9OC/ibAz JzSiCDc3x2WE35ewOYy3lnXb4bDTNFzB+s2t6dvenem8wVUuYIdCfHzI9tEIFQDA4fZ9Us3w47M+u mt1YrZyeQaZ1SBVm8cFQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pvfx9-00GFJ5-0m; Sun, 07 May 2023 15:05:35 +0000 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pvfx7-00GFIU-1P; Sun, 07 May 2023 15:05:34 +0000 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-3f315712406so144870145e9.0; Sun, 07 May 2023 08:05:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683471930; x=1686063930; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BWPFIpbopZ/dSPc8BXucXK0MKlLp5Nt0gvsNK/0CeEE=; b=NqJNHxlpTZEGCLOOoR9ynNB7nWMm5du5oJdDZV//VB8baAumsI9K0DyAbkEMe9f6dH ayQetIhPKX6l9aayF9h2FeVblROcT/I4vIWocwEkl25UMX+c7tEG9YfzgDEzFK2/FfrF fRsiI5Boh6Sjt9BmlZVQxn+kVIxKuQboI/25h5QHI2F52o11ah9WZVx+qog680vLB4Dn pVGpus9Qm9pPjK8jys4VOUyM1k9bZQRiKoVGcHttBD2xnltNLF7NNB56hg7eRo3rQmt0 rha+vtWIdVgIGf2QJbbUe3vvyGJarCUjybV8rZ0aKNXIQcLrEwgqVHO03d9d8OUZ1Npi /wWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683471930; x=1686063930; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BWPFIpbopZ/dSPc8BXucXK0MKlLp5Nt0gvsNK/0CeEE=; b=Rij2EL16hAYicC76IpYHMzfkaZcd0nIZgylPHtv6TwSo8Pjro7VJhBUXaFhjKAsvFk Bu46Azwd22uxZEE5uvHpXHClRtsIr6KM7j9QEmc1tfNqbikNLt9a2fLivT7WlfGnsGAe BvQMtPH02REoAAh0r1tiukr21Y6Qb2C6iC2IP5lzbi5IyhZBmT2e1yIxVVQUXrdGQciL 7bcZWLdIif+Rz5EoZPDHBxMYivp2iw5gsdJUSKLx7yLiSy6zYtCGygUj6CQdCli2fdOu vaSD0xMe3i6oYHIPcLzOBElotVD6jzddsYHpxK/RTvyht5UPV8axGpGKTPR5iWXOd8L6 KFvA== X-Gm-Message-State: AC+VfDxxrsJpNFK0KJOOTw+Ros8P/dpRjA4Z+q7Hptf3c3vCuBIzfl4B RNyoGnEiDfqCKU7dhqySNsg= X-Google-Smtp-Source: ACHHUZ7/e5Bbc9zRgx5V/xn6mDpperMU1AZZ37UdqDuQFjv/5xA2kL53z6k4AGG30/D4C2f50XJROQ== X-Received: by 2002:a05:6000:100d:b0:306:3ec9:99c5 with SMTP id a13-20020a056000100d00b003063ec999c5mr5382942wrx.9.1683471930289; Sun, 07 May 2023 08:05:30 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b0030771c6e443sm8437998wri.42.2023.05.07.08.05.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 08:05:29 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Maksim Kiselev , Krzysztof Kozlowski , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 1/5] dt-bindings: spi: sun6i: add DT bindings for Allwinner R329/D1/R528/T113s SPI Date: Sun, 7 May 2023 18:03:33 +0300 Message-Id: <20230507150345.1971083-2-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230507150345.1971083-1-bigunclemax@gmail.com> References: <20230507150345.1971083-1-bigunclemax@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230507_080533_475318_5418593B X-CRM114-Status: UNSURE ( 9.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Listed above Allwinner SoCs has two SPI controllers. First is the regular SPI controller and the second one has additional functionality for MIPI-DBI Type C. Add compatible strings for these controllers Signed-off-by: Maksim Kiselev Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index de36c6a34a0f..ab2d8a03011e 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -19,6 +19,7 @@ properties: compatible: oneOf: + - const: allwinner,sun50i-r329-spi - const: allwinner,sun6i-a31-spi - const: allwinner,sun8i-h3-spi - items: @@ -28,6 +29,12 @@ properties: - allwinner,sun50i-h616-spi - allwinner,suniv-f1c100s-spi - const: allwinner,sun8i-h3-spi + - items: + - enum: + - allwinner,sun20i-d1-spi + - allwinner,sun20i-d1-spi-dbi + - allwinner,sun50i-r329-spi-dbi + - const: allwinner,sun50i-r329-spi reg: maxItems: 1 From patchwork Sun May 7 15:03:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 13233751 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0588CC77B7D for ; Sun, 7 May 2023 15:06:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VNx6x4ZgOuORWNwGxGCrDX6xE6cfYDIUujoKr7Rych4=; b=3q8n69/ZKznMAf 7CLM8HPT2tvwCYVmCyz3MBoIEaiRAJnQVbeZRXHUwrx2JZIHZuJHV3c1CZNkXugXRNHnHEGn/3dNm wm7UautPkjCRCkXiC/vW/mo+eSa6bLEGhBh6Yezs4VkulkwsANl1SN/eBjjinE4ega7ypMKRbOwG+ jNkdQicnbny5YGVyLQXpFmkdDEJTem4Lf/Fb+FtpUW/lXwE3g6Fps1UR2lZsnpCu6mOi1kYw3xeMp ExbH+5jAiaZQDc0h12Y8ttrpdvqXjj3cDvbl1QxlgBaar6I33OrdDSscUe3vgrJ+PM8xBMGtzlQEL r0iKjpQjg4ySXtQURCzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxF-00GFLd-2n; Sun, 07 May 2023 15:05:41 +0000 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxC-00GFIU-37; Sun, 07 May 2023 15:05:40 +0000 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-3f315712406so144872295e9.0; Sun, 07 May 2023 08:05:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683471938; x=1686063938; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=77wc1d6atkrSEJWlP3Ir0nLtSYker340vhK9d9PW+mI=; b=XutFOCZHWJnWkRB9BewbmcrURpWtS0oGRy7KitO4zl8hpXeDbYm+5ThXZS34mSfEcn EVrt1FMqI5UZMsN8Ix012ShRWbcrQ1PD5U/Q7RtLFeNXXzJXRW8KIF/aerD27CGlhG0m HLZMsgyiuGhoe1+7TsE3erKCGIFtDb3MECuULbMo6+SyNoyoJnp2Ymw84KeMAoYFrO+7 f/Uz2ZQQuztHQvyRE6XN8c5SwuXdMTtfZyOfUOuV3wkYTePb+nt5nRxwo1Ijw89E7+EG 2P6mmFHLBJ6NuLtSJYLJr5CYaedoERne6G+ReFHD1LPPbtOyR35oLeTqFB+T+EwCjVbv Y7Rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683471938; x=1686063938; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=77wc1d6atkrSEJWlP3Ir0nLtSYker340vhK9d9PW+mI=; b=DFUzG8EhYXjNFdwMvoblBlctUa6d19Oc1SYaYPJrJCxp00adbpWd3LVmZ+h4H8bDzx 7BgzH31bBcnqGq/SYwhwQTJDCq/EWUolSF+hRzWYMYkQ0bi5blqWyVZPO5MEBZAJ9GA5 ro/Lia839/FbxEXVe/8ZGDggS72UwnqHSVlnstdRzmELmDaFYiOS2NvJMcj7EVmjqxT3 nOhywSyIxNvjXQAYyFp98qisd4jyvG8DhEN45zBikcmaQP1a58DcMxOC95ilIBsu3qUP oj8IpqR5mlWCjMB4WKLjSNMzrLJXQw0PuHBVWK+bz3hRWkzJ5MMfYv7IiJykMqrVqCAB NgtA== X-Gm-Message-State: AC+VfDyMywpt39bJ6QoRMIR3wruQ2nF1HR1voAWJxKG27OYA8HnjQW0i cz/Pa5t4gfAJ3ip8iSJJcY4= X-Google-Smtp-Source: ACHHUZ4bDccmBL9QdKVq9vlwdYZQPjzfCJXGWwQ7Tqwl3/wtWtlVOhk3dYx4QSgktssjK8nmqbL8Tw== X-Received: by 2002:a05:600c:8511:b0:3f1:7510:62e8 with SMTP id gw17-20020a05600c851100b003f1751062e8mr5566482wmb.3.1683471938339; Sun, 07 May 2023 08:05:38 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b0030771c6e443sm8437998wri.42.2023.05.07.08.05.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 08:05:38 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Maksim Kiselev , Samuel Holland , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 2/5] spi: sun6i: change OF match data to a struct Date: Sun, 7 May 2023 18:03:34 +0300 Message-Id: <20230507150345.1971083-3-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230507150345.1971083-1-bigunclemax@gmail.com> References: <20230507150345.1971083-1-bigunclemax@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230507_080539_014863_20A4E9C3 X-CRM114-Status: GOOD ( 19.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Icenowy Zheng As we're adding more properties to the OF match data, convert it to a struct now. Signed-off-by: Icenowy Zheng Signed-off-by: Maksim Kiselev Reviewed-by: Samuel Holland Reviewed-by: Andre Przywara --- drivers/spi/spi-sun6i.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 7532c85a352c..01a01cd86db5 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -85,6 +85,10 @@ #define SUN6I_TXDATA_REG 0x200 #define SUN6I_RXDATA_REG 0x300 +struct sun6i_spi_cfg { + unsigned long fifo_depth; +}; + struct sun6i_spi { struct spi_master *master; void __iomem *base_addr; @@ -99,7 +103,7 @@ struct sun6i_spi { const u8 *tx_buf; u8 *rx_buf; int len; - unsigned long fifo_depth; + const struct sun6i_spi_cfg *cfg; }; static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg) @@ -156,7 +160,7 @@ static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi) u8 byte; /* See how much data we can fit */ - cnt = sspi->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi); + cnt = sspi->cfg->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi); len = min((int)cnt, sspi->len); @@ -289,14 +293,14 @@ static int sun6i_spi_transfer_one(struct spi_master *master, * the hardcoded value used in old generation of Allwinner * SPI controller. (See spi-sun4i.c) */ - trig_level = sspi->fifo_depth / 4 * 3; + trig_level = sspi->cfg->fifo_depth / 4 * 3; } else { /* * Setup FIFO DMA request trigger level * We choose 1/2 of the full fifo depth, that value will * be used as DMA burst length. */ - trig_level = sspi->fifo_depth / 2; + trig_level = sspi->cfg->fifo_depth / 2; if (tfr->tx_buf) reg |= SUN6I_FIFO_CTL_TF_DRQ_EN; @@ -410,9 +414,9 @@ static int sun6i_spi_transfer_one(struct spi_master *master, reg = SUN6I_INT_CTL_TC; if (!use_dma) { - if (rx_len > sspi->fifo_depth) + if (rx_len > sspi->cfg->fifo_depth) reg |= SUN6I_INT_CTL_RF_RDY; - if (tx_len > sspi->fifo_depth) + if (tx_len > sspi->cfg->fifo_depth) reg |= SUN6I_INT_CTL_TF_ERQ; } @@ -543,7 +547,7 @@ static bool sun6i_spi_can_dma(struct spi_master *master, * the fifo length we can just fill the fifo and wait for a single * irq, so don't bother setting up dma */ - return xfer->len > sspi->fifo_depth; + return xfer->len > sspi->cfg->fifo_depth; } static int sun6i_spi_probe(struct platform_device *pdev) @@ -582,7 +586,7 @@ static int sun6i_spi_probe(struct platform_device *pdev) } sspi->master = master; - sspi->fifo_depth = (unsigned long)of_device_get_match_data(&pdev->dev); + sspi->cfg = of_device_get_match_data(&pdev->dev); master->max_speed_hz = 100 * 1000 * 1000; master->min_speed_hz = 3 * 1000; @@ -695,9 +699,17 @@ static void sun6i_spi_remove(struct platform_device *pdev) dma_release_channel(master->dma_rx); } +static const struct sun6i_spi_cfg sun6i_a31_spi_cfg = { + .fifo_depth = SUN6I_FIFO_DEPTH, +}; + +static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = { + .fifo_depth = SUN8I_FIFO_DEPTH, +}; + static const struct of_device_id sun6i_spi_match[] = { - { .compatible = "allwinner,sun6i-a31-spi", .data = (void *)SUN6I_FIFO_DEPTH }, - { .compatible = "allwinner,sun8i-h3-spi", .data = (void *)SUN8I_FIFO_DEPTH }, + { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg }, + { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg }, {} }; MODULE_DEVICE_TABLE(of, sun6i_spi_match); From patchwork Sun May 7 15:03:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 13233753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8F26AC77B7C for ; Sun, 7 May 2023 15:06:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/gXnbYUwa3utnp4epFvoMimUfCEQf2Emb7ezVJwFRHI=; b=RoQEe+FKZeF1gq 7NqzWSU4Pd6uRYARISiLZ6R9pQOrqlOFusX3+T/RqIFPIOH75THmfEoDmMhTllPsiDR5rB4lk11Z7 UWBkZ6pAOZV52Ik16+Nc7o9NHCfOXB3LyosRLiksv396HekKnXgnMu1ojcWNJMFIcEKcx/t4izrhA v4f8VrgWQ9W+AIawRVnRrogm5qettGMv6GXCi265IPpRTNozKBRqYHop1PwvW4GeOGbhTmicID5OH fpYa/Vv0yx53LySlxcgavlcFi1QWdacd/RjXX3gOAXy+7WwsPYTrU6UEMXG26I4jwp80fWuO1Px+g AwY1oURZIZt4/OpiLeLw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxQ-00GFQ7-2d; Sun, 07 May 2023 15:05:52 +0000 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxN-00GFO0-0j; Sun, 07 May 2023 15:05:50 +0000 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-3f4000ec6ecso36464485e9.0; Sun, 07 May 2023 08:05:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683471948; x=1686063948; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T8Xbue+dZrUS0EtWBIjxZwNQ7G1HJWZPzEox+l8G5TM=; b=lhYBSHcPlF2D07Hfu6H7Wu4YygvzGxgAGC5eHWGKvZ22zVVCKMfCGvpQ9YArJQe1OP mM1eJURhuhVrw8FB8mgvUVatKwgvwGPWOxP9pnpCYU9krKRDY4fjz+6V5D1148vBl+EW HKrq1r6Mbgs/MRg4aOXfNjKeA8h7R3WW5S1qJUF5K5+5Cy4HsXBtD9kR85pqnJccAH2t WEOINL/VPVL7ka4d80LzZoBqk64PP5vpQySj3VVjukrs1JHQETGymuH5Q0V5wLAJ3jEX /5efgaJXLFEwn2j/Eld6zSVvYry0Ni7YKAgdc01c+V5BCYVc0ICRje7nBstJCqDCfw4z IolQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683471948; x=1686063948; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T8Xbue+dZrUS0EtWBIjxZwNQ7G1HJWZPzEox+l8G5TM=; b=GOqiV/w54KC5gN4GX4JdofXSlBQDZNbyinRTdVYT48PAzGVsU/fOPmDIldKUbJLJz6 cGZx5Tf7mjEtHf5aEpUjLE6qEoGhJVzXxqTjgCmOzr1rTLFcuSElej7j3NNtY/sOhgbB IoN8b6rGGpetQfVXd3nHRLaucbkgHRWkK8ACvJtGnXhAL8E+W9ZGKBjel56yo9BSk3Mu jzMo5ULK9eXAC+mRC2rN0mvXkEs/UQwvMWM1wl77Qj0nDGnW8PX07lz3sHujhPOqxL1n 6j4hFtv+9infAkAwns9ZM04BOOY0jvkXQQGJJ1UklUX+GpDYs2M27vt88cR/KSJDWD3+ XGkA== X-Gm-Message-State: AC+VfDxeorUHPNgNaFC8UnLT+wfMnxhlj1naLof2h1PzTEd7t6CiHwjK 4zudsjf63LIHOQ0tZkukYto= X-Google-Smtp-Source: ACHHUZ6P7qXpFFPAPaFm0HGci22eWsFqTYayxZY/A76FX259w2o8wnK65Fpnavwew0z750xCUL9Mzg== X-Received: by 2002:a7b:c454:0:b0:3f4:2297:630a with SMTP id l20-20020a7bc454000000b003f42297630amr1380003wmi.20.1683471947766; Sun, 07 May 2023 08:05:47 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b0030771c6e443sm8437998wri.42.2023.05.07.08.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 08:05:47 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Maksim Kiselev , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 3/5] spi: sun6i: add quirk for in-controller clock divider Date: Sun, 7 May 2023 18:03:35 +0300 Message-Id: <20230507150345.1971083-4-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230507150345.1971083-1-bigunclemax@gmail.com> References: <20230507150345.1971083-1-bigunclemax@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230507_080549_262062_2C8235EC X-CRM114-Status: GOOD ( 22.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Previously SPI controllers in Allwinner SoCs has a clock divider inside. However now the clock divider is removed and to set the transfer clock rate it's only needed to set the SPI module clock to the target value and configure a proper work mode. According to the datasheet there are three work modes: | SPI Sample Mode | SDM(bit13) | SDC(bit11) | Run Clock | |-------------------------|------------|------------|-----------| | normal sample | 1 | 0 | <= 24 MHz | | delay half cycle sample | 0 | 0 | <= 40 MHz | | delay one cycle sample | 0 | 1 | >= 80 MHz | Add a quirk for this kind of SPI controllers. Co-developed-by: Icenowy Zheng Signed-off-by: Maksim Kiselev --- drivers/spi/spi-sun6i.c | 91 +++++++++++++++++++++++++++-------------- 1 file changed, 61 insertions(+), 30 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 01a01cd86db5..e4efab310469 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -42,7 +42,9 @@ #define SUN6I_TFR_CTL_CS_MANUAL BIT(6) #define SUN6I_TFR_CTL_CS_LEVEL BIT(7) #define SUN6I_TFR_CTL_DHB BIT(8) +#define SUN6I_TFR_CTL_SDC BIT(11) #define SUN6I_TFR_CTL_FBS BIT(12) +#define SUN6I_TFR_CTL_SDM BIT(13) #define SUN6I_TFR_CTL_XCH BIT(31) #define SUN6I_INT_CTL_REG 0x10 @@ -87,6 +89,7 @@ struct sun6i_spi_cfg { unsigned long fifo_depth; + bool has_clk_ctl; }; struct sun6i_spi { @@ -260,7 +263,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, struct spi_transfer *tfr) { struct sun6i_spi *sspi = spi_master_get_devdata(master); - unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout; + unsigned int div, div_cdr1, div_cdr2, timeout; unsigned int start, end, tx_time; unsigned int trig_level; unsigned int tx_len = 0, rx_len = 0; @@ -350,39 +353,65 @@ static int sun6i_spi_transfer_one(struct spi_master *master, sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); - /* Ensure that we have a parent clock fast enough */ - mclk_rate = clk_get_rate(sspi->mclk); - if (mclk_rate < (2 * tfr->speed_hz)) { - clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); - mclk_rate = clk_get_rate(sspi->mclk); - } + if (sspi->cfg->has_clk_ctl) { + unsigned int mclk_rate = clk_get_rate(sspi->mclk); - /* - * Setup clock divider. - * - * We have two choices there. Either we can use the clock - * divide rate 1, which is calculated thanks to this formula: - * SPI_CLK = MOD_CLK / (2 ^ cdr) - * Or we can use CDR2, which is calculated with the formula: - * SPI_CLK = MOD_CLK / (2 * (cdr + 1)) - * Wether we use the former or the latter is set through the - * DRS bit. - * - * First try CDR2, and if we can't reach the expected - * frequency, fall back to CDR1. - */ - div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz); - div_cdr2 = DIV_ROUND_UP(div_cdr1, 2); - if (div_cdr2 <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { - reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS; - tfr->effective_speed_hz = mclk_rate / (2 * div_cdr2); + /* Ensure that we have a parent clock fast enough */ + if (mclk_rate < (2 * tfr->speed_hz)) { + clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); + mclk_rate = clk_get_rate(sspi->mclk); + } + + /* + * Setup clock divider. + * + * We have two choices there. Either we can use the clock + * divide rate 1, which is calculated thanks to this formula: + * SPI_CLK = MOD_CLK / (2 ^ cdr) + * Or we can use CDR2, which is calculated with the formula: + * SPI_CLK = MOD_CLK / (2 * (cdr + 1)) + * Wether we use the former or the latter is set through the + * DRS bit. + * + * First try CDR2, and if we can't reach the expected + * frequency, fall back to CDR1. + */ + div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz); + div_cdr2 = DIV_ROUND_UP(div_cdr1, 2); + if (div_cdr2 <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { + reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS; + tfr->effective_speed_hz = mclk_rate / (2 * div_cdr2); + } else { + div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1)); + reg = SUN6I_CLK_CTL_CDR1(div); + tfr->effective_speed_hz = mclk_rate / (1 << div); + } + + sun6i_spi_write(sspi, SUN6I_CLK_CTL_REG, reg); } else { - div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1)); - reg = SUN6I_CLK_CTL_CDR1(div); - tfr->effective_speed_hz = mclk_rate / (1 << div); + clk_set_rate(sspi->mclk, tfr->speed_hz); + tfr->effective_speed_hz = clk_get_rate(sspi->mclk); + + /* + * Configure work mode. + * + * There are three work modes depending on the controller clock + * frequency: + * - normal sample mode : CLK <= 24MHz SDM=1 SDC=0 + * - delay half-cycle sample mode : CLK <= 40MHz SDM=0 SDC=0 + * - delay one-cycle sample mode : CLK >= 80MHz SDM=0 SDC=1 + */ + reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); + reg &= ~(SUN6I_TFR_CTL_SDM | SUN6I_TFR_CTL_SDC); + + if (tfr->effective_speed_hz <= 24000000) + reg |= SUN6I_TFR_CTL_SDM; + else if (tfr->effective_speed_hz >= 80000000) + reg |= SUN6I_TFR_CTL_SDC; + + sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); } - sun6i_spi_write(sspi, SUN6I_CLK_CTL_REG, reg); /* Finally enable the bus - doing so before might raise SCK to HIGH */ reg = sun6i_spi_read(sspi, SUN6I_GBL_CTL_REG); reg |= SUN6I_GBL_CTL_BUS_ENABLE; @@ -701,10 +730,12 @@ static void sun6i_spi_remove(struct platform_device *pdev) static const struct sun6i_spi_cfg sun6i_a31_spi_cfg = { .fifo_depth = SUN6I_FIFO_DEPTH, + .has_clk_ctl = true, }; static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = { .fifo_depth = SUN8I_FIFO_DEPTH, + .has_clk_ctl = true, }; static const struct of_device_id sun6i_spi_match[] = { From patchwork Sun May 7 15:03:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 13233754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 484B7C77B7D for ; Sun, 7 May 2023 15:06:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=a73XJllrLUOW4rijVf4fPmhYJpTUVZeSw5fTKVSanU4=; b=kDrF8HUxOfoy3o Hir1aXaJQFV+liAkSxezLFqhbZuklooiL04EmJ/IAyKZJU60fszK9IHeDuRFTkVwdAqKWu0ZX/E7Q 89yRm3W4Q+E6mVAlF16WLQcjCqfjp35alUrhW4RndhfBR5qvq+ypb4awECg1Z4plh5I3BMvR92uat B7pqcVE7ij17ngZHXPMjfH5EexSHPW6JnR5G9XwEiUxouksDDrId1vWpMMrMHmjNSQ/uMaP9MDTPm hsYdSoejLs4t1Ju48uvt2bjFc0PNjef0AV0QuF9gmTJBmsXmjtcfJSiz4g82Crn7SVGXb9tyzOoPR h7bO7xtY3OAtPxz05IUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxZ-00GFU7-2p; Sun, 07 May 2023 15:06:01 +0000 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxX-00GFS1-0o; Sun, 07 May 2023 15:06:00 +0000 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-304935cc79bso3402350f8f.2; Sun, 07 May 2023 08:05:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683471957; x=1686063957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J7busPrq4Ix2D0XVL7/yDg+1KY42O5SIQ2uX5rrJTys=; b=WJviFBiRpKKdvo1AbdVorv1k0LHGOVJgpFX4nC2Bi+cMQlqBqyIvX4pWyPQ9zWDuU5 bCfrjfVXnvCwV1yFR20U13u10aFZqJIv1e8E7idIxkNWP+oP3RPNIeZDFxbywq0ALqFO XccX3TebqOKg04UsHzW12VyT9FdtC2x1cMNTeSzFW4ZAuu2UoRb32QFv4/E/DPmO6lbv g/mm3cYM97lkrjN0F3nIQN1/SCU15/Uqc0p9v+SzQevYcmUwiNGJmVdmmS01sL/q4rx2 RxVFvOiun6xporcGtN8DaG7QRxYfkpA4E3SAEtvDkSTBsC7FHXxQbtrJSfND19PilENn lkDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683471957; x=1686063957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J7busPrq4Ix2D0XVL7/yDg+1KY42O5SIQ2uX5rrJTys=; b=WqvgDjpcA91ldrky7UWljG1hhmqc0qOtk5coFWl2/ItQ6eid3tnyItQwQKiQ57/r4d bSwdE72WNBDjmWiYw+vhOYgtZhfNqfc9tfZ+ru4CmxzIYEfXP7JgHWXbzFocoQM9ZLkc TJExOhAzbZIWpLWM4BdpaBleUrbagNi7s2tL5NF+9nyd7VH9ndsyyiyQddnvyQ2GLWls MUdLVbT9JPqNfWnpeVN6CMzczDljR0o4AxazeVqSFBZ793eyu1xsUKUGikpfcT2BBkfX K8ecV1qGJWMN9gdjd86896ZvnFZ+comRnQ09KfGqvL4hEuEDt9H7P77bKOsUVSSc/yPc JxvA== X-Gm-Message-State: AC+VfDyzqBw7qeraHTjWVGMDgj4YtUnBCMGVwMn3y3ONg4dtYAm370a1 1bJeCbQ0QOZn/HqyO6DGjAE= X-Google-Smtp-Source: ACHHUZ6Tgq00goUGd6cc5bfJap5ngrn1ZPs4mrdlVseReHkslpgNcCs6pqxjKm3kGw5VrEUK/xif5w== X-Received: by 2002:adf:f84b:0:b0:307:8b6f:dcff with SMTP id d11-20020adff84b000000b003078b6fdcffmr2923274wrq.37.1683471957047; Sun, 07 May 2023 08:05:57 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b0030771c6e443sm8437998wri.42.2023.05.07.08.05.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 08:05:56 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Maksim Kiselev , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 4/5] spi: sun6i: add support for R329/D1/R528/T113s SPI controllers Date: Sun, 7 May 2023 18:03:36 +0300 Message-Id: <20230507150345.1971083-5-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230507150345.1971083-1-bigunclemax@gmail.com> References: <20230507150345.1971083-1-bigunclemax@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230507_080559_286588_45304FB6 X-CRM114-Status: GOOD ( 13.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These SoCs has two SPI controllers. One of it is quite similar to previous ones, but with internal clock divider removed; the other added MIPI DBI Type-C offload based on the first one. Add basical support for these controllers. As we're not going to support the DBI functionality now, just implement the two kinds of controllers as the same. Co-developed-by: Icenowy Zheng Signed-off-by: Maksim Kiselev Reviewed-by: Andre Przywara --- drivers/spi/spi-sun6i.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index e4efab310469..02a3a4f2b3a0 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -738,9 +738,17 @@ static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = { .has_clk_ctl = true, }; +static const struct sun6i_spi_cfg sun50i_r329_spi_cfg = { + .fifo_depth = SUN8I_FIFO_DEPTH, +}; + static const struct of_device_id sun6i_spi_match[] = { { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg }, { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg }, + { + .compatible = "allwinner,sun50i-r329-spi", + .data = &sun50i_r329_spi_cfg + }, {} }; MODULE_DEVICE_TABLE(of, sun6i_spi_match); From patchwork Sun May 7 15:03:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 13233755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB7B8C77B7C for ; Sun, 7 May 2023 15:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=aZK9MbdU8Ro8SVvxfLbvm2Qo28To8u6QmYay5g1X9oI=; b=s4ZFmKjTMbZFV/ 9DyV34vGplIhNa5qw6XX5MTI3EgwqEPbQyijK4g2KYLR1eJT+NOkr32XrKPgeN8R4aXgsMC4Od38w 24GVYArYwlEMBEAG2dYRlRlgABLh2qLfqKXJ7s19jW2cjBONYPKKpxH+fv6hdWjvXIy1vjwX9W6J+ 2l20MLFcZc9O9rxW2E49MaYbR6fH/CRH2CjrznGy61kyFz5BbiG4HqD0lG6ZhNJxa3667U86TLNmN ambWScHn8XxVBF1Lq6FqNw5fFLprdPOSPSVM/csn/i/P0Ef5RWiUPBzXSdPqxif9leBvRHaBYuFZU 4waLLPKUhES6nGbyR8OA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxl-00GFax-0n; Sun, 07 May 2023 15:06:13 +0000 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pvfxg-00GFXR-2R; Sun, 07 May 2023 15:06:11 +0000 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-3063b5f32aaso2269111f8f.2; Sun, 07 May 2023 08:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683471967; x=1686063967; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ziv+62Y+GAylpM/ibpSxQKGKhNzMiq6MRDwumNWDsYk=; b=sRTmU8JbDncgX6NXneNlIuiUj6m6ACDXUTCTvC8rFEGY/QPS4SM8iQwXH/DSfPKc/K JQYtiAT+eOKtjCqorW6x+aQpfPEPIDq9FZiSVgNPkymU+XzUMkNki17jRHfHPQjfltWE 2FrvxzITEUZo/8nOnTmTxLc+Ghh0dXdKALZR7E1GyEXJkQVGQe3F34+mvWpeeTaJ0B4i 2DFcnEvEvVCBtSNWKA6EX2ZcrwFdlV32CV4Ij7HVvJEqIm5pvWDQ/LluaNxstTTMWYhO EgM7gNmxO2KFZBqBlHKhjmyvL2I6mYn/95rj85cljFIjkqIbRYV091+oNPDqRiPMFq2v CTrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683471967; x=1686063967; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ziv+62Y+GAylpM/ibpSxQKGKhNzMiq6MRDwumNWDsYk=; b=aUqHc2DggZqG0BkMApaYEJkyUBQbON37sgbZeGHtDREWwUUP5W9q5LLdSkUksYpDM6 FfqT2Qe+RV+XBHqNsOtE/N3XH6M/uLzIucNZv1/T1HuzQ0gWge6AvWT6Fk0zIJ0TD7rh LMVoKGFf/oMEjvX5REMsa82Mtrn+z9ZWTzqCJNjeCP0jyCda191Iup5vKKLf86AnB9au GwpSIBb+AUTp1KQz9HuGeyqXN4D5MFUEbJr/MF4yG9P26yMSJQcHejvEhLEsn3KZvl5x UaG2PXr/mWAJmU5mo2uNaadLjyZylpKXtgld83RtogMJLpk1gzblm15c61Cr7d8ORBwU UsMw== X-Gm-Message-State: AC+VfDxXHP3GtlVdE/pQhLCVReFpJj+75kDfwNZIPMv1W/mc4SlcXZxG M+muLWyebNGRcJGb589VIaw= X-Google-Smtp-Source: ACHHUZ6j8yqhFjZ0rqUBjPV5gzZfUrJxy8WXKvBq6Dbeit0CPEpd8ylflGfJYynkyLbuiKrRSZ46TA== X-Received: by 2002:adf:e341:0:b0:307:5097:ab60 with SMTP id n1-20020adfe341000000b003075097ab60mr5133166wrj.63.1683471966755; Sun, 07 May 2023 08:06:06 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id e15-20020a5d594f000000b0030771c6e443sm8437998wri.42.2023.05.07.08.06.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 May 2023 08:06:06 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Maksim Kiselev , Conor Dooley , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v4 5/5] riscv: dts: allwinner: d1: Add SPI controllers node Date: Sun, 7 May 2023 18:03:37 +0300 Message-Id: <20230507150345.1971083-6-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230507150345.1971083-1-bigunclemax@gmail.com> References: <20230507150345.1971083-1-bigunclemax@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230507_080608_791513_7049B44B X-CRM114-Status: GOOD ( 11.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some boards form the MangoPi family (MQ\MQ-Dual\MQ-R) may have an optional SPI flash that connects to the SPI0 controller. This controller is the same for R329/D1/R528/T113s SoCs and should be supported by the sun50i-r329-spi driver. So let's add its DT nodes. Signed-off-by: Maksim Kiselev Acked-by: Conor Dooley Reviewed-by: Andre Przywara --- .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 922e8e0e2c09..1bb1e5cae602 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -108,6 +108,12 @@ rmii_pe_pins: rmii-pe-pins { function = "emac"; }; + /omit-if-no-ref/ + spi0_pins: spi0-pins { + pins = "PC2", "PC3", "PC4", "PC5"; + function = "spi0"; + }; + /omit-if-no-ref/ uart1_pg6_pins: uart1-pg6-pins { pins = "PG6", "PG7"; @@ -447,6 +453,37 @@ mmc2: mmc@4022000 { #size-cells = <0>; }; + spi0: spi@4025000 { + compatible = "allwinner,sun20i-d1-spi", + "allwinner,sun50i-r329-spi"; + reg = <0x04025000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@4026000 { + compatible = "allwinner,sun20i-d1-spi-dbi", + "allwinner,sun50i-r329-spi-dbi", + "allwinner,sun50i-r329-spi"; + reg = <0x04026000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + usb_otg: usb@4100000 { compatible = "allwinner,sun20i-d1-musb", "allwinner,sun8i-a33-musb";