From patchwork Tue May 9 18:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chia-I Wu X-Patchwork-Id: 13236081 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FFACC7EE23 for ; Tue, 9 May 2023 18:33:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CBE710E133; Tue, 9 May 2023 18:33:28 +0000 (UTC) Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by gabe.freedesktop.org (Postfix) with ESMTPS id A212310E0A3; Tue, 9 May 2023 18:33:26 +0000 (UTC) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6463185f761so485842b3a.0; Tue, 09 May 2023 11:33:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683657205; x=1686249205; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=66XYrn3OxsOriMI735FsztsxhCcCNS7VnQ9CyIcun0k=; b=sD2zZgzdekBu3FUs7ZFXAQMXGzFhvP8+sBg6DAO4BZLNDpTCTmYNeGQU+UOojZofXJ xqyI9/Y1RjrFijaVMExTnl9BcPCd9enm5IyFR2hefmItlaUL7N2A1TJq3XAdbDK4rqFA FssWB9V1vzAKCl31twmjXh6+4OuXkvE6X4zjUTuUbCvOgfTsKWufrA7fMb8xYg551lOp C1/hL6gzqedWSlFvzv1KbFpQe9N3ociSmmTzu3Sn88X0/GTTVVTRlfyFF8ozDXL7IN4S gqwVCWpyNL7ZFwuIz8lWOgbXqO7RKq0IItC9rQZn1rh2vgcIdkcRfwY3qaG/DaU/vvZT S0KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683657205; x=1686249205; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=66XYrn3OxsOriMI735FsztsxhCcCNS7VnQ9CyIcun0k=; b=cyWXsCFFpALAeoTCRhbhLn489tZyS9F1SoxpCwYX4qvYOpm8dge8uEaN8E0iJejQsm gBADl9E/7jN98UJb+YfJRRmrPQgwl5PrxiQenK4+GVt1q6hov7n0e/D39lWl1fbGnW+C DrdS62C9xBeDR0GfK5mEZHsXNL1cyRL00sdC7zdjQbbLJvikRohSho+f006Qj3J2oCL8 NglSYJuqdJNV0sG8NTFTD5kFMnYQSbpHHGe9dowgVoyFze3oSJbUocX6laoS5q1dK9aE l4DiOC/Inybg5TzJfh1w9XNKIXVx0DzmwKgFRuLtOIiUfAbhiXyHYC16XrRq0HuAFI0N aDOA== X-Gm-Message-State: AC+VfDxfzZPdxCYgTxw21d7jyLGoZTEetIly7IfLtIeljIuMBYGcTMFk pLG8Wcn06KW6jHCVncMKozfFBQvQe4o= X-Google-Smtp-Source: ACHHUZ4rEOCYnDYqNb/IIjjLkiAa8OHVI4MvSoSXzD0ClVpDs5JvDmkrE1YCeIWLD/OeZ7J4npNQ8g== X-Received: by 2002:a17:903:41ca:b0:1a4:f4e6:b68 with SMTP id u10-20020a17090341ca00b001a4f4e60b68mr19020579ple.3.1683657205076; Tue, 09 May 2023 11:33:25 -0700 (PDT) Received: from olv-ct-22.c.googlers.com.com (217.108.125.34.bc.googleusercontent.com. [34.125.108.217]) by smtp.gmail.com with ESMTPSA id 13-20020a170902e9cd00b001ab0669d84csm1948277plk.26.2023.05.09.11.33.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 May 2023 11:33:24 -0700 (PDT) From: Chia-I Wu To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/2] amdgpu: validate drm_amdgpu_gem_va addrs for all ops Date: Tue, 9 May 2023 11:32:54 -0700 Message-ID: <20230509183301.1745462-1-olvaffe@gmail.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Philip Yang , Kefeng Wang , amd-gfx@lists.freedesktop.org, Arunpravin Paneer Selvam , Suren Baghdasaryan , Felix Kuehling , "Pan, Xinhui" , linux-kernel@vger.kernel.org, Mukul Joshi , =?utf-8?b?TWFyZWsgT2zFocOhaw==?= , Luben Tuikov , Yang Li , Danijel Slivka , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Extend the address and size validations to AMDGPU_VA_OP_UNMAP and AMDGPU_VA_OP_CLEAR by moving the validations to amdgpu_gem_va_ioctl. Internal users of amdgpu_vm_bo_map are no longer validated but they should be fine. Userspace (radeonsi and radv) seems fine as well. --- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 12 ++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 10 ---------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index d8e683688daab..071f6565cf971 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -681,6 +681,18 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, uint64_t vm_size; int r = 0; + if (args->va_address & ~PAGE_MASK || args->offset_in_bo & ~PAGE_MASK || + args->map_size & ~PAGE_MASK) { + dev_dbg(dev->dev, "unaligned va_address 0x%LX, offset_in_bo 0x%LX, or map_size 0x%LX\n", + args->va_address, args->offset_in_bo, args->map_size); + return -EINVAL; + } + + if (args->map_size == 0) { + dev_dbg(dev->dev, "invalid map_size 0x%LX\n", args->map_size); + return -EINVAL; + } + if (args->va_address < AMDGPU_VA_RESERVED_SIZE) { dev_dbg(dev->dev, "va_address 0x%LX is in reserved area 0x%LX\n", diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index b9441ab457ea7..fa5819d581655 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -1435,11 +1435,6 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, struct amdgpu_vm *vm = bo_va->base.vm; uint64_t eaddr; - /* validate the parameters */ - if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK || - size == 0 || size & ~PAGE_MASK) - return -EINVAL; - /* make sure object fit at this offset */ eaddr = saddr + size - 1; if (saddr >= eaddr || @@ -1501,11 +1496,6 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, uint64_t eaddr; int r; - /* validate the parameters */ - if (saddr & ~PAGE_MASK || offset & ~PAGE_MASK || - size == 0 || size & ~PAGE_MASK) - return -EINVAL; - /* make sure object fit at this offset */ eaddr = saddr + size - 1; if (saddr >= eaddr || From patchwork Tue May 9 18:32:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chia-I Wu X-Patchwork-Id: 13236082 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84B22C7EE23 for ; Tue, 9 May 2023 18:33:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DABB10E3C1; Tue, 9 May 2023 18:33:46 +0000 (UTC) Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15BAC10E3C3; Tue, 9 May 2023 18:33:42 +0000 (UTC) Received: by mail-pf1-x42d.google.com with SMTP id d2e1a72fcca58-645c4a0079dso569174b3a.1; Tue, 09 May 2023 11:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683657222; x=1686249222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i7PfYPe4eLOcjabfDmHF25blL1VDKiKWkJ3EDvbFzf8=; b=OUq+jY1cWxHDlHQVpMVYAxI7+5PjgOLZ/8dIIsVbA54+8JMpa8n77xaT3BaGQTHovS Qd00zDJyevC01SlA5D5Lv0ZXoe/MSEdVoKbxQtXQaPsrzIqSCVJyrCRNeAeD3CWz7o0N eiy6P8aLVFXuctqhyqry3WkAyX7m6/xAtiT2NZJTWCzRXdU/kDAj7uFiao9pEQ8mj6cU 5ECR9IF580WdZpsN/d611xfjjmKB3Sk8KRvhf5rxbRfB+j/ezFrWFe2XWdFI8GKmQAMK wcJmDJVQuFSo3btqpoODBEpCcOyVpLbSsCB5PMMOl6CaKVj3azWWmOJMCDONEHLxG/H9 34iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683657222; x=1686249222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i7PfYPe4eLOcjabfDmHF25blL1VDKiKWkJ3EDvbFzf8=; b=aHzkIJvFD+OZeGdXTgTCR0rRAYMQ0ztHQZ6H8ZasH42lMnFo1kfFFVjzvc6JY0Q/Qq lE6KZdIpDTLXry2sUmvks4lixvXAaKZ/hLtTQWvdJjNr1akFWXXASL4ZpU71S2X+yio0 DIBOlsS2/+c1bVX5hliyj18Ei1emv3HsdxnIquADN/RrAkYHLPyU44CMdVlRwzoIOSQ/ ICfCGSS6g6Vq05YIUwEMoKntovKRCw3EI8ca9kxzOIf/OB/izwbYVquhMXbB98L6oIMI EqWhVPLy8QQg1jhqbsT9SfgNUXZbYFCG5ALfKSr5YEyKbvmp6MY86+i0J6sl82F29/+f b3Ig== X-Gm-Message-State: AC+VfDzxEGN7UfCzusalNP/bTnE/KgkOPp0QukO3JtSC9jXMz8N5OayT 78x6TfLjsOmamnuhYflOq8HpDBNSqYTR3g== X-Google-Smtp-Source: ACHHUZ4ZMRUTtN6PGcyLIB307BJIMOx28+ffbqDtxYzDR9taPLU25CQwNbMZuwM0pgv+yb72EPBnmQ== X-Received: by 2002:a17:902:e74f:b0:19e:94ff:6780 with SMTP id p15-20020a170902e74f00b0019e94ff6780mr18970863plf.6.1683657216944; Tue, 09 May 2023 11:33:36 -0700 (PDT) Received: from olv-ct-22.c.googlers.com.com (217.108.125.34.bc.googleusercontent.com. [34.125.108.217]) by smtp.gmail.com with ESMTPSA id 13-20020a170902e9cd00b001ab0669d84csm1948277plk.26.2023.05.09.11.33.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 May 2023 11:33:36 -0700 (PDT) From: Chia-I Wu To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/2] amdgpu: validate drm_amdgpu_gem_va against overflows Date: Tue, 9 May 2023 11:32:55 -0700 Message-ID: <20230509183301.1745462-2-olvaffe@gmail.com> X-Mailer: git-send-email 2.40.1.521.gf1e218fcd8-goog In-Reply-To: <20230509183301.1745462-1-olvaffe@gmail.com> References: <20230509183301.1745462-1-olvaffe@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Philip Yang , Kefeng Wang , Jammy Zhou , Mukul Joshi , Suren Baghdasaryan , Felix Kuehling , "Pan, Xinhui" , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, =?utf-8?b?TWFy?= =?utf-8?b?ZWsgT2zFocOhaw==?= , Luben Tuikov , Yang Li , Danijel Slivka , Alex Deucher , Andrew Morton , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The existing validations are incorrect and insufficient. This is motivated by OOB access in amdgpu_vm_update_range when offset_in_bo+map_size overflows. Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use the VM map parameters") --- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 7 +++++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 ++---- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 071f6565cf971..36d5adfdf0f69 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -688,8 +688,11 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, return -EINVAL; } - if (args->map_size == 0) { - dev_dbg(dev->dev, "invalid map_size 0x%LX\n", args->map_size); + if (args->map_size == 0 || + args->va_address + args->map_size < args->va_address || + args->offset_in_bo + args->map_size < args->offset_in_bo) { + dev_dbg(dev->dev, "invalid map_size 0x%LX (va_address 0x%LX, offset_in_bo 0x%LX)\n", + args->map_size, args->va_address, args->offset_in_bo); return -EINVAL; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index fa5819d581655..cd0a0f06e11ef 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -1437,8 +1437,7 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev, /* make sure object fit at this offset */ eaddr = saddr + size - 1; - if (saddr >= eaddr || - (bo && offset + size > amdgpu_bo_size(bo)) || + if ((bo && offset + size > amdgpu_bo_size(bo)) || (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) return -EINVAL; @@ -1498,8 +1497,7 @@ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, /* make sure object fit at this offset */ eaddr = saddr + size - 1; - if (saddr >= eaddr || - (bo && offset + size > amdgpu_bo_size(bo)) || + if ((bo && offset + size > amdgpu_bo_size(bo)) || (eaddr >= adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT)) return -EINVAL;