From patchwork Wed May 10 22:53:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Couzens X-Patchwork-Id: 13237367 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B924E17FFB for ; Wed, 10 May 2023 22:55:53 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C7216EA2; Wed, 10 May 2023 15:55:50 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsir-0004Pe-1B; Wed, 10 May 2023 22:55:49 +0000 Date: Thu, 11 May 2023 00:53:55 +0200 From: Alexander Couzens To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 1/8] net: phy: realtek: rtl8221: allow to configure SERDES mode Message-ID: <302d982c5550f10d589735fc2e46cf27386c39f4.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Sender: daniel@makrotopia.org X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org The rtl8221 supports multiple SERDES modes: - SGMII - 2500base-x - HiSGMII Further it supports rate adaption on SERDES links to allow slow ethernet speeds (10/100/1000mbit) to work on 2500base-x/HiSGMII links without reducing the SERDES speed. When operating without rate adapters the SERDES link will follow the ethernet speed. Signed-off-by: Alexander Couzens Reviewed-by: Steen Hegelund --- drivers/net/phy/realtek.c | 55 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 3d99fd6664d7..a7dd5a075135 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -53,6 +53,15 @@ RTL8201F_ISR_LINK) #define RTL8201F_IER 0x13 +#define RTL8221B_MMD_SERDES_CTRL MDIO_MMD_VEND1 +#define RTL8221B_MMD_PHY_CTRL MDIO_MMD_VEND2 +#define RTL8221B_SERDES_OPTION 0x697a +#define RTL8221B_SERDES_OPTION_MODE_MASK GENMASK(5, 0) +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII 0 +#define RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII 1 +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2 +#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3 + #define RTL8366RB_POWER_SAVE 0x15 #define RTL8366RB_POWER_SAVE_ON BIT(12) @@ -849,6 +858,48 @@ static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev) return IRQ_HANDLED; } +static int rtl8221b_config_init(struct phy_device *phydev) +{ + u16 option_mode; + + switch (phydev->interface) { + case PHY_INTERFACE_MODE_2500BASEX: + if (!phydev->is_c45) { + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX; + break; + } + fallthrough; + case PHY_INTERFACE_MODE_SGMII: + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII; + break; + default: + return 0; + } + + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, + 0x75f3, 0); + + phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL, + RTL8221B_SERDES_OPTION, + RTL8221B_SERDES_OPTION_MODE_MASK, option_mode); + switch (option_mode) { + case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII: + case RTL8221B_SERDES_OPTION_MODE_2500BASEX: + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); + break; + case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII: + case RTL8221B_SERDES_OPTION_MODE_HISGMII: + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); + break; + } + + return 0; +} + static struct phy_driver realtek_drvs[] = { { PHY_ID_MATCH_EXACT(0x00008201), @@ -970,6 +1021,7 @@ static struct phy_driver realtek_drvs[] = { .name = "RTL8226B_RTL8221B 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -992,6 +1044,7 @@ static struct phy_driver realtek_drvs[] = { .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1002,6 +1055,7 @@ static struct phy_driver realtek_drvs[] = { .name = "RTL8221B-VB-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1012,6 +1066,7 @@ static struct phy_driver realtek_drvs[] = { .name = "RTL8221B-VM-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, From patchwork Wed May 10 22:54:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13237368 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2379B21CED for ; Wed, 10 May 2023 22:56:44 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F57E5FE7; Wed, 10 May 2023 15:56:34 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsjY-0004QI-1d; Wed, 10 May 2023 22:56:32 +0000 Date: Thu, 11 May 2023 00:54:36 +0200 From: Chukun Pan To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 2/8] net: phy: realtek: switch interface mode for RTL822x series Message-ID: <537a12131132614ce9600ca9370dab823a262347.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Sender: daniel@makrotopia.org X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org The RTL822x phy can work in Cisco SGMII and 2500BASE-X modes respectively. Add interface automatic switching MAC-side interface mode for RTL822x phy to match various wire speeds when using Clause-45 MDIO. Signed-off-by: Chukun Pan Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index a7dd5a075135..4a2c1ad02d48 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -684,6 +684,25 @@ static int rtl822x_config_aneg(struct phy_device *phydev) return __genphy_config_aneg(phydev, ret); } +static void rtl822x_update_interface(struct phy_device *phydev) +{ + /* Automatically switch SERDES interface between + * SGMII and 2500-BaseX according to speed. + */ + switch (phydev->speed) { + case SPEED_2500: + phydev->interface = PHY_INTERFACE_MODE_2500BASEX; + break; + case SPEED_1000: + case SPEED_100: + case SPEED_10: + phydev->interface = PHY_INTERFACE_MODE_SGMII; + break; + default: + break; + } +} + static int rtl822x_read_status(struct phy_device *phydev) { int ret; @@ -702,11 +721,14 @@ static int rtl822x_read_status(struct phy_device *phydev) phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL); } - ret = genphy_read_status(phydev); + ret = rtlgen_read_status(phydev); if (ret < 0) return ret; - return rtlgen_get_speed(phydev); + if (phydev->is_c45 && phydev->link) + rtl822x_update_interface(phydev); + + return 0; } static bool rtlgen_supports_2_5gbps(struct phy_device *phydev) From patchwork Wed May 10 22:55:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237369 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBFAE17FFB for ; Wed, 10 May 2023 22:57:25 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F8ED4690; Wed, 10 May 2023 15:57:17 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwskF-0004Qx-2b; Wed, 10 May 2023 22:57:16 +0000 Date: Thu, 11 May 2023 00:55:11 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 3/8] net: phy: realtek: use genphy_soft_reset for 2.5G PHYs Message-ID: <0c1e578a5b02fe49e1114ea75e3c6282eb230ad3.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Some vendor bootloaders do weird things with those PHYs which result in link modes being reported wrongly. Start from a clean sheet by resetting the PHY. Reported-by: Yevhen Kolomeiko Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 4a2c1ad02d48..0cf7846c9812 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -1038,6 +1038,7 @@ static struct phy_driver realtek_drvs[] = { .write_page = rtl821x_write_page, .read_mmd = rtl822x_read_mmd, .write_mmd = rtl822x_write_mmd, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc840), .name = "RTL8226B_RTL8221B 2.5Gbps PHY", @@ -1051,6 +1052,7 @@ static struct phy_driver realtek_drvs[] = { .write_page = rtl821x_write_page, .read_mmd = rtl822x_read_mmd, .write_mmd = rtl822x_write_mmd, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc838), .name = "RTL8226-CG 2.5Gbps PHY", @@ -1061,6 +1063,7 @@ static struct phy_driver realtek_drvs[] = { .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc848), .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", @@ -1072,6 +1075,7 @@ static struct phy_driver realtek_drvs[] = { .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc849), .name = "RTL8221B-VB-CG 2.5Gbps PHY", @@ -1083,6 +1087,7 @@ static struct phy_driver realtek_drvs[] = { .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc84a), .name = "RTL8221B-VM-CG 2.5Gbps PHY", @@ -1094,6 +1099,7 @@ static struct phy_driver realtek_drvs[] = { .resume = rtlgen_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .soft_reset = genphy_soft_reset, }, { PHY_ID_MATCH_EXACT(0x001cc961), .name = "RTL8366RB Gigabit Ethernet", From patchwork Wed May 10 22:58:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237375 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29C46182AC for ; Wed, 10 May 2023 23:00:07 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E64F9E64; Wed, 10 May 2023 16:00:05 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsmy-0004U1-1A; Wed, 10 May 2023 23:00:04 +0000 Date: Thu, 11 May 2023 00:58:10 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 4/8] net: phy: realtek: disable SGMII in-band AN for 2.5G PHYs Message-ID: <574c9703523af5643af0623144db3aa385635e84.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org MAC drivers don't use SGMII in-band autonegotiation unless told to do so in device tree using 'managed = "in-band-status"'. When using MDIO to access a PHY, in-band-status is unneeded as we have link-status via MDIO. Switch off SGMII in-band autonegotiation using magic values. Reported-by: Chen Minqiang Reported-by: Chukun Pan Reported-by: Yevhen Kolomeiko Tested-by: Yevhen Kolomeiko Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 0cf7846c9812..acadb6f0057b 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -666,7 +666,7 @@ static int rtl822x_get_features(struct phy_device *phydev) static int rtl822x_config_aneg(struct phy_device *phydev) { - int ret = 0; + int val, ret = 0; if (phydev->autoneg == AUTONEG_ENABLE) { u16 adv2500 = 0; @@ -681,6 +681,19 @@ static int rtl822x_config_aneg(struct phy_device *phydev) return ret; } + /* MACs using phylink assume SGMII in-band status is not used. + * Keep things as they are for MACs not using phylink such as + * RealTek PCIe chips which come with built-in PHYs + */ + if (phydev->phylink) { + /* Disable SGMII AN */ + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7588, 0x2); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7589, 0x71d0); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587, 0x3); + phy_read_mmd_poll_timeout(phydev, RTL8221B_MMD_SERDES_CTRL, 0x7587, + val, !(val & BIT(0)), 500, 100000, false); + } + return __genphy_config_aneg(phydev, ret); } From patchwork Wed May 10 22:58:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237376 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AA9921CED for ; Wed, 10 May 2023 23:00:47 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0A6610F5; Wed, 10 May 2023 16:00:39 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsnU-0004Uo-0h; Wed, 10 May 2023 23:00:36 +0000 Date: Thu, 11 May 2023 00:58:42 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 5/8] net: phy: realtek: make sure paged read is protected by mutex Message-ID: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org As we cannot rely on phy_read_paged function before the PHY is identified, the paged read in rtlgen_supports_2_5gbps needs to be open coded as it is being called by the match_phy_device function, ie. before .read_page and .write_page have been populated. Make sure it is also protected by the MDIO bus mutex and use rtl821x_write_page instead of 3 individually locked MDIO bus operations. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index acadb6f0057b..e6a46c4d97b1 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -744,9 +744,11 @@ static bool rtlgen_supports_2_5gbps(struct phy_device *phydev) { int val; - phy_write(phydev, RTL821x_PAGE_SELECT, 0xa61); - val = phy_read(phydev, 0x13); - phy_write(phydev, RTL821x_PAGE_SELECT, 0); + phy_lock_mdio_bus(phydev); + rtl821x_write_page(phydev, 0xa61); + val = __phy_read(phydev, 0x13); + rtl821x_write_page(phydev, 0); + phy_unlock_mdio_bus(phydev); return val >= 0 && val & RTL_SUPPORTS_2500FULL; } From patchwork Wed May 10 22:59:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237377 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D24F21CED for ; Wed, 10 May 2023 23:01:19 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 200DB40EB; Wed, 10 May 2023 16:01:07 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsny-0004VH-0l; Wed, 10 May 2023 23:01:06 +0000 Date: Thu, 11 May 2023 00:59:12 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 6/8] net: phy: realtek: use inline functions for 10GbE advertisement Message-ID: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Use existing generic inline functions to encode local advertisement of 10GbE link modes as well as to decode link-partner advertisement. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index e6a46c4d97b1..cde61a30ac4c 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -68,10 +68,6 @@ #define RTL_SUPPORTS_5000FULL BIT(14) #define RTL_SUPPORTS_2500FULL BIT(13) #define RTL_SUPPORTS_10000FULL BIT(0) -#define RTL_ADV_2500FULL BIT(7) -#define RTL_LPADV_10000FULL BIT(11) -#define RTL_LPADV_5000FULL BIT(6) -#define RTL_LPADV_2500FULL BIT(5) #define RTL9000A_GINMR 0x14 #define RTL9000A_GINMR_LINK_STATUS BIT(4) @@ -669,14 +665,11 @@ static int rtl822x_config_aneg(struct phy_device *phydev) int val, ret = 0; if (phydev->autoneg == AUTONEG_ENABLE) { - u16 adv2500 = 0; - - if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, - phydev->advertising)) - adv2500 = RTL_ADV_2500FULL; - ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12, - RTL_ADV_2500FULL, adv2500); + MDIO_AN_10GBT_CTRL_ADV10G | + MDIO_AN_10GBT_CTRL_ADV5G | + MDIO_AN_10GBT_CTRL_ADV2_5G, + linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising)); if (ret < 0) return ret; } @@ -722,12 +715,7 @@ static int rtl822x_read_status(struct phy_device *phydev) if (lpadv < 0) return lpadv; - linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, - phydev->lp_advertising, lpadv & RTL_LPADV_10000FULL); - linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, - phydev->lp_advertising, lpadv & RTL_LPADV_5000FULL); - linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, - phydev->lp_advertising, lpadv & RTL_LPADV_2500FULL); + mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv); } ret = rtlgen_read_status(phydev); From patchwork Wed May 10 22:59:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237378 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0EE51E50D for ; Wed, 10 May 2023 23:01:46 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81A1F49D9; Wed, 10 May 2023 16:01:42 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwsoW-0004Vu-2l; Wed, 10 May 2023 23:01:41 +0000 Date: Thu, 11 May 2023 00:59:46 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 7/8] net: phy: realtek: check validity of 10GbE link-partner advertisement Message-ID: <3722c3cf286bdaf89343c6d9e552d3eef79a2557.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Only use link-partner advertisement bits for 10GbE modes if they are actually valid. Check LOCALOK and REMOTEOK bits and clear 10GbE modes unless both of them are set. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index cde61a30ac4c..29168f98f451 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -715,6 +715,10 @@ static int rtl822x_read_status(struct phy_device *phydev) if (lpadv < 0) return lpadv; + if (!(lpadv & MDIO_AN_10GBT_STAT_REMOK) || + !(lpadv & MDIO_AN_10GBT_STAT_LOCOK)) + lpadv = 0; + mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv); } From patchwork Wed May 10 23:00:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13237379 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0A0121CED for ; Wed, 10 May 2023 23:02:28 +0000 (UTC) Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D06305249; Wed, 10 May 2023 16:02:26 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pwspE-0004Wg-2T; Wed, 10 May 2023 23:02:25 +0000 Date: Thu, 11 May 2023 01:00:21 +0200 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , AngeloGioacchino Del Regno Subject: [PATCH net-next 8/8] net: phy: realtek: setup ALDPS on RTL8221B Message-ID: <701034ea45c08db557af926a5a44113e4e45c634.1683756691.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Setup Link Down Power Saving Mode according the DTS property just like for RTL821x 1GE PHYs. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 29168f98f451..b5d7208004d8 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -62,6 +62,10 @@ #define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2 #define RTL8221B_SERDES_OPTION_MODE_HISGMII 3 +#define RTL8221B_PHYCR1 0xa430 +#define RTL8221B_PHYCR1_ALDPS_EN BIT(2) +#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12) + #define RTL8366RB_POWER_SAVE 0x15 #define RTL8366RB_POWER_SAVE_ON BIT(12) @@ -757,6 +761,25 @@ static int rtl8226_match_phy_device(struct phy_device *phydev) rtlgen_supports_2_5gbps(phydev); } +static int rtl822x_probe(struct phy_device *phydev) +{ + struct device *dev = &phydev->mdio.dev; + int val; + + val = phy_read_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1); + if (val < 0) + return val; + + if (of_property_read_bool(dev->of_node, "realtek,aldps-enable")) + val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN; + else + val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN); + + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1, val); + + return 0; +} + static int rtlgen_resume(struct phy_device *phydev) { int ret = genphy_resume(phydev); @@ -1034,6 +1057,7 @@ static struct phy_driver realtek_drvs[] = { .match_phy_device = rtl8226_match_phy_device, .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1048,6 +1072,7 @@ static struct phy_driver realtek_drvs[] = { .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, .config_init = rtl8221b_config_init, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1061,6 +1086,7 @@ static struct phy_driver realtek_drvs[] = { .name = "RTL8226-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1073,6 +1099,7 @@ static struct phy_driver realtek_drvs[] = { .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, .config_init = rtl8221b_config_init, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1085,6 +1112,7 @@ static struct phy_driver realtek_drvs[] = { .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, .config_init = rtl8221b_config_init, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume, @@ -1097,6 +1125,7 @@ static struct phy_driver realtek_drvs[] = { .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, .config_init = rtl8221b_config_init, + .probe = rtl822x_probe, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume,