From patchwork Thu May 11 16:55:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2856C7EE22 for ; Thu, 11 May 2023 16:55:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E4FBB10E55A; Thu, 11 May 2023 16:55:46 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 83D5110E52A for ; Thu, 11 May 2023 16:55:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824143; x=1715360143; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=KsiZhqe20foDB8hRMOWSqIKbI363KrGjEUeyHM0ahrg=; b=RbQ1GviUcPiDi0nmATvP0hr1mPJNjJa0szeXPdOSodTqemRDooU67Vgl z73hubdI2PjT3PKsI4gf+ALDb1/tDv1oOnjsHZuBDD2O2IqPyXDh5vnc9 RTYu2xKH0FIsv9xQbTRTtx41kqYQ2nTsERJzW3S2xB5C24CJyQ8KnSWLr YW65guzmBPCDgMgT/uW2JNwB2BRolLY9y1tugkAL7mPot92jE1ZEPnJ9i 99hzJxx03rLaAGeFMFyM6YT32kS7AUXndY9xe8jHjM/YQi2t6U7Nt+VqW FtgO2ERkZDAW0yDnXY5Vvq3B5t+P/Y9tMRlAZmSWlEoAzLleRvIduRgH7 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="348042940" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="348042940" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="824049594" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="824049594" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga004.jf.intel.com with SMTP; 11 May 2023 09:55:38 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:37 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:28 +0300 Message-Id: <20230511165534.10266-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/7] drm/i915: Remove bogus DDI-F from hsw/bdw output init X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä HSW/BDW don't have DDI-F so don't go looking for one. Seems to have been accidentally left behind when the skl+ stuff got split out in commit 097d9e902068 ("drm/i915/display: remove strap checks from gen 9"). Signed-off-by: Ville Syrjälä Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_display.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1d5d42a40803..c1e0d439db79 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7429,8 +7429,6 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) intel_ddi_init(dev_priv, PORT_C); if (found & SFUSE_STRAP_DDID_DETECTED) intel_ddi_init(dev_priv, PORT_D); - if (found & SFUSE_STRAP_DDIF_DETECTED) - intel_ddi_init(dev_priv, PORT_F); } else if (HAS_PCH_SPLIT(dev_priv)) { int found; From patchwork Thu May 11 16:55:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C963AC77B7C for ; Thu, 11 May 2023 16:55:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E6D110E52A; Thu, 11 May 2023 16:55:48 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7CFE710E52A for ; Thu, 11 May 2023 16:55:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824144; x=1715360144; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Y3GpyJbpPfs0lA2GiYyNGqFfnK8iEmrqkcBQX9jdkYo=; b=MiG2EdzBRHI5XoWrnvRfdWgQ7TSzDthUIDqZ3mqOwLouupdLCis10H26 cz5nm83z0b8NcLUHF/BTqSPWhq+K254iXQJ0lg5HGUwCumCEELNGYUpxB 4PL0Bfixi7qnhgqjWGf3GIwQMQlCavNgTCPNFk74OTDcBWNkzJgQaOmwL 2XUL4pK/D+tSvqc3CyGXJW+ppoDCcTmuPBWLpr9etnH5gnJBYImIyt4sQ n+GbpBUH849qBXfgvndggq3WW17uhB3WywaJyy9Ybe6/oZr+oLuQtFFUA DAhyIyzwUwtGm3d9qxSElKG+PP0rpKlun0RFO3R/0sNgwfzuwOYRbtZwY A==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796175" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796175" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319528" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319528" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:41 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:41 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:29 +0300 Message-Id: <20230511165534.10266-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/7] drm/i915: Introduce device info port_mask X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Declare the available DVO/SDVO/HDMI/DP/DDI ports in the device info. The other outputs (LVDS/TV/DSI/VGA) are left out since for most of them we don't consider them as "ports". DSI we should probably perhaps include somehow in the device info. Just not sure how. Or we just introduce a HAS_DSI() and call it a day? TODO: figure out what to do about the subplatform stuff. Would it be better to declare those directly with a different device info or not? Also not sure the icl port-f stuff matters even. Bspec claims there are icl SKUs with far less ports than that and we don't seem to check for those either? Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_pci.c | 33 ++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_device_info.c | 5 ++++ drivers/gpu/drm/i915/intel_device_info.h | 1 + 3 files changed, 39 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 72dd7b9f6dfd..46511a0fbc3e 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -256,29 +256,34 @@ static const struct intel_device_info i830_info = { I830_FEATURES, PLATFORM(INTEL_I830), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */ }; static const struct intel_device_info i845g_info = { I845_FEATURES, PLATFORM(INTEL_I845G), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */ }; static const struct intel_device_info i85x_info = { I830_FEATURES, PLATFORM(INTEL_I85X), .__runtime.fbc_mask = BIT(INTEL_FBC_A), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */ }; static const struct intel_device_info i865g_info = { I845_FEATURES, PLATFORM(INTEL_I865G), .__runtime.fbc_mask = BIT(INTEL_FBC_A), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */ }; #define GEN3_FEATURES \ GEN(3), \ .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \ + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */ \ .display.has_gmch = 1, \ .gpu_reset_clobbers_display = true, \ .__runtime.platform_engine_mask = BIT(RCS0), \ @@ -391,6 +396,7 @@ static const struct intel_device_info pnv_m_info = { static const struct intel_device_info i965g_info = { GEN4_FEATURES, PLATFORM(INTEL_I965G), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */ .display.has_overlay = 1, .hws_needs_physical = 1, .has_snoop = false, @@ -401,6 +407,7 @@ static const struct intel_device_info i965gm_info = { PLATFORM(INTEL_I965GM), .is_mobile = 1, .__runtime.fbc_mask = BIT(INTEL_FBC_A), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */ .display.has_overlay = 1, .display.supports_tv = 1, .hws_needs_physical = 1, @@ -410,6 +417,7 @@ static const struct intel_device_info i965gm_info = { static const struct intel_device_info g45_info = { GEN4_FEATURES, PLATFORM(INTEL_G45), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */ .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), .gpu_reset_clobbers_display = false, }; @@ -419,6 +427,7 @@ static const struct intel_device_info gm45_info = { PLATFORM(INTEL_GM45), .is_mobile = 1, .__runtime.fbc_mask = BIT(INTEL_FBC_A), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */ .display.supports_tv = 1, .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), .gpu_reset_clobbers_display = false, @@ -428,6 +437,7 @@ static const struct intel_device_info gm45_info = { GEN(5), \ .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \ + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \ .display.has_hotplug = 1, \ .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \ .has_3d_pipeline = 1, \ @@ -461,6 +471,7 @@ static const struct intel_device_info ilk_m_info = { GEN(6), \ .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \ + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \ .display.has_hotplug = 1, \ .__runtime.fbc_mask = BIT(INTEL_FBC_A), \ .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ @@ -516,6 +527,7 @@ static const struct intel_device_info snb_m_gt2_info = { GEN(7), \ .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), \ + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */ \ .display.has_hotplug = 1, \ .__runtime.fbc_mask = BIT(INTEL_FBC_A), \ .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ @@ -582,6 +594,7 @@ static const struct intel_device_info vlv_info = { .is_lp = 1, .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C), /* HDMI/DP B/C */ .has_runtime_pm = 1, .has_rc6 = 1, .has_reset_engine = true, @@ -609,6 +622,7 @@ static const struct intel_device_info vlv_info = { .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \ .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \ + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E), \ .display.has_ddi = 1, \ .display.has_fpga_dbg = 1, \ .display.has_dp_mst = 1, \ @@ -679,6 +693,7 @@ static const struct intel_device_info chv_info = { GEN(8), .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), + .__runtime.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */ .display.has_hotplug = 1, .is_lp = 1, .__runtime.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), @@ -761,6 +776,7 @@ static const struct intel_device_info skl_gt4_info = { .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \ BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \ + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), \ .has_3d_pipeline = 1, \ .has_64bit_reloc = 1, \ .display.has_ddi = 1, \ @@ -900,6 +916,7 @@ static const struct intel_device_info cml_gt2_info = { static const struct intel_device_info icl_info = { GEN11_FEATURES, PLATFORM(INTEL_ICELAKE), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E), .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), }; @@ -907,6 +924,7 @@ static const struct intel_device_info icl_info = { static const struct intel_device_info ehl_info = { GEN11_FEATURES, PLATFORM(INTEL_ELKHARTLAKE), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0), .__runtime.ppgtt_size = 36, }; @@ -914,6 +932,7 @@ static const struct intel_device_info ehl_info = { static const struct intel_device_info jsl_info = { GEN11_FEATURES, PLATFORM(INTEL_JASPERLAKE), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0), .__runtime.ppgtt_size = 36, }; @@ -952,6 +971,8 @@ static const struct intel_device_info jsl_info = { static const struct intel_device_info tgl_info = { GEN12_FEATURES, PLATFORM(INTEL_TIGERLAKE), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | + BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4) | BIT(PORT_TC5) | BIT(PORT_TC5), .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), }; @@ -963,6 +984,8 @@ static const struct intel_device_info rkl_info = { .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | + BIT(PORT_TC1) | BIT(PORT_TC2), .display.has_hti = 1, .display.has_psr_hw_tracking = 0, .__runtime.platform_engine_mask = @@ -983,6 +1006,8 @@ static const struct intel_device_info dg1_info = { .__runtime.graphics.ip.rel = 10, PLATFORM(INTEL_DG1), .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | + BIT(PORT_TC1) | BIT(PORT_TC2), .require_force_probe = 1, .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | @@ -995,6 +1020,8 @@ static const struct intel_device_info adl_s_info = { GEN12_FEATURES, PLATFORM(INTEL_ALDERLAKE_S), .__runtime.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), + .__runtime.port_mask = BIT(PORT_A) | + BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4), .display.has_hti = 1, .display.has_psr_hw_tracking = 0, .__runtime.platform_engine_mask = @@ -1050,6 +1077,8 @@ static const struct intel_device_info adl_p_info = { .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | + BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4), .display.has_cdclk_crawl = 1, .display.has_psr_hw_tracking = 0, .__runtime.platform_engine_mask = @@ -1137,6 +1166,8 @@ static const struct intel_device_info dg2_info = { XE_LPD_FEATURES, .__runtime.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C) | BIT(TRANSCODER_D), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D_XELPD) | + BIT(PORT_TC1), }; static const struct intel_device_info ats_m_info = { @@ -1214,6 +1245,8 @@ static const struct intel_device_info mtl_info = { .max_pat_index = 4, .__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM, .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0), + .__runtime.port_mask = BIT(PORT_A) | BIT(PORT_B) | + BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4), .require_force_probe = 1, MTL_CACHELEVEL, }; diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 4e23be2995bf..bb10e8e78a94 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -259,15 +259,19 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915) if (find_devid(devid, subplatform_ult_ids, ARRAY_SIZE(subplatform_ult_ids))) { mask = BIT(INTEL_SUBPLATFORM_ULT); + if (IS_HASWELL(i915) || IS_BROADWELL(i915)) + RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D); } else if (find_devid(devid, subplatform_ulx_ids, ARRAY_SIZE(subplatform_ulx_ids))) { mask = BIT(INTEL_SUBPLATFORM_ULX); if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { /* ULX machines are also considered ULT. */ mask |= BIT(INTEL_SUBPLATFORM_ULT); + RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D); } } else if (find_devid(devid, subplatform_portf_ids, ARRAY_SIZE(subplatform_portf_ids))) { + RUNTIME_INFO(i915)->port_mask |= BIT(PORT_F); mask = BIT(INTEL_SUBPLATFORM_PORTF); } else if (find_devid(devid, subplatform_uy_ids, ARRAY_SIZE(subplatform_uy_ids))) { @@ -541,6 +545,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) memset(&info->display, 0, sizeof(info->display)); runtime->cpu_transcoder_mask = 0; + runtime->port_mask = 0; memset(runtime->num_sprites, 0, sizeof(runtime->num_sprites)); memset(runtime->num_scalers, 0, sizeof(runtime->num_scalers)); runtime->fbc_mask = 0; diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 959a4080840c..9001e4c2a469 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -253,6 +253,7 @@ struct intel_runtime_info { struct { u8 pipe_mask; u8 cpu_transcoder_mask; + u16 port_mask; /* DVO/sDVO/DP/HDMI/DDI ports */ u8 num_sprites[I915_MAX_PIPES]; u8 num_scalers[I915_MAX_PIPES]; From patchwork Thu May 11 16:55:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E45DFC7EE23 for ; Thu, 11 May 2023 16:55:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F20110E576; Thu, 11 May 2023 16:55:51 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id C009110E52A for ; Thu, 11 May 2023 16:55:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824146; x=1715360146; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=sb+kGwebVjrA7dPjhiGPz5tYFQ09MkFvCJKGU+EFahc=; b=l7anjUkuDWOF28hVmpYae5pZyC1hkB2gtJ2AX3/Mo/FyXlKZQxbo+0a3 z1L/hColHGUizWxjI3mviA17ruw2Uvy1ehqm1L00I8Wa654PwVgZuebQu WTFbQB6A6rBJvR8vEXcUaxdh7Ro0WXjYbnHWWM/KCXg4nUgU3DuQjC1UH FO58+Jcs7o8kIEVuhey0I9TK6fAqCffJQmKLFiWR4LYrMlFIYadKmzwTe jYhe2pJYk5OjQwz53vXCcfhjKRNfbxmdZG+SivIde4QFQIbgagyWIcJfh xZsXgQfnVdcHjzR6jBeMaeldIXLa3hZa+mXsgvF6LIyF1eNU8L87uFHaB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796192" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796192" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319540" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319540" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:44 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:43 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:30 +0300 Message-Id: <20230511165534.10266-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/7] drm/i915: Assert that device info bitmasks have enough bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Sprinkle in some BUILD_BUG_ON()s to make sure some of the bitmasks used in the device info have enough bits. Do we have a better place for this sort of stuff? Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_device_info.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index bb10e8e78a94..ce257446b712 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -414,6 +414,10 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv); enum pipe pipe; + BUILD_BUG_ON(BITS_PER_TYPE(runtime->pipe_mask) < I915_MAX_PIPES); + BUILD_BUG_ON(BITS_PER_TYPE(runtime->cpu_transcoder_mask) < I915_MAX_TRANSCODERS); + BUILD_BUG_ON(BITS_PER_TYPE(runtime->port_mask) < I915_MAX_PORTS); + /* Wa_14011765242: adl-s A0,A1 */ if (IS_ADLS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A2)) for_each_pipe(dev_priv, pipe) From patchwork Thu May 11 16:55:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65832C7EE22 for ; Thu, 11 May 2023 16:55:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7DE3210E578; Thu, 11 May 2023 16:55:51 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id AD09710E576 for ; Thu, 11 May 2023 16:55:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824149; x=1715360149; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=F9INtxP3/KbxKI+UDWTCJsBsttY8EgXGx6hAmNYkY0w=; b=EjeYTSsL5LwWOW56UPE5Ouk13k5lIEjd8J6ak8DxZmj0ZWV6Ryc14PLW +vOuzdCqIKWO5Vr7Dhs+I7GSQLfbkIcqUiODjBQE785IDz/EBB9zL+6Wk Y9Db+KMSM+U/PVaXi/YJnb5DSBfJFHLWxw4qgGv1rbcXMj9Uruian5nQY /NOGHyeduwzGG2aKLhcCQgx+QaFlUBztflJfaHes+Fn7MsKnonpgl+WGF qCpbZC23rSe3/VQiMv5bnGQbvQklXveTmaCVggiYY4bRpoY18lM+u3Lbw iM+D++3CgtBVJpdJjN9kNLGGHQZnawPqwLXQMJtBnSX//1TKuxwp3V+Ei g==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796208" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796208" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319552" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319552" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:47 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:46 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:31 +0300 Message-Id: <20230511165534.10266-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/7] drm/i915: Assert that the port being initialized is valid X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Sprinkle some asserts to catch any mishaps in the port_mask vs. output init. For DDI/DP/HDMI/SDVO I decided that we want to bail out for an invalid port since those are the encoder types where we might want consider driving the whole thing from the VBT child device list, and bogus VBTs could be a real issue (if for no other reason than the i915.vbt_firmware). For DVO and HSW/BDW CRT port I just threw the assert in there for good measure. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/g4x_dp.c | 3 +++ drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +++ drivers/gpu/drm/i915/display/intel_crt.c | 2 ++ drivers/gpu/drm/i915/display/intel_ddi.c | 3 +++ drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++ drivers/gpu/drm/i915/display/intel_display.h | 2 ++ drivers/gpu/drm/i915/display/intel_dvo.c | 2 ++ drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +++ 8 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c index 920d570f7594..493aaa5e0dfb 100644 --- a/drivers/gpu/drm/i915/display/g4x_dp.c +++ b/drivers/gpu/drm/i915/display/g4x_dp.c @@ -1259,6 +1259,9 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv, struct drm_encoder *encoder; struct intel_connector *intel_connector; + if (!assert_port_valid(dev_priv, port)) + return false; + devdata = intel_bios_encoder_data_lookup(dev_priv, port); /* FIXME bail? */ diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c index 5c187e6e0472..59704939c111 100644 --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c @@ -667,6 +667,9 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv, struct intel_encoder *intel_encoder; struct intel_connector *intel_connector; + if (!assert_port_valid(dev_priv, port)) + return; + devdata = intel_bios_encoder_data_lookup(dev_priv, port); /* FIXME bail? */ diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index f0f4897b3c3c..753ce2d5d2db 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -1061,6 +1061,8 @@ void intel_crt_init(struct drm_i915_private *dev_priv) } if (HAS_DDI(dev_priv)) { + assert_port_valid(dev_priv, PORT_E); + crt->base.port = PORT_E; crt->base.get_config = hsw_crt_get_config; crt->base.get_hw_state = intel_ddi_get_hw_state; diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 0ba5492c0604..a5ca4b9d1e3e 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4668,6 +4668,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) bool init_hdmi, init_dp; enum phy phy = intel_port_to_phy(dev_priv, port); + if (!assert_port_valid(dev_priv, port)) + return; + /* * On platforms with HTI (aka HDPORT), if it's enabled at boot it may * have taken over some of the PHYs and made them unavailable to the diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c1e0d439db79..a96714ea752a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7334,6 +7334,12 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv) return true; } +bool assert_port_valid(struct drm_i915_private *i915, enum port port) +{ + return !drm_WARN(&i915->drm, !(RUNTIME_INFO(i915)->port_mask & BIT(port)), + "Platform does not support port %c\n", port_name(port)); +} + void intel_setup_outputs(struct drm_i915_private *dev_priv) { struct intel_encoder *encoder; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index ac95961f68ba..a01af95ffa2e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -538,6 +538,8 @@ void assert_transcoder(struct drm_i915_private *dev_priv, #define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true) #define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false) +bool assert_port_valid(struct drm_i915_private *i915, enum port port); + /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and * WARN_ON()) for hw state sanity checks to check for unexpected conditions * which may not necessarily be a user visible problem. This will either diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c index 9884678743b6..b386894c3a6d 100644 --- a/drivers/gpu/drm/i915/display/intel_dvo.c +++ b/drivers/gpu/drm/i915/display/intel_dvo.c @@ -509,6 +509,8 @@ void intel_dvo_init(struct drm_i915_private *i915) return; } + assert_port_valid(i915, intel_dvo->dev.port); + encoder->type = INTEL_OUTPUT_DVO; encoder->power_domain = POWER_DOMAIN_PORT_OTHER; encoder->port = intel_dvo->dev.port; diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 34ee9dd82a78..6ed613558cf8 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -3330,6 +3330,9 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv, struct intel_sdvo *intel_sdvo; int i; + if (!assert_port_valid(dev_priv, port)) + return false; + assert_sdvo_port_valid(dev_priv, port); intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); From patchwork Thu May 11 16:55:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3B48C7EE26 for ; Thu, 11 May 2023 16:55:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A45D110E57B; Thu, 11 May 2023 16:55:54 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8834810E579 for ; Thu, 11 May 2023 16:55:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824152; x=1715360152; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=6wLVoQf8/QKzaL8YtzHTyYks67FNWg3ICAI79HyYAiE=; b=O2IBxrsYPr/vkjKP9zelYOLQFP+aWgAk6ThBLxAQRvsahR+b7MtDB8Vz QTVpPDa3G01xe9XtyzE7j1FhlxiUFBeh197K10ufMfk+d+5rfIC/QQVIM hk8c6nQ8tJKB9qlDU/vO7dXFsDpKLqYdjuKpx8IL9ztKOW3nY4jnyP70Z R81cOvIr9AvQiq/QBBiwl2YTlYebHtxp4iPUvNbWAYG7hbtn6yC1zmoId wOapdbpmHN6Y14l1C+PUzDNW0LtsdMW0CFnp5JoMpf13VnaVjGOOigwZT WVH8cBLtaTLqJmLzOxiLm6M0Bdix+xqanHBqTh1XGN65/3Y4PSC3l0YYw A==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796226" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796226" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319562" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319562" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:50 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:49 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:32 +0300 Message-Id: <20230511165534.10266-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/7] drm/i915: Beef up SDVO/HDMI port checks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The SDVO code already warns when the port in question doesn't actually support SDVO. Let's make that also bail the encoder registration like the generic assert_port_valid() we added. And add a similar thing for g4x HDMI, mainly because on g4x itsefl port D only supports DP but not SDVO/HDMI. For the other platforms the generic port_mask check should actually be sufficient, but since we're here might as well list the ports. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/g4x_hdmi.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/display/intel_sdvo.c | 17 ++++++++++++----- 2 files changed, 29 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c index 59704939c111..8c71e3ede680 100644 --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c @@ -659,6 +659,20 @@ int g4x_hdmi_connector_atomic_check(struct drm_connector *connector, return ret; } +static bool is_hdmi_port_valid(struct drm_i915_private *i915, enum port port) +{ + if (IS_G4X(i915) || IS_VALLEYVIEW(i915)) + return port == PORT_B || port == PORT_C; + else + return port == PORT_B || port == PORT_C || port == PORT_D; +} + +static bool assert_hdmi_port_valid(struct drm_i915_private *i915, enum port port) +{ + return !drm_WARN(&i915->drm, !is_hdmi_port_valid(i915, port), + "Platform does not support HDMI %c\n", port_name(port)); +} + void g4x_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg, enum port port) { @@ -670,6 +684,9 @@ void g4x_hdmi_init(struct drm_i915_private *dev_priv, if (!assert_port_valid(dev_priv, port)) return; + if (!assert_hdmi_port_valid(dev_priv, port)) + return; + devdata = intel_bios_encoder_data_lookup(dev_priv, port); /* FIXME bail? */ diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 6ed613558cf8..e6b140b073c3 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -3314,13 +3314,19 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, return i2c_add_adapter(&sdvo->ddc) == 0; } -static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv, - enum port port) +static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port) { if (HAS_PCH_SPLIT(dev_priv)) - drm_WARN_ON(&dev_priv->drm, port != PORT_B); + return port == PORT_B; else - drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C); + return port == PORT_B || port == PORT_C; +} + +static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv, + enum port port) +{ + return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port), + "Platform does not support SDVO %c\n", port_name(port)); } bool intel_sdvo_init(struct drm_i915_private *dev_priv, @@ -3333,7 +3339,8 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv, if (!assert_port_valid(dev_priv, port)) return false; - assert_sdvo_port_valid(dev_priv, port); + if (!assert_sdvo_port_valid(dev_priv, port)) + return false; intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); if (!intel_sdvo) From patchwork Thu May 11 16:55:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D24B6C7EE22 for ; Thu, 11 May 2023 16:55:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 54A4D10E57E; Thu, 11 May 2023 16:55:57 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8DA4210E584 for ; Thu, 11 May 2023 16:55:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824155; x=1715360155; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=yjcxFi4cn1y4Mpn71LuA1qxRBuwP+jkxTFL1LscWZw8=; b=RZ5CdD2GMgqNKKkasbyditQM+DUQnjaFeo3zEBKBU2JB23og5igGaocw E0mXFDmclYFe/mseRIlHgNKqAoDhaFNxbJ/Lhx/GMR4MyZlG8K7f6i1Q7 ++7h+iskka1TQGJ2Uh7IY0GzrwqgkKgMHqZqk+GwoQfHfL+xUbIl6A6WJ UtAIgjrHc1zMxQQAQ6v7PqUHjeOfwBLcPElo74W4NxKqhLHKc3WlQ1Av7 vSUD/tXrHLbwghyfcpH7O2VcBdHKRfhBe3fKt2OPjLOwF+Ldy8kWtlram maUyHgNIf6l3+up+xUieHwLTwyzkMaCPcz/d02or6UGjEKxzCxXgiZoyL w==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796246" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796246" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319582" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319582" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:53 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:52 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:33 +0300 Message-Id: <20230511165534.10266-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 6/7] drm/i915: Init DDI outputs based on port_mask on skl+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Instead of listing every platform's possible DDI outputs in intel_setup_outputs() just loop over the new port_mask to achieve the same thing. HSW/BDW were left as is since they still look at the straps as well. DSI is still a mess. For now just check for the relevant platforms explicitly. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 80 ++++---------------- 1 file changed, 13 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a96714ea752a..fd3b5fc801e6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7350,73 +7350,19 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_METEORLAKE(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_TC1); - intel_ddi_init(dev_priv, PORT_TC2); - intel_ddi_init(dev_priv, PORT_TC3); - intel_ddi_init(dev_priv, PORT_TC4); - } else if (IS_DG2(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_C); - intel_ddi_init(dev_priv, PORT_D_XELPD); - intel_ddi_init(dev_priv, PORT_TC1); - } else if (IS_ALDERLAKE_P(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_TC1); - intel_ddi_init(dev_priv, PORT_TC2); - intel_ddi_init(dev_priv, PORT_TC3); - intel_ddi_init(dev_priv, PORT_TC4); - icl_dsi_init(dev_priv); - } else if (IS_ALDERLAKE_S(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_TC1); - intel_ddi_init(dev_priv, PORT_TC2); - intel_ddi_init(dev_priv, PORT_TC3); - intel_ddi_init(dev_priv, PORT_TC4); - } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_TC1); - intel_ddi_init(dev_priv, PORT_TC2); - } else if (DISPLAY_VER(dev_priv) >= 12) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_TC1); - intel_ddi_init(dev_priv, PORT_TC2); - intel_ddi_init(dev_priv, PORT_TC3); - intel_ddi_init(dev_priv, PORT_TC4); - intel_ddi_init(dev_priv, PORT_TC5); - intel_ddi_init(dev_priv, PORT_TC6); - icl_dsi_init(dev_priv); - } else if (IS_JSL_EHL(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_C); - intel_ddi_init(dev_priv, PORT_D); - icl_dsi_init(dev_priv); - } else if (DISPLAY_VER(dev_priv) == 11) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_C); - intel_ddi_init(dev_priv, PORT_D); - intel_ddi_init(dev_priv, PORT_E); - intel_ddi_init(dev_priv, PORT_F); - icl_dsi_init(dev_priv); - } else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_C); - vlv_dsi_init(dev_priv); - } else if (DISPLAY_VER(dev_priv) >= 9) { - intel_ddi_init(dev_priv, PORT_A); - intel_ddi_init(dev_priv, PORT_B); - intel_ddi_init(dev_priv, PORT_C); - intel_ddi_init(dev_priv, PORT_D); - intel_ddi_init(dev_priv, PORT_E); + if (DISPLAY_VER(dev_priv) >= 9) { + enum port port; + + for_each_port_masked(port, RUNTIME_INFO(dev_priv)->port_mask) + intel_ddi_init(dev_priv, port); + + /* FIXME do something about DSI */ + if (IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv) || + DISPLAY_VER(dev_priv) == 11) + icl_dsi_init(dev_priv); + + if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) + vlv_dsi_init(dev_priv); } else if (HAS_DDI(dev_priv)) { u32 found; From patchwork Thu May 11 16:55:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13238206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E757CC7EE22 for ; Thu, 11 May 2023 16:56:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7491910E584; Thu, 11 May 2023 16:56:00 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 62AA410E584 for ; Thu, 11 May 2023 16:55:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683824158; x=1715360158; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=iE8tZ6tqa6xaLzR4v4rrwthkQoOTD/XxM0aROyHKCbI=; b=KFa5lIojhNCx7WoFT0EpEqtmxefki0WxIPXVRWtPntUKQGnRXLUDjhsJ x/C+aTivfUFaLhY0sSS/ROHJUVBuVsb6JgvV9Faf5Dz0fcZKeRF1vqEhe 6WFYtXDmhl4PFU2o8gQjSMxBm/cEzdl7mbGrs1Sl/uLH+zFNWOjSgaxd0 +6zJul1Mj/iNk17Bp6bWfN3x0pDIqsUk0T4KpYUo5EODGu1mr2JyrLv17 IwecjphdybWRt0sE3xVQoCh+HT2fISWU52V8GwLCDatpwqEaAWujRmdQg 0YG/ojBYan9DD+KOooNe3CwXvMelWMRyWue1uAeRP7EKon+AsbWp3KMdm Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="352796263" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="352796263" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 09:55:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="677319594" X-IronPort-AV: E=Sophos;i="5.99,268,1677571200"; d="scan'208";a="677319594" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by orsmga006.jf.intel.com with SMTP; 11 May 2023 09:55:56 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 11 May 2023 19:55:55 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 11 May 2023 19:55:34 +0300 Message-Id: <20230511165534.10266-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230511165534.10266-1-ville.syrjala@linux.intel.com> References: <20230511165534.10266-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 7/7] drm/i915: Convert HSW/BDW to use port_mask for DDI probe X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Make HSW/BDW use port_mask for output probing as well. To achieve that the strap checks are moved into intel_ddi_init() itself. Or should we move them to the runtime port_mask init instead? Maybe not since the hardware is still there, just not connected to anything. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 27 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_display.c | 17 +----------- 2 files changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index a5ca4b9d1e3e..6c07f32d7116 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4660,6 +4660,27 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder) #define port_tc_name(port) ((port) - PORT_TC1 + '1') #define tc_port_name(tc_port) ((tc_port) - TC_PORT_1 + '1') +static bool port_strap_detected(struct drm_i915_private *i915, enum port port) +{ + /* straps not used on skl+ */ + if (DISPLAY_VER(i915) >= 9) + return true; + + switch (port) { + case PORT_A: + return intel_de_read(i915, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; + case PORT_B: + return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDIB_DETECTED; + case PORT_C: + return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDIC_DETECTED; + case PORT_D: + return intel_de_read(i915, SFUSE_STRAP) & SFUSE_STRAP_DDID_DETECTED; + default: + MISSING_CASE(port); + return false; + } +} + void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) { struct intel_digital_port *dig_port; @@ -4668,6 +4689,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port) bool init_hdmi, init_dp; enum phy phy = intel_port_to_phy(dev_priv, port); + if (!port_strap_detected(dev_priv, port)) { + drm_dbg_kms(&dev_priv->drm, + "Port %c strap not detected\n", port_name(port)); + return; + } + if (!assert_port_valid(dev_priv, port)) return; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index fd3b5fc801e6..2b08352570b5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7350,7 +7350,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (DISPLAY_VER(dev_priv) >= 9) { + if (HAS_DDI(dev_priv)) { enum port port; for_each_port_masked(port, RUNTIME_INFO(dev_priv)->port_mask) @@ -7363,24 +7363,9 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv) if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) vlv_dsi_init(dev_priv); - } else if (HAS_DDI(dev_priv)) { - u32 found; if (intel_ddi_crt_present(dev_priv)) intel_crt_init(dev_priv); - - /* Haswell uses DDI functions to detect digital outputs. */ - found = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; - if (found) - intel_ddi_init(dev_priv, PORT_A); - - found = intel_de_read(dev_priv, SFUSE_STRAP); - if (found & SFUSE_STRAP_DDIB_DETECTED) - intel_ddi_init(dev_priv, PORT_B); - if (found & SFUSE_STRAP_DDIC_DETECTED) - intel_ddi_init(dev_priv, PORT_C); - if (found & SFUSE_STRAP_DDID_DETECTED) - intel_ddi_init(dev_priv, PORT_D); } else if (HAS_PCH_SPLIT(dev_priv)) { int found;