From patchwork Mon May 22 07:48:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Carpenter X-Patchwork-Id: 13249942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 746B9C7EE26 for ; Mon, 22 May 2023 07:48:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6BD6710E266; Mon, 22 May 2023 07:48:10 +0000 (UTC) Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A27010E261 for ; Mon, 22 May 2023 07:48:08 +0000 (UTC) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-3f6042d60b5so8451285e9.2 for ; Mon, 22 May 2023 00:48:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684741686; x=1687333686; h=content-disposition:mime-version:message-id:subject:cc:to:from:date :from:to:cc:subject:date:message-id:reply-to; bh=7XMgaZJPGsrQVomCNqgAU3/ENZApSDLqMYm/e5VaXxw=; b=o1KZiUY0+94ILPWC9thOe+05sNJsT9m47nDU9niy/0e+Elik++Sfj78+DVBL89cSHw pw4lEj5H243X8aAV66ocyCPQNAYaUgr9QOYT+kLkLWdwbY6nWhoNBY26yB3ODLy4RA6J 7HaK5wNYk0LPiIeKAoo913TUJO/NwBPRJ/JYKqZWPDdr5rM/YQ/bLo8HHP9BRwlnAy5R 9bIiARG8Khqs/BCjGKx9oiNwBwegb4HHHLZeiCEZkkBhRyC8c9ek0znXbEUY4jgNyu6g kga1xHYITtKp7GVxEhCjlR4KFZAATp/jP5I+KiiX/ktmxA3QN1m6A+G5dMeEwEOL8+Nv 9Itw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684741686; x=1687333686; h=content-disposition:mime-version:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=7XMgaZJPGsrQVomCNqgAU3/ENZApSDLqMYm/e5VaXxw=; b=dT5u01rvPD7n6LfJcYF+mOk4ndB9XNrCHe9UPjIgxnejQ8jQ6ESryl0+z3Xd+FH1l7 7qPg2x6cVuz1OSO9k9700vChgtNY5b5YNT9ks3G5wSJJowciif6huAyDnMbiRB80eQKp ssJNahb/DQKCa4O3q/XKPp9itI4IYQx3ASm+Ew6RQZgoeDv9uL8S7SxlXc2IlEV0Oem/ fskd2SrX08jfcmDwWJPoTnyEFQU/w1xAm6Ih1ShyaQHxFCNvvVp56wSsQWdhu9RRUWOV NeatG76AjvFC440dmznDhBhVDDSvhQVo/dZesGH0vx6WYvCwEwvj67zxCpfR9UDS2h4F zcdw== X-Gm-Message-State: AC+VfDz8HslSD9OjWzd5snT7cc/cNIqEySsqZTqjeG922kKczmPpcdl2 maSQkkodMfZ2fYvR4jv0IqITjw== X-Google-Smtp-Source: ACHHUZ45kpDtJdUknRe4eZfAOKeBPDqYXozusnHk6IjXHiCBaDluwN8/yjIW82K5hNfL27FxQcI/UQ== X-Received: by 2002:a1c:7512:0:b0:3f1:789d:ad32 with SMTP id o18-20020a1c7512000000b003f1789dad32mr6942704wmc.11.1684741686242; Mon, 22 May 2023 00:48:06 -0700 (PDT) Received: from localhost ([102.36.222.112]) by smtp.gmail.com with ESMTPSA id m13-20020a7bca4d000000b003f4dde07956sm10636763wml.42.2023.05.22.00.48.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 May 2023 00:48:04 -0700 (PDT) Date: Mon, 22 May 2023 10:48:01 +0300 From: Dan Carpenter To: Jeykumar Sankaran Subject: [PATCH] drm/msm/dpu: signedness bug in dpu_encoder_phys_cmd_tearcheck_config() Message-ID: <897779a0-1a1f-4193-9dd3-bc4f87e73e3c@kili.mountain> MIME-Version: 1.0 Content-Disposition: inline X-Mailer: git-send-email haha only kidding X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Archit Taneja , Sean Paul , linux-arm-msm@vger.kernel.org, kernel-janitors@vger.kernel.org, Abhinav Kumar , dri-devel@lists.freedesktop.org, Jordan Crouse , Jessica Zhang , Dmitry Baryshkov , Marijn Suijten , Sravanthi Kollukuduru Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The "vsync_hz" variable is used to store negative error codes so it needs to be signed for the error checking to work correctly. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dan Carpenter --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 74470d068622..b29e6d1ba7f6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -320,7 +320,7 @@ static void dpu_encoder_phys_cmd_tearcheck_config( struct dpu_hw_tear_check tc_cfg = { 0 }; struct drm_display_mode *mode; bool tc_enable = true; - u32 vsync_hz; + int vsync_hz; struct dpu_kms *dpu_kms; if (!phys_enc->hw_pp) {