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[66.187.233.206]) by smtp.gmail.com with ESMTPSA id c3-20020ae9e203000000b0075b35e72a21sm7626qkc.86.2023.05.23.05.51.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 May 2023 05:51:21 -0700 (PDT) From: Tom Rix To: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tvrtko.ursulin@linux.intel.com, airlied@gmail.com, daniel@ffwll.ch, nathan@kernel.org, ndesaulniers@google.com, ville.syrjala@linux.intel.com, imre.deak@intel.com, arun.r.murthy@intel.com, lucas.demarchi@intel.com Date: Tue, 23 May 2023 08:51:16 -0400 Message-Id: <20230523125116.1669057-1-trix@redhat.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Subject: [Intel-gfx] [PATCH] drm/i915: simplify switch to if-elseif X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tom Rix , intel-gfx@lists.freedesktop.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" clang with W=1 reports drivers/gpu/drm/i915/display/intel_display.c:6012:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough] case I915_FORMAT_MOD_X_TILED: ^ Only one case and the default does anything in this switch, so it should be changed to an if-elseif. Signed-off-by: Tom Rix --- drivers/gpu/drm/i915/display/intel_display.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0490c6412ab5..1f852e49fc20 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5994,8 +5994,7 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in * Need to verify this for all gen9 platforms to enable * this selectively if required. */ - switch (new_plane_state->hw.fb->modifier) { - case DRM_FORMAT_MOD_LINEAR: + if (new_plane_state->hw.fb->modifier == DRM_FORMAT_MOD_LINEAR) { /* * FIXME: Async on Linear buffer is supported on ICL as * but with additional alignment and fbc restrictions @@ -6008,13 +6007,10 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in plane->base.base.id, plane->base.name); return -EINVAL; } - - case I915_FORMAT_MOD_X_TILED: - case I915_FORMAT_MOD_Y_TILED: - case I915_FORMAT_MOD_Yf_TILED: - case I915_FORMAT_MOD_4_TILED: - break; - default: + } else if (!(new_plane_state->hw.fb->modifier == I915_FORMAT_MOD_X_TILED || + new_plane_state->hw.fb->modifier == I915_FORMAT_MOD_Y_TILED || + new_plane_state->hw.fb->modifier == I915_FORMAT_MOD_Yf_TILED || + new_plane_state->hw.fb->modifier == I915_FORMAT_MOD_4_TILED)) { drm_dbg_kms(&i915->drm, "[PLANE:%d:%s] Modifier does not support async flips\n", plane->base.base.id, plane->base.name);