From patchwork Tue May 23 17:09:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Davidlohr Bueso X-Patchwork-Id: 13252759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 855F2C7EE23 for ; Tue, 23 May 2023 17:53:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229564AbjEWRxD (ORCPT ); Tue, 23 May 2023 13:53:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233642AbjEWRxD (ORCPT ); Tue, 23 May 2023 13:53:03 -0400 Received: from bee.birch.relay.mailchannels.net (bee.birch.relay.mailchannels.net [23.83.209.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D741F97; Tue, 23 May 2023 10:53:00 -0700 (PDT) X-Sender-Id: dreamhost|x-authsender|dave@stgolabs.net Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id AEAF510093B; Tue, 23 May 2023 17:43:17 +0000 (UTC) Received: from pdx1-sub0-mail-a250.dreamhost.com (unknown [127.0.0.6]) (Authenticated sender: dreamhost) by relay.mailchannels.net (Postfix) with ESMTPA id 203ED100DEB; Tue, 23 May 2023 17:43:17 +0000 (UTC) ARC-Seal: i=1; s=arc-2022; d=mailchannels.net; t=1684863797; a=rsa-sha256; cv=none; b=EChbPCwA1ffSlewxfORC2zHVVzCPh7FQnov+WoDZENstEfie6yxRwfyKr0dUF7tmb6iUhP n7PFgxfjjGpDYfHODNiJGGhiKbeyrIbvfDnSdqoOOQlW3AOFMybXt14wiqj8lKfTTq4b6U Qh6gaFue5rDavUTlVubcahLqw4HlOL+sf0nVsw3tFVB2+a8khqCdPQlx6T+nNs+kt7OFlY sRLYbK895Dtkccm0h2J+XXATdjJZ73QhBIDbVRgT2+uCb0CajeeL2mTBl/ofM8t8juY3Ju cEo7BgLvX3AgsUzfrEkJdiGQBsO+66FvXA9qMFzwRN4mRgSCkiy2lEZIHmXl2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=mailchannels.net; s=arc-2022; t=1684863797; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Tje9Mwoj4FsyACWirLPbg/M4HFVqtb+/SIEh21bnKKY=; b=buJ1JRTlSr9Gxwq0oQD2uqmndLw8JaCJy5znF/AFH9vWUJjeggc43ue10BE2sMpC1hYyTW lBjYAtT12oiyTBfwBlFLSbBOH9sNsDWQy3tzPrZmUqYb1bsyP3X92Rb5fSjvHj2ab9S7UP 5yXc4m6uTep6i6ikL4N/rV/poMbzJIR0Pq7XtRFea2qlFXNDbhDZUx8RF78m/6SOOqUAB1 joG9Kc47UIxHlc8Gv2GXoGcUeKpgeSTxVoPfhzlsiPL1HvJ2ndK1bhCyK6gAQrt7AJHwc4 AhDX/bzEJxwVhpkn8zzjp0WzEILWYidDxtGkcWQ5Sn0vnK62DZo4tnq4jF/wbA== ARC-Authentication-Results: i=1; rspamd-5cdf8fd7d9-qfmcz; auth=pass smtp.auth=dreamhost smtp.mailfrom=dave@stgolabs.net X-Sender-Id: dreamhost|x-authsender|dave@stgolabs.net X-MC-Relay: Neutral X-MailChannels-SenderId: dreamhost|x-authsender|dave@stgolabs.net X-MailChannels-Auth-Id: dreamhost X-Juvenile-Language: 3c77e26b695f5b3d_1684863797487_1350713200 X-MC-Loop-Signature: 1684863797487:3321212046 X-MC-Ingress-Time: 1684863797487 Received: from pdx1-sub0-mail-a250.dreamhost.com (pop.dreamhost.com [64.90.62.162]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384) by 100.116.217.246 (trex/6.8.1); Tue, 23 May 2023 17:43:17 +0000 Received: from localhost.localdomain (ip72-199-50-187.sd.sd.cox.net [72.199.50.187]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dave@stgolabs.net) by pdx1-sub0-mail-a250.dreamhost.com (Postfix) with ESMTPSA id 4QQhVr1Jfrz28; Tue, 23 May 2023 10:43:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1684863796; bh=Tje9Mwoj4FsyACWirLPbg/M4HFVqtb+/SIEh21bnKKY=; h=From:To:Cc:Subject:Date:Content-Transfer-Encoding; b=U8s7WDeMIYFkVRmc4zGrRuOpx2K4QR9N4YBRxJwrKGweeiaTZ31JJAwXXE9p7HHXo rq+M5WfcbWehRDppjnOWfqfuj8jLshWhETfGT5u7bPB246gKkkLU5eKoX8zPKyPmS6 lChvmq90BtYKUxdfAV9DSZyfvONDv7uKa3iOJlO9DHWFjYjU7xtT+/7aY+AfzqQ1RY YtqCfPh31j5JNKY1vfbZYbq2uqojz6QyV7b1gxyDgCRWVvHGDH4CH2uWKPZ2kT5S7f US7kp/z4eUwN+q/ADYiajfHcYjLJt7UEap6eRFLixZ6xwmL4L5UVOoUsmVZIAC1wfb 1cwuqMuvSpgxw== From: Davidlohr Bueso To: dan.j.williams@intel.com Cc: dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, Jonathan.Cameron@huawei.com, fan.ni@samsung.com, a.manzanares@samsung.com, dave@stgolabs.net, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra Subject: [PATCH 1/4] rcuwait: Support timeouts Date: Tue, 23 May 2023 10:09:24 -0700 Message-Id: <20230523170927.20685-2-dave@stgolabs.net> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230523170927.20685-1-dave@stgolabs.net> References: <20230523170927.20685-1-dave@stgolabs.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The rcuwait utility provides an efficient and safe single wait/wake mechanism. It is used in situations where queued wait is the wrong semantics, and often too bulky. For example, cases where the wait is already done under a lock. In the past, rcuwait has been extended to support beyond only uninterruptible sleep, and similarly, there are users that can benefit for the addition of timeouts. As such, tntroduce rcuwait_wait_event_timeout(), with semantics equivalent to calls for queued wait counterparts. Acked-by: Peter Zijlstra (Intel) Signed-off-by: Davidlohr Bueso --- include/linux/rcuwait.h | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/include/linux/rcuwait.h b/include/linux/rcuwait.h index 8052d34da782..27343424225c 100644 --- a/include/linux/rcuwait.h +++ b/include/linux/rcuwait.h @@ -49,9 +49,9 @@ static inline void prepare_to_rcuwait(struct rcuwait *w) extern void finish_rcuwait(struct rcuwait *w); -#define rcuwait_wait_event(w, condition, state) \ +#define ___rcuwait_wait_event(w, condition, state, ret, cmd) \ ({ \ - int __ret = 0; \ + long __ret = ret; \ prepare_to_rcuwait(w); \ for (;;) { \ /* \ @@ -67,10 +67,27 @@ extern void finish_rcuwait(struct rcuwait *w); break; \ } \ \ - schedule(); \ + cmd; \ } \ finish_rcuwait(w); \ __ret; \ }) +#define rcuwait_wait_event(w, condition, state) \ + ___rcuwait_wait_event(w, condition, state, 0, schedule()) + +#define __rcuwait_wait_event_timeout(w, condition, state, timeout) \ + ___rcuwait_wait_event(w, ___wait_cond_timeout(condition), \ + state, timeout, \ + __ret = schedule_timeout(__ret)) + +#define rcuwait_wait_event_timeout(w, condition, state, timeout) \ +({ \ + long __ret = timeout; \ + if (!___wait_cond_timeout(condition)) \ + __ret = __rcuwait_wait_event_timeout(w, condition, \ + state, timeout); \ + __ret; \ +}) + #endif /* _LINUX_RCUWAIT_H_ */ From patchwork Tue May 23 17:09:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Davidlohr Bueso X-Patchwork-Id: 13252737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3312DC7EE23 for ; Tue, 23 May 2023 17:43:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238220AbjEWRnV (ORCPT ); Tue, 23 May 2023 13:43:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230148AbjEWRnU (ORCPT ); Tue, 23 May 2023 13:43:20 -0400 Received: from bird.elm.relay.mailchannels.net (bird.elm.relay.mailchannels.net [23.83.212.17]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90CD3BF; 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Tue, 23 May 2023 17:43:18 +0000 Received: from localhost.localdomain (ip72-199-50-187.sd.sd.cox.net [72.199.50.187]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dave@stgolabs.net) by pdx1-sub0-mail-a250.dreamhost.com (Postfix) with ESMTPSA id 4QQhVs0kVvz6m; Tue, 23 May 2023 10:43:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1684863797; bh=q16+5TKWGQBnFCEvrQ0mCXF889Dj8R8FUeGnQl+Z3ek=; h=From:To:Cc:Subject:Date:Content-Transfer-Encoding; b=Fz9qlVSVnW4mj/z8IEHRyUS+EefwhvKeqI7VeOX/TEiGkqOLos8bVNdGnsvWEHs9o HnVWhrP//EnMZpL0/BgZiVvuaxHL3vaG67BL8BqIV78Gxv4iX/peZgYEbg9wtA7CuI y3saFQI57Y65aXVooTmAiLmrJoqqwesNXlCTvTqomGj80efXW1GKZtke9wAlVI+5IM PfpnSe+SKEWtoChe6igCz7X68pQYg3tGLdod8taqhbUhATrKEcop4MkpDt2C9vwAdL M+jnx6z6rj26jX+k0m3oK0Ybqfb2gz5b+reehsCgBsWjw/LpjB0xZDwkJxNLOVuSw2 PSDZLvWhTzJFg== From: Davidlohr Bueso To: dan.j.williams@intel.com Cc: dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, Jonathan.Cameron@huawei.com, fan.ni@samsung.com, a.manzanares@samsung.com, dave@stgolabs.net, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] cxl/pci: Allocate irq vectors earlier during probe Date: Tue, 23 May 2023 10:09:25 -0700 Message-Id: <20230523170927.20685-3-dave@stgolabs.net> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230523170927.20685-1-dave@stgolabs.net> References: <20230523170927.20685-1-dave@stgolabs.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Move the cxl_alloc_irq_vectors() call further up in the probing in order to allow for mailbox interrupt usage. No change in semantics. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Signed-off-by: Davidlohr Bueso --- drivers/cxl/pci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 0872f2233ed0..f2039fe0805d 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -714,6 +714,10 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) else dev_warn(&pdev->dev, "Media not active (%d)\n", rc); + rc = cxl_alloc_irq_vectors(pdev); + if (rc) + return rc; + rc = cxl_pci_setup_mailbox(cxlds); if (rc) return rc; @@ -738,10 +742,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) return rc; - rc = cxl_alloc_irq_vectors(pdev); - if (rc) - return rc; - cxlmd = devm_cxl_add_memdev(cxlds); if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); From patchwork Tue May 23 17:09:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Davidlohr Bueso X-Patchwork-Id: 13252739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EC5FC77B75 for ; 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a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1684863798; bh=Bh5pmBAZMINLcIjPupzC+5lllFGC0EfYDoFo0I+pOsA=; h=From:To:Cc:Subject:Date:Content-Transfer-Encoding; b=hCCHZioq5QPrLydqF+KocM6vBONbyQ5ghX7kQBI4BIc5Ob6GqoTpFUm2QAbnxsRit PRK4Hn44xafkBFJ+GNhdO/ti/1XlyfF/P09l1elqlymDdYRFdfJiSQSs8u44bQS+oo XqHU5s8+eGFcsZwYSBg5gBAcavQN7yi8mXEumkeuZheXDQ13wq//jb95Z+PtyvUnd4 dpTrSmk39HM8S0aqIlbmFYLu8yJMRQLhcjdhgJSHMurac1lLpduEOQYekGUjIaqbEQ zZpcMHoc8AZ+j7G6StXHsxIlU1btHDuPjsNzREvaNprGDvNTuTEkfwEOwQtQZQ+a8w GZnCEqo+P1beQ== From: Davidlohr Bueso To: dan.j.williams@intel.com Cc: dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, Jonathan.Cameron@huawei.com, fan.ni@samsung.com, a.manzanares@samsung.com, dave@stgolabs.net, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] cxl/pci: Introduce cxl_request_irq() Date: Tue, 23 May 2023 10:09:26 -0700 Message-Id: <20230523170927.20685-4-dave@stgolabs.net> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230523170927.20685-1-dave@stgolabs.net> References: <20230523170927.20685-1-dave@stgolabs.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Factor out common functionality/semantics for cxl shared interrupts into a new helper on top of devm_request_irq(). Suggested-by: Dan Williams Signed-off-by: Davidlohr Bueso --- drivers/cxl/pci.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index f2039fe0805d..18b8f3ce680c 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -84,6 +84,27 @@ static int cxl_pci_mbox_wait_for_doorbell(struct cxl_dev_state *cxlds) status & CXLMDEV_DEV_FATAL ? " fatal" : "", \ status & CXLMDEV_FW_HALT ? " firmware-halt" : "") +struct cxl_dev_id { + struct cxl_dev_state *cxlds; +}; + +static int cxl_request_irq(struct cxl_dev_state *cxlds, int irq, + irq_handler_t handler, irq_handler_t thread_fn) +{ + struct device *dev = cxlds->dev; + struct cxl_dev_id *dev_id; + + /* dev_id must be globally unique and must contain the cxlds */ + dev_id = devm_kzalloc(dev, sizeof(*dev_id), GFP_KERNEL); + if (!dev_id) + return -ENOMEM; + dev_id->cxlds = cxlds; + + return devm_request_threaded_irq(dev, irq, handler, thread_fn, + IRQF_SHARED | IRQF_ONESHOT, + NULL, dev_id); +} + /** * __cxl_pci_mbox_send_cmd() - Execute a mailbox command * @cxlds: The device state to communicate with. @@ -469,10 +490,6 @@ static int cxl_alloc_irq_vectors(struct pci_dev *pdev) return 0; } -struct cxl_dev_id { - struct cxl_dev_state *cxlds; -}; - static irqreturn_t cxl_event_thread(int irq, void *id) { struct cxl_dev_id *dev_id = id; @@ -498,28 +515,18 @@ static irqreturn_t cxl_event_thread(int irq, void *id) static int cxl_event_req_irq(struct cxl_dev_state *cxlds, u8 setting) { - struct device *dev = cxlds->dev; - struct pci_dev *pdev = to_pci_dev(dev); - struct cxl_dev_id *dev_id; + struct pci_dev *pdev = to_pci_dev(cxlds->dev); int irq; if (FIELD_GET(CXLDEV_EVENT_INT_MODE_MASK, setting) != CXL_INT_MSI_MSIX) return -ENXIO; - /* dev_id must be globally unique and must contain the cxlds */ - dev_id = devm_kzalloc(dev, sizeof(*dev_id), GFP_KERNEL); - if (!dev_id) - return -ENOMEM; - dev_id->cxlds = cxlds; - irq = pci_irq_vector(pdev, FIELD_GET(CXLDEV_EVENT_INT_MSGNUM_MASK, setting)); if (irq < 0) return irq; - return devm_request_threaded_irq(dev, irq, NULL, cxl_event_thread, - IRQF_SHARED | IRQF_ONESHOT, NULL, - dev_id); + return cxl_request_irq(cxlds, irq, NULL, cxl_event_thread); } static int cxl_event_get_int_policy(struct cxl_dev_state *cxlds, From patchwork Tue May 23 17:09:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Davidlohr Bueso X-Patchwork-Id: 13252738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CCA2C7EE23 for ; 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a=rsa-sha256; c=relaxed/relaxed; d=stgolabs.net; s=dreamhost; t=1684863799; bh=MUixsCnTrKx0pNrJfVPzobY9yvQ4aYxoFvtZUqz3UQ8=; h=From:To:Cc:Subject:Date:Content-Transfer-Encoding; b=ZUqoPB7XiPvKQcnS8MaPCHgYujup1uC5y5IZGMl2mgJpNXMRBrBsIBtGpu6c6DCoU Do4Aqy4+2iQkjDRFL4XgB6EH087/1Eu9ChYpkxyKRUKkB/6FHuZem93HiN/kipkj5f nDmuaaq8dRYgWJ6UT2xQOUSijslJqyiH7B9t79EZTDZJ9U0CCTHQqIWFZwaawsgJqy 0BtKmo6KguHNPwjAfvBL/yOT6ugEUre/57TQwvrvpzxlLNJWSM+LZA5U66bZP/KhqJ zu/4zP+cPxoEhoUFlmtqU5FV7ofdBNnvJo4PCwal2b4uUJ647HAAIWaGQGKfaKIRDy JpnFy/qTA3FlA== From: Davidlohr Bueso To: dan.j.williams@intel.com Cc: dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, Jonathan.Cameron@huawei.com, fan.ni@samsung.com, a.manzanares@samsung.com, dave@stgolabs.net, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] cxl/mbox: Add background cmd handling machinery Date: Tue, 23 May 2023 10:09:27 -0700 Message-Id: <20230523170927.20685-5-dave@stgolabs.net> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230523170927.20685-1-dave@stgolabs.net> References: <20230523170927.20685-1-dave@stgolabs.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org This adds support for handling background operations, as defined in the CXL 3.0 spec. Commands that can take too long (over ~2 seconds) can run in the background asynchronously (to the hardware). The driver will deal with such commands synchronously, blocking all other incoming commands for a specified period of time, allowing time-slicing the command such that the caller can send incremental requests to avoid monopolizing the driver/device. Any out of sync (timeout) between the driver and hardware is just disregarded as an invalid state until the next successful submission. Such timeouts are considered a rare occurrence, either a real device problem or a driver issue that needs to reduce the size of the background operation to fit the timeout. On devices where mbox interrupts are supported, this will still use a poller that will wakeup in the specified wait intervals. The irq handler will simply awake the blocked cmd, which is also safe vs a task that is either waking (timing out) or already awoken. Similarly any irq setup error during the probing falls back to polling, thus avoids unnecessarily erroring out. Signed-off-by: Davidlohr Bueso --- drivers/cxl/core/mbox.c | 3 +- drivers/cxl/cxl.h | 8 ++++ drivers/cxl/cxlmem.h | 7 ++++ drivers/cxl/pci.c | 89 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 106 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index 2c8dc7e2b84d..5993261e3e08 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -220,7 +220,8 @@ int cxl_internal_send_cmd(struct cxl_dev_state *cxlds, if (rc) return rc; - if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS) + if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS && + mbox_cmd->return_code != CXL_MBOX_CMD_RC_BACKGROUND) return cxl_mbox_cmd_rc2errno(mbox_cmd); if (!out_size) diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index f93a28538962..ec69bda93aee 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -176,14 +176,22 @@ static inline int ways_to_eiw(unsigned int ways, u8 *eiw) /* CXL 2.0 8.2.8.4 Mailbox Registers */ #define CXLDEV_MBOX_CAPS_OFFSET 0x00 #define CXLDEV_MBOX_CAP_PAYLOAD_SIZE_MASK GENMASK(4, 0) +#define CXLDEV_MBOX_CAP_BG_CMD_IRQ BIT(6) +#define CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK GENMASK(10, 7) #define CXLDEV_MBOX_CTRL_OFFSET 0x04 #define CXLDEV_MBOX_CTRL_DOORBELL BIT(0) +#define CXLDEV_MBOX_CTRL_BG_CMD_IRQ BIT(2) #define CXLDEV_MBOX_CMD_OFFSET 0x08 #define CXLDEV_MBOX_CMD_COMMAND_OPCODE_MASK GENMASK_ULL(15, 0) #define CXLDEV_MBOX_CMD_PAYLOAD_LENGTH_MASK GENMASK_ULL(36, 16) #define CXLDEV_MBOX_STATUS_OFFSET 0x10 +#define CXLDEV_MBOX_STATUS_BG_CMD BIT(0) #define CXLDEV_MBOX_STATUS_RET_CODE_MASK GENMASK_ULL(47, 32) #define CXLDEV_MBOX_BG_CMD_STATUS_OFFSET 0x18 +#define CXLDEV_MBOX_BG_CMD_COMMAND_OPCODE_MASK GENMASK_ULL(15, 0) +#define CXLDEV_MBOX_BG_CMD_COMMAND_PCT_MASK GENMASK_ULL(22, 16) +#define CXLDEV_MBOX_BG_CMD_COMMAND_RC_MASK GENMASK_ULL(47, 32) +#define CXLDEV_MBOX_BG_CMD_COMMAND_VENDOR_MASK GENMASK_ULL(63, 48) #define CXLDEV_MBOX_PAYLOAD_OFFSET 0x20 /* diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index a2845a7a69d8..1d8e81c87c6a 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -5,6 +5,7 @@ #include #include #include +#include #include "cxl.h" /* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */ @@ -108,6 +109,9 @@ static inline struct cxl_ep *cxl_ep_load(struct cxl_port *port, * variable sized output commands, it tells the exact number of bytes * written. * @min_out: (input) internal command output payload size validation + * @poll_count: (input) Number of timeouts to attempt. + * @poll_interval_ms: (input) Time between mailbox background command polling + * interval timeouts. * @return_code: (output) Error code returned from hardware. * * This is the primary mechanism used to send commands to the hardware. @@ -123,6 +127,8 @@ struct cxl_mbox_cmd { size_t size_in; size_t size_out; size_t min_out; + int poll_count; + int poll_interval_ms; u16 return_code; }; @@ -331,6 +337,7 @@ struct cxl_dev_state { struct cxl_event_state event; struct cxl_poison_state poison; + struct rcuwait mbox_wait; int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd); }; diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 18b8f3ce680c..a78e40e6d0e0 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -105,6 +105,26 @@ static int cxl_request_irq(struct cxl_dev_state *cxlds, int irq, NULL, dev_id); } +static bool cxl_mbox_background_complete(struct cxl_dev_state *cxlds) +{ + u64 reg; + + reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET); + return FIELD_GET(CXLDEV_MBOX_BG_CMD_COMMAND_PCT_MASK, reg) == 100; +} + +static irqreturn_t cxl_pci_mbox_irq(int irq, void *id) +{ + struct cxl_dev_id *dev_id = id; + struct cxl_dev_state *cxlds = dev_id->cxlds; + + /* short-circuit the wait in __cxl_pci_mbox_send_cmd() */ + if (cxl_mbox_background_complete(cxlds)) + rcuwait_wake_up(&cxlds->mbox_wait); + + return IRQ_HANDLED; +} + /** * __cxl_pci_mbox_send_cmd() - Execute a mailbox command * @cxlds: The device state to communicate with. @@ -198,6 +218,50 @@ static int __cxl_pci_mbox_send_cmd(struct cxl_dev_state *cxlds, mbox_cmd->return_code = FIELD_GET(CXLDEV_MBOX_STATUS_RET_CODE_MASK, status_reg); + /* + * Handle the background command in a synchronous manner. + * + * All other mailbox commands will serialize/queue on the mbox_mutex, + * which we currently hold. Furthermore this also guarantees that + * cxl_mbox_background_complete() checks are safe amongst each other, + * in that no new bg operation can occur in between. + * + * Background operations are timesliced in accordance with the nature + * of the command. In the event of timeout, the mailbox state is + * indeterminate until the next successful command submission and the + * driver can get back in sync with the hardware state. + */ + if (mbox_cmd->return_code == CXL_MBOX_CMD_RC_BACKGROUND) { + u64 bg_status_reg; + int i, timeout = mbox_cmd->poll_interval_ms; + + dev_dbg(dev, "Mailbox background operation (0x%04x) started\n", + mbox_cmd->opcode); + + for (i = 0; i < mbox_cmd->poll_count; i++) { + if (rcuwait_wait_event_timeout(&cxlds->mbox_wait, + cxl_mbox_background_complete(cxlds), + TASK_UNINTERRUPTIBLE, + msecs_to_jiffies(timeout)) > 0) + break; + } + + if (!cxl_mbox_background_complete(cxlds)) { + dev_err(dev, "timeout waiting for background (%d ms)\n", + timeout * mbox_cmd->poll_count); + return -ETIMEDOUT; + } + + bg_status_reg = readq(cxlds->regs.mbox + + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET); + mbox_cmd->return_code = + FIELD_GET(CXLDEV_MBOX_BG_CMD_COMMAND_RC_MASK, + bg_status_reg); + dev_dbg(dev, + "Mailbox background operation (0x%04x) completed\n", + mbox_cmd->opcode); + } + if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS) { dev_dbg(dev, "Mailbox operation had an error: %s\n", cxl_mbox_cmd_rc2str(mbox_cmd)); @@ -292,6 +356,31 @@ static int cxl_pci_setup_mailbox(struct cxl_dev_state *cxlds) dev_dbg(cxlds->dev, "Mailbox payload sized %zu", cxlds->payload_size); + rcuwait_init(&cxlds->mbox_wait); + + if (cap & CXLDEV_MBOX_CAP_BG_CMD_IRQ) { + u32 ctrl; + int irq, msgnum; + struct pci_dev *pdev = to_pci_dev(cxlds->dev); + + msgnum = FIELD_GET(CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK, cap); + irq = pci_irq_vector(pdev, msgnum); + if (irq < 0) + goto mbox_poll; + + if (cxl_request_irq(cxlds, irq, cxl_pci_mbox_irq, NULL)) + goto mbox_poll; + + /* enable background command mbox irq support */ + ctrl = readl(cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET); + ctrl |= CXLDEV_MBOX_CTRL_BG_CMD_IRQ; + writel(ctrl, cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET); + + return 0; + } + +mbox_poll: + dev_dbg(cxlds->dev, "Mailbox interrupts are unsupported"); return 0; }