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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:04 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:00 +0200 Subject: [PATCH 01/20] soc: qcom: smd-rpm: Add QCOM_SMD_RPM_STATE_NUM MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-1-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=832; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=4N6lbOSoAygpQXj0UMs5Vps30KIKUCiMTFGnd+cpG9Q=; b=Apzq1+DyQ99gBM5pYzms5dwSiiuvW/23Rvc3hwmN3t9CEO+k4c8sJkLtc6ORu+84mOo5C7tlb bHCmQn3jOssC4SBuA9g3chvH/9VTnnMjWigFcmCvoClH1/3zLpvILMf X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add a preprocessor define to indicate the number of RPM contexts/states. While at it, use tabs instead of spaces for the existing entries. Signed-off-by: Konrad Dybcio --- include/linux/soc/qcom/smd-rpm.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2990f425fdef..99499e4b080e 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -4,8 +4,9 @@ struct qcom_smd_rpm; -#define QCOM_SMD_RPM_ACTIVE_STATE 0 -#define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_ACTIVE_STATE 0 +#define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_STATE_NUM 2 /* * Constants used for addressing resources in the RPM. From patchwork Tue May 30 10:20:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6755AC7EE2F for ; Tue, 30 May 2023 10:20:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229823AbjE3KUM (ORCPT ); Tue, 30 May 2023 06:20:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231324AbjE3KUK (ORCPT ); Tue, 30 May 2023 06:20:10 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E452AD9 for ; Tue, 30 May 2023 03:20:07 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-4f4f757d575so3098293e87.0 for ; Tue, 30 May 2023 03:20:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442006; x=1688034006; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VvXpNIbHmqtd4lG8jcv7ZzbkoIqN9kOw2a/0JaApzvg=; b=nm8S0ICs/LpwJ5/vDr0fd5IwjPwej8X5egeLTLnaOEyL+sObY7zIlZUwD0wCwzw5Ra YMLO7XxpAo6jltNKhmLabdHmu+OOPDT0T8R4rB00vqaSSp0uO1sWQUfJbZUJeIoSkJGc c3qVoYHkIxs+oQMJ7crPlm3Mdp723q8c4aXdBTaggGPRZHyjYrAxVGYhTVuCzaTsYbcH chhgfNV626FRO8m8PFCEAHbrHIV6yFhCFGwsbX6uqdeICuonE6RsGUWNS0I2IDqCDfRy e+HrJA+TxU1iaLyJ6/ojVjBVrNmdltUSckZqayHVhOnEThXlKDweEPhUQ/7rHlzKnJc6 ZXCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442006; x=1688034006; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VvXpNIbHmqtd4lG8jcv7ZzbkoIqN9kOw2a/0JaApzvg=; b=FhMW87/4BXPkofRGx+4+KBjo9Ywjhp1riF1JF36L50xQF6M0NaxcDRyhEQTQlLOWJh MlYhhBF6ODS5zuNisPybpqpiTCIK1QSXZhA84v8ULUZ7z5N5S9dCOS0euNs7MvjMNFJj ROuvxVZsYm9E5C8jItLAaf0ah08MhgkOzKUKZ4rPed3m3oqpx3qTKhAxyRzR9UFnWsY4 VQr4ox9K0TPGf/EUt7lgz0OMSpx76WoytkMA38er8u/sCEZa5VI3UGoa+qpszIksLdli L3kNQSjUhjsFLSqMjd1+u1WdkUGZ866qctBwFWuZjwdGPV8Hyl22sHomdD3ThYV+Jn2l ginw== X-Gm-Message-State: AC+VfDwwYq5jKs1pJRXjy3u+FGH1V4/S2fzuwV/4E0s5uqK3tU/62MOK DEKMWfimIi/N0HhoaqdZNCQJZdDSLkKloQjqzy0= X-Google-Smtp-Source: ACHHUZ5+zKi+lgYEbZ1esDpzoBfTLPxmkNqynE9WjjmRdGWq94hAmEPOF3K7nDXeSyVqyzjcalxqFg== X-Received: by 2002:a05:6512:968:b0:4e8:487a:7c2e with SMTP id v8-20020a056512096800b004e8487a7c2emr501857lft.14.1685442006314; Tue, 30 May 2023 03:20:06 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:06 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:01 +0200 Subject: [PATCH 02/20] clk: qcom: smd-rpm: Move some RPM resources to the common header MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-2-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=2376; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ApK/VPfTmld07UKzNhGBat7UaI7zSF3PDIl2T4HqloY=; b=rSjHIbUA7ZHfYPhT2WvjHFRqSyeNfPKb8oZvSP/GEIX6r6PpXXzQLHMrQUZnUjUmiAQcskOnF GkrinvwTeNDD7nra0QIM6+AOf0Nu7SwerMpzW2LOHwnb0E4QHAWiNBa X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org In preparation for handling the bus clocks in the icc driver, carve out some defines and a struct definition to the common rpm header. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-smd-rpm.c | 13 ------------- include/linux/soc/qcom/smd-rpm.h | 15 +++++++++++++++ 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index e4de74b68797..937cb1515968 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -18,13 +18,6 @@ #include -#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 -#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 -#define QCOM_RPM_SMD_KEY_RATE 0x007a484b -#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 -#define QCOM_RPM_SMD_KEY_STATE 0x54415453 -#define QCOM_RPM_SCALING_ENABLE_ID 0x2 - #define __DEFINE_CLK_SMD_RPM_PREFIX(_prefix, _name, _active, \ type, r_id, key) \ static struct clk_smd_rpm clk_smd_rpm_##_prefix##_active; \ @@ -171,12 +164,6 @@ struct clk_smd_rpm { unsigned long rate; }; -struct clk_smd_rpm_req { - __le32 key; - __le32 nbytes; - __le32 value; -}; - struct rpm_smd_clk_desc { struct clk_smd_rpm **clks; size_t num_clks; diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 99499e4b080e..8190878645f9 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -2,6 +2,8 @@ #ifndef __QCOM_SMD_RPM_H__ #define __QCOM_SMD_RPM_H__ +#include + struct qcom_smd_rpm; #define QCOM_SMD_RPM_ACTIVE_STATE 0 @@ -45,6 +47,19 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_PKA_CLK 0x616b70 #define QCOM_SMD_RPM_MCFG_CLK 0x6766636d +#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 +#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 +#define QCOM_RPM_SMD_KEY_RATE 0x007a484b +#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 +#define QCOM_RPM_SMD_KEY_STATE 0x54415453 +#define QCOM_RPM_SCALING_ENABLE_ID 0x2 + +struct clk_smd_rpm_req { + __le32 key; + __le32 nbytes; + __le32 value; +}; + int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, u32 resource_type, u32 resource_id, From patchwork Tue May 30 10:20:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81BE7C7EE29 for ; Tue, 30 May 2023 10:20:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231425AbjE3KUU (ORCPT ); Tue, 30 May 2023 06:20:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230195AbjE3KUN (ORCPT ); Tue, 30 May 2023 06:20:13 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 888299F for ; Tue, 30 May 2023 03:20:08 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4f3a9ad31dbso4875381e87.0 for ; Tue, 30 May 2023 03:20:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442008; x=1688034008; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TQdA0JC5EnJw6b4/CowUYq8tfMxhXnCwzG8pO7Pd+ew=; b=vsYVBrJPStxb9CH+u9gkEPcTWKxG/5oNdZ1/7is+m5LKmGlObhsH08h/ys1GaqAvwA M/nmLPc0W/ihCSuouDnCJ5eZ7HX3zZThqbtCTH8ASPUWGOSkHtigpb0wIdZv1mk4F31J R7l5FrDuFxY+4whMK+lRTkboJlSBlp8d4Pv7Qp2AMTsNyVB6nDmPzRWxMl5Gpte0teuU XBzo1u63ix3sEsJ9us/S12E/LkWaEg44IgBJyVW4GvBQoKpMZ8Iw0EMwaTpwS0gBQul5 gYLNcHSNSsFe3p8emqfk7o+zb4XIwzjFXakLzRyeVVw1sTzDW76M8uIRDBIr2MSWwkn6 TrNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442008; x=1688034008; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TQdA0JC5EnJw6b4/CowUYq8tfMxhXnCwzG8pO7Pd+ew=; b=dA1fDzsb04xlU1f2OLl/D1g/RuEW3DOysww6pBRshwxh7NSQ2OYu+u98KrOjM4opGl ifOYrAyXM92eH5SUQIrXxHnCbQ79AFPxCHNgKY1XkKat6r/E/HC7CDyZUZrPMKW4mLQn r/CRmLtPTxab8P0gM4msHzlXqCqZffPfp+78cGED0a/nt7EJ2+8/pHxiluBw5IIbyUUN xxjZSFHROIcS58ezmp1/tNoQsZOqHqhtbIsYc6BWUPGXQwJ/wwBUnX5yNox2QTjIgO5E cN9xSZVbPZh7xxA0YlIJfnJ7UVUvn9kTCQLBvw8WpbZmkyiRC+jcnQ8oVa/a+n0owUqL wTjw== X-Gm-Message-State: AC+VfDwGZTm/jxROplFd7ICTJfVvK75qAsbThVabR9bStzMh5vMEE3c9 /mc8ckXfvqL06Zjb9Qnv7104vQ== X-Google-Smtp-Source: ACHHUZ6ogkVSQTBoCRKXEoJ+PYlWey9GZ0r1JaxRRcGZtTsMESaxqNol+J9WUJRi4xQr13IkMk84fA== X-Received: by 2002:ac2:5443:0:b0:4f4:cacb:4b4b with SMTP id d3-20020ac25443000000b004f4cacb4b4bmr513337lfn.18.1685442007844; Tue, 30 May 2023 03:20:07 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:07 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:02 +0200 Subject: [PATCH 03/20] clk: qcom: smd-rpm: Separate out interconnect bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-3-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=26677; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=1s4s6hkrW5B4osLz3KedAVfbb5KJ4YfvuzI93qhExGI=; b=1bV0X9tjsqoPy7P/v9pLNeXJ8uv/WXgpgcPaCdcKBrGHgm8ccWQ071NMJlqT8yFaiYtlRAuS3 QQlKQzyCGcRANgFqf0z/em/xvzM631Ibe/3VBzzlD/oTi++CKsT2oTv X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The interconnect bus clocks are now handled within the ICC framework. They still however need to get a kickstart *before* we call clk_smd_rpm_enable_scaling(), or RPM will assume that they should all be running at 0 kHz and the system will inevitably die. Separate them out to ensure such a kickstart can still take place. As a happy accident, the file got smaller: Total: Before=41951, After=41555, chg -0.94% Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 278 +++++++++++++++++------------------------ 1 file changed, 115 insertions(+), 163 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 937cb1515968..b63f946e4520 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -167,6 +167,14 @@ struct clk_smd_rpm { struct rpm_smd_clk_desc { struct clk_smd_rpm **clks; size_t num_clks; + + /* + * Interconnect clocks are managed by the icc framework, this driver + * only kickstarts them so that they don't get gated between + * clk_smd_rpm_enable_scaling() and interconnect driver initialization. + */ + struct clk_smd_rpm **icc_clks; + size_t num_icc_clks; bool scaling_before_handover; }; @@ -498,13 +506,69 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk1, 11, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk2, 12, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(div_clk3, 13, 19200000); +static struct clk_smd_rpm *bimc_pcnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_smmnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_sysmmnoc_clk, +}; + +static struct clk_smd_rpm *bimc_pcnoc_snoc_cnoc_ocmem_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_ocmemgx_clk, +}; + +static struct clk_smd_rpm *msm8996_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_branch_aggre1_noc_clk, + &clk_smd_rpm_branch_aggre2_noc_clk, + &clk_smd_rpm_bus_0_pcnoc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *msm8998_icc_clks[] = { + &clk_smd_rpm_aggre1_noc_clk, + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sdm660_icc_clks[] = { + &clk_smd_rpm_aggre2_noc_clk, + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_snoc_clk, + &clk_smd_rpm_bus_2_cnoc_clk, + &clk_smd_rpm_mmssnoc_axi_rpm_clk, +}; + +static struct clk_smd_rpm *sm_qnoc_icc_clks[] = { + &clk_smd_rpm_bimc_clk, + &clk_smd_rpm_bus_1_cnoc_clk, + &clk_smd_rpm_mmnrt_clk, + &clk_smd_rpm_mmrt_clk, + &clk_smd_rpm_qup_clk, + &clk_smd_rpm_bus_2_snoc_clk, +}; + static struct clk_smd_rpm *msm8909_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -530,15 +594,11 @@ static struct clk_smd_rpm *msm8909_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8909 = { .clks = msm8909_clks, .num_clks = ARRAY_SIZE(msm8909_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8916_clks[] = { - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -562,21 +622,15 @@ static struct clk_smd_rpm *msm8916_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8916 = { .clks = msm8916_clks, .num_clks = ARRAY_SIZE(msm8916_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8917_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_BIMC_GPU_CLK] = &clk_smd_rpm_bimc_gpu_clk, [RPM_SMD_BIMC_GPU_A_CLK] = &clk_smd_rpm_bimc_gpu_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -596,19 +650,13 @@ static struct clk_smd_rpm *msm8917_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8917 = { .clks = msm8917_clks, .num_clks = ARRAY_SIZE(msm8917_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8936_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -632,25 +680,17 @@ static struct clk_smd_rpm *msm8936_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8936 = { .clks = msm8936_clks, .num_clks = ARRAY_SIZE(msm8936_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8974_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_MMSSNOC_AHB_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_clk, [RPM_SMD_MMSSNOC_AHB_A_CLK] = &clk_smd_rpm_bus_3_mmssnoc_ahb_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_CXO_D0] = &clk_smd_rpm_cxo_d0, @@ -684,20 +724,14 @@ static struct clk_smd_rpm *msm8974_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8974 = { .clks = msm8974_clks, .num_clks = ARRAY_SIZE(msm8974_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), .scaling_before_handover = true, }; static struct clk_smd_rpm *msm8976_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -718,24 +752,15 @@ static struct clk_smd_rpm *msm8976_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8976 = { .clks = msm8976_clks, - .num_clks = ARRAY_SIZE(msm8976_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *msm8992_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -777,23 +802,15 @@ static struct clk_smd_rpm *msm8992_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8992 = { .clks = msm8992_clks, .num_clks = ARRAY_SIZE(msm8992_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8994_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_OCMEMGX_CLK] = &clk_smd_rpm_ocmemgx_clk, - [RPM_SMD_OCMEMGX_A_CLK] = &clk_smd_rpm_ocmemgx_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_GFX3D_CLK_SRC] = &clk_smd_rpm_gfx3d_clk_src, [RPM_SMD_GFX3D_A_CLK_SRC] = &clk_smd_rpm_gfx3d_a_clk_src, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, @@ -837,29 +854,17 @@ static struct clk_smd_rpm *msm8994_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8994 = { .clks = msm8994_clks, .num_clks = ARRAY_SIZE(msm8994_clks), + .icc_clks = bimc_pcnoc_snoc_cnoc_ocmem_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_cnoc_ocmem_icc_clks), }; static struct clk_smd_rpm *msm8996_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_branch_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_branch_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_branch_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_branch_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -891,6 +896,8 @@ static struct clk_smd_rpm *msm8996_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8996 = { .clks = msm8996_clks, .num_clks = ARRAY_SIZE(msm8996_clks), + .icc_clks = msm8996_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8996_icc_clks), }; static struct clk_smd_rpm *qcs404_clks[] = { @@ -919,19 +926,15 @@ static struct clk_smd_rpm *qcs404_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { .clks = qcs404_clks, .num_clks = ARRAY_SIZE(qcs404_clks), + .icc_clks = bimc_pcnoc_snoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_icc_clks), }; static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, [RPM_SMD_DIV_CLK1] = &clk_smd_rpm_div_clk1, @@ -954,12 +957,6 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_LN_BB_CLK2_A_PIN] = &clk_smd_rpm_ln_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &clk_smd_rpm_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &clk_smd_rpm_ln_bb_clk3_a_pin, - [RPM_SMD_MMAXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMAXI_A_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, - [RPM_SMD_AGGR1_NOC_CLK] = &clk_smd_rpm_aggre1_noc_clk, - [RPM_SMD_AGGR1_NOC_A_CLK] = &clk_smd_rpm_aggre1_noc_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -979,27 +976,19 @@ static struct clk_smd_rpm *msm8998_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { .clks = msm8998_clks, .num_clks = ARRAY_SIZE(msm8998_clks), + .icc_clks = msm8998_icc_clks, + .num_icc_clks = ARRAY_SIZE(msm8998_icc_clks), }; static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_2_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_2_cnoc_a_clk, [RPM_SMD_CNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_CNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, - [RPM_SMD_MMSSNOC_AXI_CLK] = &clk_smd_rpm_mmssnoc_axi_rpm_clk, - [RPM_SMD_MMSSNOC_AXI_CLK_A] = &clk_smd_rpm_mmssnoc_axi_rpm_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_AGGR2_NOC_CLK] = &clk_smd_rpm_aggre2_noc_clk, - [RPM_SMD_AGGR2_NOC_A_CLK] = &clk_smd_rpm_aggre2_noc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, @@ -1025,15 +1014,13 @@ static struct clk_smd_rpm *sdm660_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { .clks = sdm660_clks, .num_clks = ARRAY_SIZE(sdm660_clks), + .icc_clks = sdm660_icc_clks, + .num_icc_clks = ARRAY_SIZE(sdm660_icc_clks), }; static struct clk_smd_rpm *mdm9607_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QPIC_CLK] = &clk_smd_rpm_qpic_clk, [RPM_SMD_QPIC_CLK_A] = &clk_smd_rpm_qpic_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, @@ -1047,21 +1034,15 @@ static struct clk_smd_rpm *mdm9607_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_mdm9607 = { .clks = mdm9607_clks, .num_clks = ARRAY_SIZE(mdm9607_clks), + .icc_clks = bimc_pcnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_icc_clks), }; static struct clk_smd_rpm *msm8953_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_PCNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, - [RPM_SMD_PCNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_1_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_SYSMMNOC_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_clk, - [RPM_SMD_SYSMMNOC_A_CLK] = &clk_smd_rpm_bus_2_sysmmnoc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, @@ -1083,23 +1064,19 @@ static struct clk_smd_rpm *msm8953_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_msm8953 = { .clks = msm8953_clks, .num_clks = ARRAY_SIZE(msm8953_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, @@ -1110,12 +1087,6 @@ static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &clk_smd_rpm_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &clk_smd_rpm_ln_bb_clk3_a, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1125,34 +1096,24 @@ static struct clk_smd_rpm *sm6125_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { .clks = sm6125_clks, .num_clks = ARRAY_SIZE(sm6125_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; /* SM6115 */ static struct clk_smd_rpm *sm6115_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_RF_CLK1] = &clk_smd_rpm_rf_clk1, [RPM_SMD_RF_CLK1_A] = &clk_smd_rpm_rf_clk1_a, [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, [RPM_SMD_CE1_CLK] = &clk_smd_rpm_ce1_clk, [RPM_SMD_CE1_A_CLK] = &clk_smd_rpm_ce1_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1166,27 +1127,17 @@ static struct clk_smd_rpm *sm6115_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6115 = { .clks = sm6115_clks, .num_clks = ARRAY_SIZE(sm6115_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *sm6375_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1203,31 +1154,21 @@ static struct clk_smd_rpm *sm6375_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_sm6375 = { .clks = sm6375_clks, .num_clks = ARRAY_SIZE(sm6375_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static struct clk_smd_rpm *qcm2290_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, - [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_2_snoc_clk, - [RPM_SMD_SNOC_A_CLK] = &clk_smd_rpm_bus_2_snoc_a_clk, - [RPM_SMD_BIMC_CLK] = &clk_smd_rpm_bimc_clk, - [RPM_SMD_BIMC_A_CLK] = &clk_smd_rpm_bimc_a_clk, [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_branch_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_branch_qdss_a_clk, [RPM_SMD_LN_BB_CLK2] = &clk_smd_rpm_ln_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &clk_smd_rpm_ln_bb_clk2_a, [RPM_SMD_RF_CLK3] = &clk_smd_rpm_38m4_rf_clk3, [RPM_SMD_RF_CLK3_A] = &clk_smd_rpm_38m4_rf_clk3_a, - [RPM_SMD_CNOC_CLK] = &clk_smd_rpm_bus_1_cnoc_clk, - [RPM_SMD_CNOC_A_CLK] = &clk_smd_rpm_bus_1_cnoc_a_clk, [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, - [RPM_SMD_QUP_CLK] = &clk_smd_rpm_qup_clk, - [RPM_SMD_QUP_A_CLK] = &clk_smd_rpm_qup_a_clk, - [RPM_SMD_MMRT_CLK] = &clk_smd_rpm_mmrt_clk, - [RPM_SMD_MMRT_A_CLK] = &clk_smd_rpm_mmrt_a_clk, - [RPM_SMD_MMNRT_CLK] = &clk_smd_rpm_mmnrt_clk, - [RPM_SMD_MMNRT_A_CLK] = &clk_smd_rpm_mmnrt_a_clk, [RPM_SMD_SNOC_PERIPH_CLK] = &clk_smd_rpm_bus_0_snoc_periph_clk, [RPM_SMD_SNOC_PERIPH_A_CLK] = &clk_smd_rpm_bus_0_snoc_periph_a_clk, [RPM_SMD_SNOC_LPASS_CLK] = &clk_smd_rpm_bus_5_snoc_lpass_clk, @@ -1249,6 +1190,8 @@ static struct clk_smd_rpm *qcm2290_clks[] = { static const struct rpm_smd_clk_desc rpm_clk_qcm2290 = { .clks = qcm2290_clks, .num_clks = ARRAY_SIZE(qcm2290_clks), + .icc_clks = sm_qnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(sm_qnoc_icc_clks) }; static const struct of_device_id rpm_smd_clk_match_table[] = { @@ -1324,6 +1267,15 @@ static int rpm_smd_clk_probe(struct platform_device *pdev) goto err; } + for (i = 0; i < desc->num_icc_clks; i++) { + if (!desc->icc_clks[i]) + continue; + + ret = clk_smd_rpm_handoff(desc->icc_clks[i]); + if (ret) + goto err; + } + if (!desc->scaling_before_handover) { ret = clk_smd_rpm_enable_scaling(); if (ret) From patchwork Tue May 30 10:20:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259702 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15100C7EE23 for ; Tue, 30 May 2023 10:20:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231324AbjE3KUO (ORCPT ); Tue, 30 May 2023 06:20:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229736AbjE3KUM (ORCPT ); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:08 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:03 +0200 Subject: [PATCH 04/20] clk: qcom: smd-rpm: Export clock scaling availability MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-4-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1931; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=vv9ovaVfudhM+q+5bDTICrg6LSXL32E3dDhuR4rNt6k=; b=/ynbR+DidbffM3nQVfBIlotgJXYyM7xDfgIAvWguD3MbX/y+Tz21Z3ModMTfX2ZnhmxTxTZmY rGXg7qPFu4TDYEbz++ruI7IA9iK9AGtL+ClI+4WyA6KXMk6XcLlm/Be X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Before we issue a call to RPM through clk_smd_rpm_enable_scaling() the clock rate requests will not be commited in hardware. This poses a race threat since we're accessing the bus clocks directly from within the interconnect framework. Add a marker to indicate that we're good to go with sending new requests and export it so that it can be referenced from icc. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 9 +++++++++ include/linux/soc/qcom/smd-rpm.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index b63f946e4520..f8f5977408e0 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -151,6 +151,7 @@ #define to_clk_smd_rpm(_hw) container_of(_hw, struct clk_smd_rpm, hw) static struct qcom_smd_rpm *rpmcc_smd_rpm; +static bool smd_rpm_clk_scaling; struct clk_smd_rpm { const int rpm_res_type; @@ -393,6 +394,12 @@ static unsigned long clk_smd_rpm_recalc_rate(struct clk_hw *hw, return r->rate; } +bool qcom_smd_rpm_scaling_available(void) +{ + return smd_rpm_clk_scaling; +} +EXPORT_SYMBOL_GPL(qcom_smd_rpm_scaling_available); + static int clk_smd_rpm_enable_scaling(void) { int ret; @@ -418,6 +425,8 @@ static int clk_smd_rpm_enable_scaling(void) return ret; } + smd_rpm_clk_scaling = true; + pr_debug("%s: RPM clock scaling is enabled\n", __func__); return 0; } diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 8190878645f9..420f6c79d535 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -65,4 +65,6 @@ int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, u32 resource_type, u32 resource_id, void *buf, size_t count); +bool qcom_smd_rpm_scaling_available(void); + #endif From patchwork Tue May 30 10:20:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E5A4C77B73 for ; Tue, 30 May 2023 10:20:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231401AbjE3KU1 (ORCPT ); Tue, 30 May 2023 06:20:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231404AbjE3KUU (ORCPT ); Tue, 30 May 2023 06:20:20 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 128C3FE for ; Tue, 30 May 2023 03:20:12 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-4f4f8b94c06so2808950e87.1 for ; Tue, 30 May 2023 03:20:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442010; x=1688034010; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1aF5NzyLnKl7zoihaKOQABOmTLo7g2FiY8plhOqJWWE=; b=KL18hG5ZcSfHdXMU8nINo0ozNDShQjM5vzvdQuBSHtY8YnyCUBmK0JZYp92oSvzksz PJQqas3ZWqa4uYoee36tPlrt6K10lXQHtVKYF2cW3gyGaV6CugK3HNjqBlEcjSbgyvhN BYPG0i2uXOVmHQYzYj2RmSu1sonzGpZobIdCyRq+Jwd8GauYG6o2hoq0OYgs8uyr9hl9 U7VB8/H3ET0xjVi+EcWBz/ldjf7CGA/Su/bH6nPnABwYhBT9ZymCpfSm/xqOZnuKqmHU DASloBUVF60q3Tw0cOG29oGQt9JmVyRg1kl/hmZpMueKIBgjlFNf0UYTO1VtgUIZKcca apjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442010; x=1688034010; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1aF5NzyLnKl7zoihaKOQABOmTLo7g2FiY8plhOqJWWE=; b=cZbNzISZV4naA+23RDVGrk7BQ6cRhWtGIiLu8Tlj8AnzP977/k7ZlQzUFeqdHmF453 9Le2lXGxrwyQo2mtvrHtPiq+XjKIWQL6Lo1Wv/ELkVNISascocpiszX2xYArh2iGzahg bP14f7fPgk2wpLOJcbc3IE9LYUh6mG7U48uG6z1xCriqf90qhlCfAFGY3WJsnWMJILjd E+kvQUhg+S1xFL0Kd5bpwKPUuIk59L9zcKk6lJAA+VEybJd4plYLO8Wn5e31BXrtI6xa Bdtcn18//bZ33lwIe+ThvX5xLgIfwQqb2vmSZ1v9iBRDf8X3TwBPfvbUVOjJvROKyh3i tBFA== X-Gm-Message-State: AC+VfDyWkqkZ3nJDTnEo59nqUEBqilc2Af+tq9IyGTvJbtujIDHpQNjC XQO4M3jA8dN8j1gfU1/xQiWOcQ== X-Google-Smtp-Source: ACHHUZ49jO4ej62nC5LYtMBcBGYeMuH4h/3xvYCghtPsS/zki7108GVeiL90tpIWHuwylPCqgq+a0A== X-Received: by 2002:a05:6512:243:b0:4f3:a485:919a with SMTP id b3-20020a056512024300b004f3a485919amr532930lfo.57.1685442010378; Tue, 30 May 2023 03:20:10 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:10 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:04 +0200 Subject: [PATCH 05/20] interconnect: qcom: icc-rpm: Introduce keep_alive MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-5-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=3600; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=k3FKq4hsanyAIvzotN0m6bauADNeL2Fo1rigqnJlDac=; b=hvFTnD/dH0Sj2ysZovpz3wr8bDb7GQWdzjJvH/HBaWZIqENeiuglNUMKjH8ib2RYdbqm3Aj/e ZPbjZA4ZiqTDbcPF408eXt58YEsIIk+Y0RIP/mR78KKzxnrjj8nlfwg X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The downstream kernel employs the concept of "keeping the bus alive" by voting for the minimum (XO/19.2MHz) rate at all times on certain (well, most) buses. This is a very important thing to have, as if we either have a lackluster/wrong DT that doesn't specify a (high enough) vote on a certain bus, we may lose access to the entire bus altogether. This is very apparent when we only start introducing interconnect support on a given platform and haven't yet introduced voting on all peripherals. The same can happen if we only have a single driver casting a vote on a certain bus and that driver exits/crashes/suspends. The keepalive vote is limited to the ACTIVE bucket, as keeping a permanent vote on the SLEEP one could prevent the platform from properly entering low power mode states. Introduce the very same concept, with a slight twist: the vendor kernel checks whether the rate is zero before setting the minimum vote, but that's rather silly, as in doing so we're at the mercy of CCF. Instead, explicitly clamp the rates to always be >= 19.2 MHz for providers with keep_alive=true. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.c | 10 ++++++++++ drivers/interconnect/qcom/icc-rpm.h | 3 +++ 2 files changed, 13 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 6acc7686ed38..863e8ba1daa2 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -50,6 +50,8 @@ #define NOC_QOS_MODE_FIXED_VAL 0x0 #define NOC_QOS_MODE_BYPASS_VAL 0x2 +#define ICC_BUS_CLK_MIN_RATE 19200000ULL + static int qcom_icc_set_qnoc_qos(struct icc_node *src) { struct icc_provider *provider = src->provider; @@ -380,6 +382,13 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) do_div(rate, src_qn->buswidth); rate = min_t(u64, rate, LONG_MAX); + /* + * Downstream checks whether the requested rate is zero, but it makes little sense + * to vote for a value that's below the lower threshold, so let's not do so. + */ + if (bucket == QCOM_ICC_BUCKET_WAKE && qp->keep_alive) + rate = max(ICC_BUS_CLK_MIN_RATE, rate); + if (qp->bus_clk_rate[i] == rate) continue; @@ -453,6 +462,7 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < qp->num_bus_clks; i++) qp->bus_clks[i].id = bus_clocks[i]; + qp->keep_alive = desc->keep_alive; qp->type = desc->type; qp->qos_offset = desc->qos_offset; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index ee705edf19dd..d2c04c400cad 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -33,6 +33,7 @@ enum qcom_icc_type { * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ struct qcom_icc_provider { @@ -45,6 +46,7 @@ struct qcom_icc_provider { u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; struct clk_bulk_data *intf_clks; + bool keep_alive; bool is_on; }; @@ -102,6 +104,7 @@ struct qcom_icc_desc { const char * const *bus_clocks; const char * const *intf_clocks; size_t num_intf_clocks; + bool keep_alive; bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; From patchwork Tue May 30 10:20:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34BC3C77B73 for ; Tue, 30 May 2023 10:20:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231247AbjE3KUh (ORCPT ); Tue, 30 May 2023 06:20:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231202AbjE3KUX (ORCPT ); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:11 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:05 +0200 Subject: [PATCH 06/20] interconnect: qcom: icc-rpm: Allow negative QoS offset MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-6-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1945; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=dz+IMFIwrWQG2KEgD4qzubF0Nm4zxh38RgJ42e7JIhs=; b=WeZHcBs3lJx2hai55HcZVPIZ/sVXkhnpLL5ugWyYPdfyR9RaNJXJ7v+qa64a2m6jWCME4R2N9 kTXkNXyLEmWBBtxpBx7iwaPecG2/pJVC/rQYYPybQZTHDGbu9cbIN6/ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org In some very very very very unfortunate cases, the correct offset of the QoS registers will be.. negative. One such case is MSM8998, where The DDR BWMON occupies what-would-be-the-BIMC-base which we usually take into account with the register calculation, making the actual BIMC node start at what-would-be-the-BIMC-base+0x300. In order to keep the calculation code sane, the simplest - however ugly it may be - solution is to allow the offset to be negative. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index d2c04c400cad..ba840a436cc0 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -29,10 +29,10 @@ enum qcom_icc_type { * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access - * @qos_offset: offset to QoS registers * @bus_clk_rate: bus clock rate in Hz * @bus_clks: the clk_bulk_data table of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @qos_offset: offset to QoS registers * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ @@ -42,7 +42,7 @@ struct qcom_icc_provider { int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; - unsigned int qos_offset; + int qos_offset; u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; struct clk_bulk_data *intf_clks; @@ -108,7 +108,7 @@ struct qcom_icc_desc { bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; - unsigned int qos_offset; + int qos_offset; }; /* Valid for all bus types */ From patchwork Tue May 30 10:20:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259706 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6490DC77B73 for ; Tue, 30 May 2023 10:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231424AbjE3KUj (ORCPT ); Tue, 30 May 2023 06:20:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231428AbjE3KUZ (ORCPT ); Tue, 30 May 2023 06:20:25 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AC63102 for ; Tue, 30 May 2023 03:20:13 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-4f3a9ad31dbso4875488e87.0 for ; Tue, 30 May 2023 03:20:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442013; x=1688034013; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=YXpPX+V016DK3obFf8nCV+Q/GF1NDka/0uxeVqd69BQ=; b=B+Cn0oFQ5SMP9WXDtsX9hwJH0SjF7/tGs4O/5AmDCrDkgb/DmnkQjKfnrQM+CGTW4H IdEDm44PWX/sdjIbCWbgR03POolJWG8g/hTt8E2BoVsijHe214t3o0ZuEy9HVcEkBh/y vSXvl1jW2d8/fsxwt1gCA8CcfoEyZTidDsGeTLz7/Mx6ncrJVfFAg0ZaFgnzD5nS0FV1 IqgN0/LSD4C+avZkspgC68d1JnOXcclCJUrRRvdJA6gDzNBFHfxqkVyuuW6GDoLDCFb9 b3wYPDMzHQhQNN+zOwYmBvGkLulVY68u/CJT3RjRIPKPfF+yE/v+9YSruDbHZehX3nn1 EOZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442013; x=1688034013; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YXpPX+V016DK3obFf8nCV+Q/GF1NDka/0uxeVqd69BQ=; b=OC07niflvfkoOmhVibgfESM3pfhOsUG4DFHjRjdCyk97uoDkka7oBDr0DfYDrO0HGM h76h/Td8TdYplrsirQ3Y63E4MMWXyp0KH0mfs4gN7FRn1r3vw3isMpRSfosPDqBiLnSQ s2XFyPhUsxncTyQ7AgSBkPOMXE8eprc8owRIBkWsF/2TMRMi7j8JXwWMFv2I7mYFOByH TIhCAwZs9RCeIG/sYtNvn7ljRTQDdEM8lpM7vX9HKe44XE9KJDQw1NwQ3b2twy+a1Rjn UiUhhXApjzypPliYkkpMvP6kZvVQ29kAjAgv8yIfaUGFjRag7QQfldacoNBCP2F5LbgW qUAw== X-Gm-Message-State: AC+VfDw2Ef56U5+4CUiy3Kgd7Ssaj+yI7KZGCzcl/7NcLVXyhA5umn/9 KFqQu9G+6WMd9JYJGuV7GSb23Q== X-Google-Smtp-Source: ACHHUZ6j7hxK81SGxXsj81wqT+xDXLwT1gYn/bvh0S55jZCA6yCMOgvFIKlLpwep2x6lUrkc8lDtUg== X-Received: by 2002:a05:6512:205:b0:4f4:b864:1da0 with SMTP id a5-20020a056512020500b004f4b8641da0mr564234lfo.15.1685442012992; Tue, 30 May 2023 03:20:12 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:12 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:06 +0200 Subject: [PATCH 07/20] interconnect: qcom: Fold smd-rpm.h into icc-rpm.h MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-7-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=5390; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=k9o2WvanUq3A1gpfgpXiIhI7lClCfoHSsc18fRAP/Qk=; b=yHL3hPi01D6q07uBGNPntSOLA+0oYKxzMsx8p7rN++4fHyPOD93hCQ1rE6O7un9HWmozHbvrP dhWtTt/fwP1ACCATWw8rVjNwoaGOAVKugUjddOzO6kFzcahsToE0rC1 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org smd-rpm.h is not very useful as-is and both files are always included anyway.. Combine them. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.c | 1 - drivers/interconnect/qcom/icc-rpm.h | 5 +++++ drivers/interconnect/qcom/msm8916.c | 1 - drivers/interconnect/qcom/msm8939.c | 1 - drivers/interconnect/qcom/msm8974.c | 2 +- drivers/interconnect/qcom/msm8996.c | 1 - drivers/interconnect/qcom/qcm2290.c | 1 - drivers/interconnect/qcom/qcs404.c | 1 - drivers/interconnect/qcom/sdm660.c | 1 - drivers/interconnect/qcom/smd-rpm.c | 2 +- drivers/interconnect/qcom/smd-rpm.h | 15 --------------- 11 files changed, 7 insertions(+), 24 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 863e8ba1daa2..b8ecf9538ab9 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -14,7 +14,6 @@ #include #include -#include "smd-rpm.h" #include "icc-common.h" #include "icc-rpm.h" diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index ba840a436cc0..9b4ea4e39b9f 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -6,6 +6,8 @@ #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H +#include + #include #define RPM_BUS_MASTER_REQ 0x73616d62 @@ -121,4 +123,7 @@ enum qos_mode { int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev); +bool qcom_icc_rpm_smd_available(void); +int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); + #endif diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 5c4ba2f37c8e..196b05879896 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -15,7 +15,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index caf0aefad668..639566dce45a 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -16,7 +16,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qcom/msm8974.c index 1828deaca443..968162213d40 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -38,7 +38,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" enum { MSM8974_BIMC_MAS_AMPSS_M0 = 1, diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 20340fb62fe6..1f7e88a37acd 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -18,7 +18,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" #include "msm8996.h" static const char * const mm_intf_clocks[] = { diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index a29cdb4fac03..cb636e67a5a4 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -19,7 +19,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { QCM2290_MASTER_APPSS_PROC = 1, diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index fae155344332..938283ddd0e3 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -13,7 +13,6 @@ #include -#include "smd-rpm.h" #include "icc-rpm.h" enum { diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 7ffaf70d62d3..003fc7d110a7 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -17,7 +17,6 @@ #include #include "icc-rpm.h" -#include "smd-rpm.h" enum { SDM660_MASTER_IPA = 1, diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index dc8ff8d133a9..b0183262ba66 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -13,7 +13,7 @@ #include #include -#include "smd-rpm.h" +#include "icc-rpm.h" #define RPM_KEY_BW 0x00007762 diff --git a/drivers/interconnect/qcom/smd-rpm.h b/drivers/interconnect/qcom/smd-rpm.h deleted file mode 100644 index ca9d0327b8ac..000000000000 --- a/drivers/interconnect/qcom/smd-rpm.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019, Linaro Ltd. - * Author: Georgi Djakov - */ - -#ifndef __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H -#define __DRIVERS_INTERCONNECT_QCOM_SMD_RPM_H - -#include - -bool qcom_icc_rpm_smd_available(void); -int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); - -#endif From patchwork Tue May 30 10:20:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C8CFC7EE2F for ; Tue, 30 May 2023 10:20:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230417AbjE3KUn (ORCPT ); Tue, 30 May 2023 06:20:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231449AbjE3KUZ (ORCPT ); Tue, 30 May 2023 06:20:25 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAC59110 for ; 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:13 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:07 +0200 Subject: [PATCH 08/20] interconnect: qcom: smd-rpm: Add rpmcc handling skeleton code MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-8-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=3840; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=lbirBFQbhuAVhAb0+63FVhDq39bzOe3C4uTqONUNCjk=; b=rst79zGQlnDddeNIjb0+n5GgA/RMNEm224Kx+DthzI+2wx5rd+xMKAxO7qVK8Bz9Rd3nJex7M hYe/L8ERvuDD7IQE+5gdB3oAxyh+b2ol3gLtbscGFwkIWT6v/66dsxn X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Introduce qcom_icc_rpm_set_bus_rate() in preparation for handling RPM clock resources within the interconnect framework. This lets us greatly simplify all of the code handling, as setting the rate comes down to: u32 rate_khz = max(clk.sleep_rate, clk.active_rate, clk_a.active_rate) write_to_rpm(clock.description, rate_khz); Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.h | 15 +++++++++++++++ drivers/interconnect/qcom/smd-rpm.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 9b4ea4e39b9f..aec192321411 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -22,6 +22,18 @@ enum qcom_icc_type { QCOM_ICC_QNOC, }; +/** + * struct rpm_clk_resource - RPM bus clock resource + * @resource_type: RPM resource type of the clock resource + * @clock_id: index of the clock resource of a specific resource type + * @branch: whether the resource represents a branch clock +*/ +struct rpm_clk_resource { + u32 resource_type; + u32 clock_id; + bool branch; +}; + #define NUM_BUS_CLKS 2 /** @@ -47,6 +59,7 @@ struct qcom_icc_provider { int qos_offset; u64 bus_clk_rate[NUM_BUS_CLKS]; struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + const struct rpm_clk_resource *bus_clk_desc; struct clk_bulk_data *intf_clks; bool keep_alive; bool is_on; @@ -104,6 +117,7 @@ struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; const char * const *bus_clocks; + const struct rpm_clk_resource *bus_clk_desc; const char * const *intf_clocks; size_t num_intf_clocks; bool keep_alive; @@ -125,5 +139,6 @@ int qnoc_remove(struct platform_device *pdev); bool qcom_icc_rpm_smd_available(void); int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); +int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, u32 active_rate, u32 sleep_rate); #endif diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index b0183262ba66..6c51e346b326 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -16,6 +16,7 @@ #include "icc-rpm.h" #define RPM_KEY_BW 0x00007762 +#define QCOM_RPM_SMD_KEY_RATE 0x007a484b static struct qcom_smd_rpm *icc_smd_rpm; @@ -44,6 +45,38 @@ int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val) } EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send); +int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, u32 active_rate, u32 sleep_rate) +{ + struct clk_smd_rpm_req req = { + .key = cpu_to_le32(QCOM_RPM_SMD_KEY_RATE), + .nbytes = cpu_to_le32(sizeof(u32)), + }; + int ret; + + /* Branch clocks are only on/off */ + if (clk->branch) { + active_rate = !!active_rate; + sleep_rate = !!sleep_rate; + } + + req.value = cpu_to_le32(active_rate); + ret = qcom_rpm_smd_write(icc_smd_rpm, + QCOM_SMD_RPM_ACTIVE_STATE, + clk->resource_type, + clk->clock_id, + &req, sizeof(req)); + if (ret) + return ret; + + req.value = cpu_to_le32(sleep_rate); + return qcom_rpm_smd_write(icc_smd_rpm, + QCOM_SMD_RPM_SLEEP_STATE, + clk->resource_type, + clk->clock_id, + &req, sizeof(req)); +} +EXPORT_SYMBOL_GPL(qcom_icc_rpm_set_bus_rate); + static int qcom_icc_rpm_smd_remove(struct platform_device *pdev) { icc_smd_rpm = NULL; @@ -60,6 +93,10 @@ static int qcom_icc_rpm_smd_probe(struct platform_device *pdev) return -ENODEV; } + /* We need the clock driver to kick things off first to avoid ugly races */ + if (!qcom_smd_rpm_scaling_available()) + return -EPROBE_DEFER; + return 0; } From patchwork Tue May 30 10:20:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259708 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D81BC7EE2F for ; Tue, 30 May 2023 10:20:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230353AbjE3KUq (ORCPT ); Tue, 30 May 2023 06:20:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231474AbjE3KUb (ORCPT ); Tue, 30 May 2023 06:20:31 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B89A129 for ; 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:15 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:08 +0200 Subject: [PATCH 09/20] interconnect: qcom: Add missing headers in icc-rpm.h MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-9-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=740; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=jTkx4EPVwXQN5FFZMT7EdA8vRYwWcRLDeFIEIuIiyzQ=; b=0/T2QmK3afylcI3Vrr1VjeycV0no3AjFREcQ8+Jjm103oHojwnH7NaZLHhWInbWiSc7tIUO7v AI6tRrVqk7gDgHmwPiO8rgO52Ife1mka9aSw4eN9pbVtDoMLomssIIp X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Currently the header does not provide all the required dependencies. Fix it. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index aec192321411..09abdd0c891e 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -6,6 +6,8 @@ #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H +#include +#include #include #include From patchwork Tue May 30 10:20:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89884C7EE37 for ; Tue, 30 May 2023 10:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231478AbjE3KVK (ORCPT ); Tue, 30 May 2023 06:21:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231493AbjE3KUd (ORCPT ); Tue, 30 May 2023 06:20:33 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DA65138 for ; Tue, 30 May 2023 03:20:18 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-4f3b5881734so4789705e87.0 for ; Tue, 30 May 2023 03:20:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442017; x=1688034017; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pAsONE171UzwSRGl6PgVe3dqdksBfyj5NkhGAc1S/Ww=; b=frjwm5PPxdjPiGGgAzrG8Q5lwh3+BhsiXLovKQDMq0uZpKXitrwro7by+xn/CDYrBw zszsFehxJaLGO25zKXK1SODyHv4w6oPWAC4nfjFFJpPgj3voUnR856kD73seoNdYGaGX e6VosZ5Cix+PmbkbixURnBrTBrhDTHIpGVWbLgKha4+TnfqewmdeWXWs+HyPdIvPTY0c 1WlLrMw1csWqKcGqhJep7Npx88HleuO9XtdxZ1kGoZA9bNfOG6bLPdEAoTzDpfPB02Vk aFQpmPsr0+V1QlqdMaucVr6dfAvQw8Owafu3OvN4WUBqmmW9mZOR8rHnZ83BkHup8wPv +lgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442017; x=1688034017; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pAsONE171UzwSRGl6PgVe3dqdksBfyj5NkhGAc1S/Ww=; b=ROidhyPsLiDot7VcA80+x8nnW6v3+U6BVDF0hrnrXH1mWM9XZZ6J1eGdq7MbN2JkU2 gtqBWFsY608psV/kLwahfzJPWsnnb33rbz0wYDxq6HyBucTCsb7IAlZuytKmF1KoFz9C /BgGXqUVvJbLQIAI9pI0n1wJ65B4UM1aOWchE9AdjUN7xKxrSu9RthFp8mRy3bgJ0kbE Ed4eRLofmzAlGr4BJSduhVv5y5PeULdCf9axpPrcx2MNCwmfCdQr7C6K3RYYwH68kzT7 FZeota505tlm4bGfN4qsQYQekdB/z13LL+XOzag2/44cvZdUeeRgCNwxN8S5X8yg9Tvw Ta1w== X-Gm-Message-State: AC+VfDwLcUQt2giwm+mTorTcd0oBP1cQC5hmF9wQmSwHgISlkl1nctio mhi9KgCERDVzwu4vOrlqYoz6gw== X-Google-Smtp-Source: ACHHUZ70f6Zg6og9613w5YSBYgODePBFDat5R6XPuwd4PZVcxJrzXZ8j54RPgNPYJihmJHvWIR5lxA== X-Received: by 2002:ac2:53a4:0:b0:4eb:c85:bdc2 with SMTP id j4-20020ac253a4000000b004eb0c85bdc2mr512659lfh.2.1685442016950; Tue, 30 May 2023 03:20:16 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:16 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:09 +0200 Subject: [PATCH 10/20] interconnect: qcom: Define RPM bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-10-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=3698; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=fXrsqgc0ESuIHhXQ72pw1fVDYdStaeM5EbSnljGFx/s=; b=dQGfnVFW1/E2mzOi1RzGRMIIivQGDxwKRv7adDq14OX8J/0R+OpkYstNp69Wb/gXFkT7LhSNN 4OBlzi7j5CnDZESYR4owbIci7A29ThOIOdN0qLUXa7Zr46MIZpvoptI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the definitions for RPM bus clocks that will be used by many different platforms. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/Makefile | 2 +- drivers/interconnect/qcom/icc-rpm-clocks.c | 66 ++++++++++++++++++++++++++++++ drivers/interconnect/qcom/icc-rpm.h | 13 ++++++ 3 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile index ab988926433c..80d9d2da95d1 100644 --- a/drivers/interconnect/qcom/Makefile +++ b/drivers/interconnect/qcom/Makefile @@ -29,7 +29,7 @@ qnoc-sm8250-objs := sm8250.o qnoc-sm8350-objs := sm8350.o qnoc-sm8450-objs := sm8450.o qnoc-sm8550-objs := sm8550.o -icc-smd-rpm-objs := smd-rpm.o icc-rpm.o +icc-smd-rpm-objs := smd-rpm.o icc-rpm.o icc-rpm-clocks.o obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += qnoc-msm8916.o diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c new file mode 100644 index 000000000000..a195bf32aff4 --- /dev/null +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Linaro Ltd + */ + +#include + +#include "icc-rpm.h" + +const struct rpm_clk_resource aggre1_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource aggre2_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource bimc_clk = { + .resource_type = QCOM_SMD_RPM_MEM_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_0_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_1_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource bus_2_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource mmaxi_0_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource mmaxi_1_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource qup_clk = { + .resource_type = QCOM_SMD_RPM_QUP_CLK, + .clock_id = 0, +}; + +/* Branch clocks */ +const struct rpm_clk_resource aggre1_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, + .branch = true, +}; + +const struct rpm_clk_resource aggre2_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, + .branch = true, +}; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 09abdd0c891e..e3df066fd94e 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -136,6 +136,19 @@ enum qos_mode { NOC_QOS_MODE_BYPASS, }; +extern const struct rpm_clk_resource aggre1_clk; +extern const struct rpm_clk_resource aggre2_clk; +extern const struct rpm_clk_resource bimc_clk; +extern const struct rpm_clk_resource bus_0_clk; +extern const struct rpm_clk_resource bus_1_clk; +extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource mmaxi_0_clk; +extern const struct rpm_clk_resource mmaxi_1_clk; +extern const struct rpm_clk_resource qup_clk; + +extern const struct rpm_clk_resource aggre1_branch_clk; +extern const struct rpm_clk_resource aggre2_branch_clk; + int qnoc_probe(struct platform_device *pdev); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:18 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:10 +0200 Subject: [PATCH 11/20] interconnect: qcom: sdm660: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-11-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1925; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=l3PUrbf2IpVVC4OrI1ps60fu75U4WFEl/eEO2eEzYSo=; b=tgIYZox4aB/s0xN4595qERFWi7YVOY0SBoSCRi7Qh7LlAjb6hkXyMYfdynSCD1IJ43FelINFx 20L+j26Kje1CB6XP8U7/y+Ie+5zY7ZqBRQXiN18pP4413H1NL7rORBl X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/sdm660.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 003fc7d110a7..5743ed680e8e 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1511,6 +1511,7 @@ static const struct qcom_icc_desc sdm660_a2noc = { .type = QCOM_ICC_NOC, .nodes = sdm660_a2noc_nodes, .num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes), + .bus_clk_desc = &aggre2_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &sdm660_a2noc_regmap_config, @@ -1539,6 +1540,7 @@ static const struct qcom_icc_desc sdm660_bimc = { .type = QCOM_ICC_BIMC, .nodes = sdm660_bimc_nodes, .num_nodes = ARRAY_SIZE(sdm660_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &sdm660_bimc_regmap_config, }; @@ -1593,6 +1595,7 @@ static const struct qcom_icc_desc sdm660_cnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_cnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &sdm660_cnoc_regmap_config, }; @@ -1655,6 +1658,7 @@ static const struct qcom_icc_desc sdm660_mnoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_mnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &sdm660_mnoc_regmap_config, @@ -1692,6 +1696,7 @@ static const struct qcom_icc_desc sdm660_snoc = { .type = QCOM_ICC_NOC, .nodes = sdm660_snoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &sdm660_snoc_regmap_config, }; From patchwork Tue May 30 10:20:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 744E1C7EE23 for ; Tue, 30 May 2023 10:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229763AbjE3KVl (ORCPT ); Tue, 30 May 2023 06:21:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231520AbjE3KUf (ORCPT ); Tue, 30 May 2023 06:20:35 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FD3FF7 for ; Tue, 30 May 2023 03:20:21 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-4f4b80bf93aso4655226e87.0 for ; Tue, 30 May 2023 03:20:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442019; x=1688034019; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=H7DWmLCdGqEf/q+BMZEZlk7majE2RGgcVcA51zytv0E=; b=jnzwK7Y9luGgg7vOaaVdy4c3PCxiP6bYBsrRVl2fvvziExdnJ6kEZAPM8wj7EdH/Lq JkyHwVafSkeMm2L6vzGcj9BPvCqx3CWyzrslSQPp4wv2GWzIJVUbyyOFO5cD9O/Fju9y uUGfGPNhZKYypMDkZ+7FD16reAQtR7q3SWzv464Xa45HA3CCpySn743iZkUfmLq9So2d WIs6GsN5bgLsyFiGcQMN9CeY5PGd5q0VhCv0ClVllNa2/V3VN/yTigAUiJoe+B03hs8D NWzLxn+KpzSYYbrwohD6hV+MJU545KrhhAVAEmYR0jIuLFHptO/wunAJvSf4nSeB6qBQ hbeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442019; x=1688034019; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H7DWmLCdGqEf/q+BMZEZlk7majE2RGgcVcA51zytv0E=; b=Wee9IAzBeOtj7tUdBjd4tE6RhkJgS7u4rVQuZPr5N8nLfgGboLfjAiF1U+5n2PDOMe NIj7LfDWb1cxb/wfQMpRjpniW/7YljVlmRAP06Vp+liDHDrGwGKP2/VOGdqFVFVqHnee drvL/R635ZgJb27fqOMCnYIi/LG+4LHJ8dhcNY5418iLs0uZGDNsnrGoONlotaBDzpUs oamzlg3M3fjkIigm1SqX/wasQLWH9cmv9xinPqyXbh/116zm2ISDffxXn/Ze+rAL+miA zvNREfngI92uiNBu5oJ4NXeFW936OfL9VdZfj8L3xtboFaINSnYS0pmHfzEbMbMpPeCK jAUA== X-Gm-Message-State: AC+VfDybpGoydoyM2DffaSeLBhgrl9TYEDH2PBEo1H6JTcHDwt8cn1cl VypREEPpIYX8l5euEg+z8YSX7g== X-Google-Smtp-Source: ACHHUZ5Q2oRW7zjh2J9Bk7Y8CRhlFRKmiHWvNNxhyh3VI2PaSYq306zJic61KK3Z7BTCHj5rft4JVA== X-Received: by 2002:a19:f014:0:b0:4f3:b0e1:feba with SMTP id p20-20020a19f014000000b004f3b0e1febamr478349lfc.16.1685442019523; Tue, 30 May 2023 03:20:19 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:19 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:11 +0200 Subject: [PATCH 12/20] interconnect: qcom: msm8996: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-12-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=2380; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=TaIfixyKBYRQeIS1br7snYRsSDaKvcJKwpT4t95RY0U=; b=Rp0EzNYLsPzprtxcz/msPWgT1ZpddZfE7cxNvahSENIVKvfmALP/647gy7kwrymjPUBCd2MKl IxspyATxmaiAM8z1kD/CEss/jjjEEkxKnAij68goIANCW1WNJsjNUTi X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/msm8996.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index 1f7e88a37acd..a596f4035d2e 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1840,6 +1840,7 @@ static const struct qcom_icc_desc msm8996_a1noc = { .type = QCOM_ICC_NOC, .nodes = a1noc_nodes, .num_nodes = ARRAY_SIZE(a1noc_nodes), + .bus_clk_desc = &aggre1_branch_clk, .regmap_cfg = &msm8996_a1noc_regmap_config }; @@ -1861,6 +1862,7 @@ static const struct qcom_icc_desc msm8996_a2noc = { .type = QCOM_ICC_NOC, .nodes = a2noc_nodes, .num_nodes = ARRAY_SIZE(a2noc_nodes), + .bus_clk_desc = &aggre2_branch_clk, .intf_clocks = a2noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks), .regmap_cfg = &msm8996_a2noc_regmap_config @@ -1889,6 +1891,7 @@ static const struct qcom_icc_desc msm8996_bimc = { .type = QCOM_ICC_BIMC, .nodes = bimc_nodes, .num_nodes = ARRAY_SIZE(bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8996_bimc_regmap_config }; @@ -1947,6 +1950,7 @@ static const struct qcom_icc_desc msm8996_cnoc = { .type = QCOM_ICC_NOC, .nodes = cnoc_nodes, .num_nodes = ARRAY_SIZE(cnoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &msm8996_cnoc_regmap_config }; @@ -2000,6 +2004,7 @@ static const struct qcom_icc_desc msm8996_mnoc = { .type = QCOM_ICC_NOC, .nodes = mnoc_nodes, .num_nodes = ARRAY_SIZE(mnoc_nodes), + .bus_clk_desc = &mmaxi_0_clk, .intf_clocks = mm_intf_clocks, .num_intf_clocks = ARRAY_SIZE(mm_intf_clocks), .regmap_cfg = &msm8996_mnoc_regmap_config @@ -2038,6 +2043,7 @@ static const struct qcom_icc_desc msm8996_pnoc = { .type = QCOM_ICC_NOC, .nodes = pnoc_nodes, .num_nodes = ARRAY_SIZE(pnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8996_pnoc_regmap_config }; @@ -2082,6 +2088,7 @@ static const struct qcom_icc_desc msm8996_snoc = { .type = QCOM_ICC_NOC, .nodes = snoc_nodes, .num_nodes = ARRAY_SIZE(snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8996_snoc_regmap_config }; From patchwork Tue May 30 10:20:12 2023 Content-Type: text/plain; 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:20 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:12 +0200 Subject: [PATCH 13/20] interconnect: qcom: qcs404: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-13-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1230; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=T8n09Sxnfaf4a9P8gR8uI0Eqx4cTlCAqOBT58LgHFQo=; b=CHJefv1YEpkMoX2ECAe54VJMyXIa8aGNkGU89yAoN5AYy4D/HXF6I0WAi3xDdxRaZkC9C1GW2 oMhzv/PoNZKAD2Q0FkNrTPdxiZ5HpdHshk0h+KVB5ltezUfEGUutjMD X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/qcs404.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index 938283ddd0e3..9deb4d81104e 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -984,6 +984,7 @@ static struct qcom_icc_node * const qcs404_bimc_nodes[] = { }; static const struct qcom_icc_desc qcs404_bimc = { + .bus_clk_desc = &bimc_clk, .nodes = qcs404_bimc_nodes, .num_nodes = ARRAY_SIZE(qcs404_bimc_nodes), }; @@ -1038,6 +1039,7 @@ static struct qcom_icc_node * const qcs404_pcnoc_nodes[] = { }; static const struct qcom_icc_desc qcs404_pcnoc = { + .bus_clk_desc = &bus_0_clk, .nodes = qcs404_pcnoc_nodes, .num_nodes = ARRAY_SIZE(qcs404_pcnoc_nodes), }; @@ -1066,6 +1068,7 @@ static struct qcom_icc_node * const qcs404_snoc_nodes[] = { }; static const struct qcom_icc_desc qcs404_snoc = { + .bus_clk_desc = &bus_1_clk, .nodes = qcs404_snoc_nodes, .num_nodes = ARRAY_SIZE(qcs404_snoc_nodes), }; From patchwork Tue May 30 10:20:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD767C7EE31 for ; Tue, 30 May 2023 10:21:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231467AbjE3KVp (ORCPT ); Tue, 30 May 2023 06:21:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231473AbjE3KVE (ORCPT ); Tue, 30 May 2023 06:21:04 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDE7A1BB for ; Tue, 30 May 2023 03:20:23 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4f4c264f6c6so4838787e87.3 for ; Tue, 30 May 2023 03:20:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442022; x=1688034022; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CR+0em3GpCANRHldk9JU4PWpumHfW3iAUBiSmQ2eF1I=; b=e9lC3oTsWajr/O02O+p/3/y4omPDftEKS8Tz+16IYuMy6pEklqi128Nuv8sJDOnOvj pYJwD39SyDjgrRHi7SlDD+vd+VuosWHDMds5m0rhbYrAPgHbLOmSJIOnWxrkpBRwx9V+ agWxWL/kNG79EtYGMQ4xh3SAd6vsvzhULDAlZxfea1lAg3ZBt6hsr/PnNhFOwHT4T+e/ R1mduj4fkUUSQQveVdiby/gJM4GNbglGj/U9QQhvRkAa1+xIpXi5dYVPmXTkZ6FZdSmr BGvW5NZpJou/LuqENKc3HK9EuHHmcBXWj6ff7ry7V5LT/T4LNCIELQBY9DheKMhSiwnY swyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442022; x=1688034022; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CR+0em3GpCANRHldk9JU4PWpumHfW3iAUBiSmQ2eF1I=; b=AY4EBwEA6XV6ZrcxbLlNwU/FU7w3Ds7JO5GgVwe9D7hc1gcJeBv8edCHtR+E4AXaU+ wAqAtqIx5JQAcONxTnMmuKe8claqldwxoIEEgwSbyVhIP5WcUYMZRut+lTUADwNGJKUF xPyyp8zDMArIOnd7GYwULuZWZqI4fFyWOREH8l52MuSPMdDJCvRx67gwpwd388RuKLoS A1QW+e1ca0K8ApFY3MxpDnSSU5JCS+xB7lY1RjzECuO0S85+WCItxXlM9/22sAYn7cwx 6pePQt7ap2cA5EMA4NxOdPZcpMEW8Osu5d4dvHUDBaPqzjKSKJRI5c3QtfKYU99m8MM7 +BPg== X-Gm-Message-State: AC+VfDxQPm8jfc8dfSyGc/vapDlaOdgyhLzI5VjGaFh+XCIRuY4RffWp StY1H0f8KCncPb+DiIcdG2sb6Q== X-Google-Smtp-Source: ACHHUZ7hslOpJLuxk00r9E9dB0xL/7mn5/Fq1WmpBr/w7sfzLntQkFAYkVPPyB/1JSIEYrPoDSbbNw== X-Received: by 2002:ac2:44ac:0:b0:4f3:a44d:6982 with SMTP id c12-20020ac244ac000000b004f3a44d6982mr528945lfm.45.1685442022025; Tue, 30 May 2023 03:20:22 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:21 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:13 +0200 Subject: [PATCH 14/20] interconnect: qcom: msm8939: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-14-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1621; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=BzBOG/hZueCjmgEDIlJxmzcotc3IrE0BhEB5lZiOOVU=; b=IUtiwOzEUrRLXx4rxJl4psLwCWnuyxeJBvMFhE7RZHP29Qf/A9LfTelYYFSJPdyXzvSXZRuCk XFgd2lxy9OyC22G4IfTNOtFNGrAU52KVz8EvietTGj0AIgVGuQCEcfc X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/msm8939.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index 639566dce45a..94b11b590a8e 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -1284,6 +1284,7 @@ static const struct qcom_icc_desc msm8939_snoc = { .type = QCOM_ICC_NOC, .nodes = msm8939_snoc_nodes, .num_nodes = ARRAY_SIZE(msm8939_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8939_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1304,6 +1305,7 @@ static const struct qcom_icc_desc msm8939_snoc_mm = { .type = QCOM_ICC_NOC, .nodes = msm8939_snoc_mm_nodes, .num_nodes = ARRAY_SIZE(msm8939_snoc_mm_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &msm8939_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1332,6 +1334,7 @@ static const struct qcom_icc_desc msm8939_bimc = { .type = QCOM_ICC_BIMC, .nodes = msm8939_bimc_nodes, .num_nodes = ARRAY_SIZE(msm8939_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8939_bimc_regmap_config, .qos_offset = 0x8000, }; @@ -1403,6 +1406,7 @@ static const struct qcom_icc_desc msm8939_pcnoc = { .type = QCOM_ICC_NOC, .nodes = msm8939_pcnoc_nodes, .num_nodes = ARRAY_SIZE(msm8939_pcnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8939_pcnoc_regmap_config, .qos_offset = 0x7000, }; From patchwork Tue May 30 10:20:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 599A0C7EE37 for ; Tue, 30 May 2023 10:21:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231474AbjE3KVn (ORCPT ); Tue, 30 May 2023 06:21:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231458AbjE3KVE (ORCPT ); Tue, 30 May 2023 06:21:04 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B252C1B5 for ; Tue, 30 May 2023 03:20:23 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-4f50a8f6dd7so1114351e87.2 for ; Tue, 30 May 2023 03:20:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442023; x=1688034023; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+qSFOcsV0DAXJFWKPUmOzUAy/JWGLyINLrQd4hvqeSM=; b=FpbpdslZAFcI2oaJi04YzwD3fpnArOhrFp+b98rHH3m23Xct7Fr1tmhnN2ecsoIT7K 9DW1o6ISIs1aKI4H/mA2GrNEUQ1mXRwYd/vbSYfmSyRIuV0HlSCVhOZDzFEE9ADfCrLb iw+Rp4WalZVVoDS58K94Y3oRaTxR/7FxaQjEv0LMu5gBRjwFxzlr2Kf0Xeh1/WfV1LiY 0XlrYzKUdIsUlXKpB1yY4d+r3Xu4zJH3mgiyhn4pAv2QaUB/GrlWR6aHU00nU1cZvt0P 36WJP1ACUNQwyiZvyBq06V/TUYuiHYaGXFKmHfPO8M9aplqmj3MLrId3VCDQtc2Ec13I lR0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442023; x=1688034023; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+qSFOcsV0DAXJFWKPUmOzUAy/JWGLyINLrQd4hvqeSM=; b=fDIvZDi3wUEPBqzV9y8y7fPcBpiTtR/fusKCft/OatJ7Z4JKBQrUtpTLyNBu6cygL9 GpxcuiOiuv9nTePOnarXnZN2rbYoPGqJa7094WkSG3X8VnIFIcHf89RcwCADmgmnu9Ch tK0LvQwWlh7w0AHSAWs5RZ1Y99s8QVvfqo8qoXJy/RNDvSlInZUhzyQBAn4z/KkJdmX0 pbl9Juhl41EnDR1zTnVmO4ZZsN0sMkqAEOdw04mIDmEocK/L2S/kihM301PPQ1Hy27Qv NRoY8E65FxMpw3tYmWECjuRhzxrfE//h5X5x3HkpHsScdfiu2mVwoEdiGKinWxf2NWnA reXA== X-Gm-Message-State: AC+VfDynx9MqQYCxWEmgSJdAEQUCmFkgbqQUBazUm5AGqGyVInn5e4g8 rR6wSSB0I0alBvikQhBIbAa9nQ== X-Google-Smtp-Source: ACHHUZ6QQvouPXfYS8BugnmPnCGYIcty49vUckZ7sy4PVMOc33IY4PYaE+yeNeF/RCfguWkDJnKMPw== X-Received: by 2002:ac2:5605:0:b0:4f4:ce78:2f17 with SMTP id v5-20020ac25605000000b004f4ce782f17mr502768lfd.13.1685442023213; Tue, 30 May 2023 03:20:23 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:22 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:14 +0200 Subject: [PATCH 15/20] interconnect: qcom: msm8916: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-15-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=1325; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=PpYTHoQR3MZyHfK/p/ldjvDJLVIB+4TUtliZoMmCQCI=; b=RB0sQmu+yq6qlV9WxbTiZ2dx6GlzrzVs3Abp9B3pjGMXqhbKMK/+HqtDJw4rFrkyWcJdaNZW+ STMgFUUosIFAegR+d8oIgwxmrZaQq11w2NQ8Z9zdE1aFP5587g4EsJz X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/msm8916.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index 196b05879896..be2a190a8b52 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -1231,6 +1231,7 @@ static const struct qcom_icc_desc msm8916_snoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_snoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &msm8916_snoc_regmap_config, .qos_offset = 0x7000, }; @@ -1259,6 +1260,7 @@ static const struct qcom_icc_desc msm8916_bimc = { .type = QCOM_ICC_BIMC, .nodes = msm8916_bimc_nodes, .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &msm8916_bimc_regmap_config, .qos_offset = 0x8000, }; @@ -1328,6 +1330,7 @@ static const struct qcom_icc_desc msm8916_pcnoc = { .type = QCOM_ICC_NOC, .nodes = msm8916_pcnoc_nodes, .num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes), + .bus_clk_desc = &bus_0_clk, .regmap_cfg = &msm8916_pcnoc_regmap_config, .qos_offset = 0x7000, }; From patchwork Tue May 30 10:20:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6841DC7EE37 for ; Tue, 30 May 2023 10:21:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231466AbjE3KVr (ORCPT ); Tue, 30 May 2023 06:21:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230416AbjE3KVG (ORCPT ); Tue, 30 May 2023 06:21:06 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ED0AE47 for ; Tue, 30 May 2023 03:20:26 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-4f50470d77cso1929871e87.0 for ; Tue, 30 May 2023 03:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685442024; x=1688034024; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=uPsObl2eYSl57hf5e5vm23MgLVAf+ptSP7UWMFS0yPo=; b=GCk1DfL2fR9t/b7umBJBdnOvjrJ/TffAQUWuIHBKjt/DjKcu112buWgxQ/LJqezHLg F46c/5aNA8YqUo2xe/0V8OWlIJwXxvgoOisTYJ+Uzbv/GCs1uY3h0GfJgP5LdyhhGyml Y+ZdhuaZZPZgnRrpEqT17+VWDqYxRSEphbkQHOnAT/dzR774ShybNVqr37UIkOIXeE4S +U9hlTTAcKgIwFvjOau/FV54KDT0ceqw5MDRnOKDiPoJ7kcM2dQq0JAlbzIk/g7+pTVI w2tlAjfp6aqPJKeuR+EqgYYiAJM2DqL435PKRDZ0Hy2FOCC4j3UTeuTXrVtMvSq5gXqI aSSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685442024; x=1688034024; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uPsObl2eYSl57hf5e5vm23MgLVAf+ptSP7UWMFS0yPo=; b=LkxzLDUfhXK0aF9UQeIgiPmtcFVha4EOs6UkSC95XMIBcQo2jBv7VJ8CnP5OVUJLhW eztdFOCiFLo60rPIGqCETnPf3ooO5VdixMK61xhWwVL0N17foo9aixaS/nSsHYgodh0W bwLb0Y3a8fgpQSK4QFYNA/kKzjLHOwx8Pf3eCJANzWGR9f5rSjb2U1QaclOSzSjJqnQL lonq2FGm7PPTiMSc0/I3fvS0b7SQVcXJwI5IggIJP2ye//1AWZX62BV2mmN0yLuh1zuJ UY6VAD7IVEQFU1RmKperc1XJzRxKTc1m9CXirz+cZGUhLzlurBvJ5PahqobyRWRHK6Sc 33LQ== X-Gm-Message-State: AC+VfDy2dby1rdylHp4tVOH3UZ1OEAfLZ8bY9xcLBF6ICV9wVbtQtHw/ 3vQHOsGtS5ivsXQ2l6elshq9Eg== X-Google-Smtp-Source: ACHHUZ5lx5CViTuxeCcbtsZno9zIJuTRjy6vwdA0lVXdpg+inNfAo6L2vz5c7z7veiFVr/3l4uuDzA== X-Received: by 2002:ac2:5ec8:0:b0:4f1:496a:de8e with SMTP id d8-20020ac25ec8000000b004f1496ade8emr545614lfq.27.1685442024386; Tue, 30 May 2023 03:20:24 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:24 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:15 +0200 Subject: [PATCH 16/20] interconnect: qcom: qcm2290: Hook up RPM bus clk definitions MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-16-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=2327; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=AUnOBPS3NkcXCeAuiWAp3wlQXXz7ZJbGDI1WK0MkbBw=; b=mLVX0sFuQDPC2wh7J2YOL5ld7fn2UowkaahJmgkTbqaWoLJxCQZDC0Fla4quzPPDLOJp4TM90 Y3vaMNbw5x6C1yknb9hhIeXRjjCD50gwSrF5PLDrDmqUwmqXl7BZQRK X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Assign the necessary definitions to migrate to the new bus clock handling mechanism. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/qcm2290.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index cb636e67a5a4..2c7a76fab83c 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -1196,6 +1196,7 @@ static const struct qcom_icc_desc qcm2290_bimc = { .type = QCOM_ICC_BIMC, .nodes = qcm2290_bimc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_bimc_nodes), + .bus_clk_desc = &bimc_clk, .regmap_cfg = &qcm2290_bimc_regmap_config, /* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */ .qos_offset = 0x8000, @@ -1251,6 +1252,7 @@ static const struct qcom_icc_desc qcm2290_cnoc = { .type = QCOM_ICC_NOC, .nodes = qcm2290_cnoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_cnoc_nodes), + .bus_clk_desc = &bus_1_clk, .regmap_cfg = &qcm2290_cnoc_regmap_config, }; @@ -1292,6 +1294,7 @@ static const struct qcom_icc_desc qcm2290_snoc = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_snoc_nodes, .num_nodes = ARRAY_SIZE(qcm2290_snoc_nodes), + .bus_clk_desc = &bus_2_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, /* Vendor DT node fab-sys_noc property 'qcom,base-offset' */ .qos_offset = 0x15000, @@ -1306,6 +1309,7 @@ static const struct qcom_icc_desc qcm2290_qup_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_qup_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_qup_virt_nodes), + .bus_clk_desc = &qup_clk, }; static struct qcom_icc_node * const qcm2290_mmnrt_virt_nodes[] = { @@ -1319,6 +1323,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmnrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmnrt_virt_nodes), + .bus_clk_desc = &mmaxi_0_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; @@ -1333,6 +1338,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = { .type = QCOM_ICC_QNOC, .nodes = qcm2290_mmrt_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_mmrt_virt_nodes), + .bus_clk_desc = &mmaxi_1_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, .qos_offset = 0x15000, }; From patchwork Tue May 30 10:20:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4E3CC7EE31 for ; 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:26 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:16 +0200 Subject: [PATCH 17/20] interconnect: qcom: icc-rpm: Control bus rpmcc from icc MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-17-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=10121; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=aP8J4AdQjIOY3Lruog99oSFWs3dB/beHPwMsHaT8NM0=; b=BTicK7c8Y8zFMTWNrtDt1ThVN8wH/NLxl58tobKhIX3ziqJowswFL+toUM8ZIZZR71yAlIL1r EVeUhpglyf6D4uELpdM9VZLXYhvlpkDWw+JOSMRakLnMAH72qz+zz6w X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The sole purpose of bus clocks that were previously registered with rpmcc was to convey the aggregated bandwidth to RPM. There's no good reason to keep them outside the interconnect framework, as it only adds to the plentiful complexity. Add the required code to handle these clocks from within SMD RPM ICC. RPM-owned bus clocks are no longer considered a thing, but sadly we have to allow for the existence of HLOS-owned bus clocks, as some (mostly older) SoCs (ab)use these for bus scaling (e.g. MSM8998 and &mmcc AHB_CLK_SRC). This in turn is trivially solved with a single *clk, which is filled and used iff qp.bus_clk_desc is absent and we have a "bus" clock-names entry in the DT node. This change should(tm) be fully compatible with all sorts of old Device Trees as far as the interconnect functionality goes (modulo abusing bus clock handles, but that's a mistake in and of itself). Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 116 +++++++++++++++++++----------------- drivers/interconnect/qcom/icc-rpm.h | 13 ++-- drivers/interconnect/qcom/msm8996.c | 1 - drivers/interconnect/qcom/sdm660.c | 1 - 4 files changed, 66 insertions(+), 65 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index b8ecf9538ab9..d08eefd963f4 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -49,7 +49,7 @@ #define NOC_QOS_MODE_FIXED_VAL 0x0 #define NOC_QOS_MODE_BYPASS_VAL 0x2 -#define ICC_BUS_CLK_MIN_RATE 19200000ULL +#define ICC_BUS_CLK_MIN_RATE 19200ULL /* kHz */ static int qcom_icc_set_qnoc_qos(struct icc_node *src) { @@ -338,11 +338,10 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; struct icc_provider *provider; u64 sum_bw; - u64 rate; + u64 active_rate, sleep_rate; u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS]; u64 max_agg_avg; - int ret, i; - int bucket; + int ret; src_qn = src->data; if (dst) @@ -364,49 +363,50 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } - for (i = 0; i < qp->num_bus_clks; i++) { - /* - * Use WAKE bucket for active clock, otherwise, use SLEEP bucket - * for other clocks. If a platform doesn't set interconnect - * path tags, by default use sleep bucket for all clocks. - * - * Note, AMC bucket is not supported yet. - */ - if (!strcmp(qp->bus_clks[i].id, "bus_a")) - bucket = QCOM_ICC_BUCKET_WAKE; - else - bucket = QCOM_ICC_BUCKET_SLEEP; - - rate = icc_units_to_bps(max(agg_avg[bucket], agg_peak[bucket])); - do_div(rate, src_qn->buswidth); - rate = min_t(u64, rate, LONG_MAX); - - /* - * Downstream checks whether the requested rate is zero, but it makes little sense - * to vote for a value that's below the lower threshold, so let's not do so. - */ - if (bucket == QCOM_ICC_BUCKET_WAKE && qp->keep_alive) - rate = max(ICC_BUS_CLK_MIN_RATE, rate); - - if (qp->bus_clk_rate[i] == rate) - continue; - - ret = clk_set_rate(qp->bus_clks[i].clk, rate); - if (ret) { - pr_err("%s clk_set_rate error: %d\n", - qp->bus_clks[i].id, ret); + /* Some providers don't have a bus clock to scale */ + if (!qp->bus_clk_desc) + return 0; + + /* Intentionally keep the rates in kHz as that's what RPM accepts */ + active_rate = max(agg_avg[QCOM_SMD_RPM_ACTIVE_STATE], + agg_peak[QCOM_SMD_RPM_ACTIVE_STATE]); + do_div(active_rate, src_qn->buswidth); + + sleep_rate = max(agg_avg[QCOM_SMD_RPM_SLEEP_STATE], + agg_peak[QCOM_SMD_RPM_SLEEP_STATE]); + do_div(sleep_rate, src_qn->buswidth); + + /* + * Downstream checks whether the requested rate is zero, but it makes little sense + * to vote for a value that's below the lower threshold, so let's not do so. + */ + if (qp->keep_alive) + active_rate = max(ICC_BUS_CLK_MIN_RATE, active_rate); + + /* Some providers have a non-RPM-owned bus clock - convert kHz->Hz for the CCF */ + if (qp->bus_clk) + return clk_set_rate(qp->bus_clk, 1000ULL * max(active_rate, sleep_rate)); + + /* RPM only accepts <=INT_MAX rates */ + active_rate = min_t(u32, active_rate, INT_MAX); + sleep_rate = min_t(u32, sleep_rate, INT_MAX); + + if ((active_rate != qp->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]) || + (sleep_rate != qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE])) { + ret = qcom_icc_rpm_set_bus_rate(qp->bus_clk_desc, + active_rate, + sleep_rate); + if (ret) return ret; - } - qp->bus_clk_rate[i] = rate; } + /* Cache the rate after we've successfully commited it to RPM */ + qp->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE] = active_rate; + qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate; + return 0; } -static const char * const bus_clocks[] = { - "bus", "bus_a", -}; - int qnoc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -448,6 +448,18 @@ int qnoc_probe(struct platform_device *pdev) if (!qp->intf_clks) return -ENOMEM; + if (desc->bus_clk_desc) { + qp->bus_clk_desc = devm_kzalloc(dev, sizeof(*qp->bus_clk_desc), + GFP_KERNEL); + if (!qp->bus_clk_desc) + return -ENOMEM; + + qp->bus_clk_desc = desc->bus_clk_desc; + } else if (!IS_ERR(devm_clk_get(dev, "bus"))) { + /* Some older SoCs may have a single non-RPM-owned bus clock. */ + qp->bus_clk = devm_clk_get(dev, "bus"); + } + data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), GFP_KERNEL); if (!data) @@ -457,10 +469,6 @@ int qnoc_probe(struct platform_device *pdev) for (i = 0; i < cd_num; i++) qp->intf_clks[i].id = cds[i]; - qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS; - for (i = 0; i < qp->num_bus_clks; i++) - qp->bus_clks[i].id = bus_clocks[i]; - qp->keep_alive = desc->keep_alive; qp->type = desc->type; qp->qos_offset = desc->qos_offset; @@ -490,13 +498,11 @@ int qnoc_probe(struct platform_device *pdev) } regmap_done: - ret = devm_clk_bulk_get(dev, qp->num_bus_clks, qp->bus_clks); - if (ret) - return ret; - - ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks); - if (ret) - return ret; + if (qp->bus_clk) { + ret = clk_prepare_enable(qp->bus_clk); + if (ret) + return ret; + } ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks); if (ret) @@ -566,7 +572,8 @@ int qnoc_probe(struct platform_device *pdev) icc_provider_deregister(provider); err_remove_nodes: icc_nodes_remove(provider); - clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); + if (qp->bus_clk) + clk_disable_unprepare(qp->bus_clk); return ret; } @@ -578,7 +585,8 @@ int qnoc_remove(struct platform_device *pdev) icc_provider_deregister(&qp->provider); icc_nodes_remove(&qp->provider); - clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks); + if (qp->bus_clk) + clk_disable_unprepare(qp->bus_clk); return 0; } diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index e3df066fd94e..2c8c0399378b 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -36,32 +36,29 @@ struct rpm_clk_resource { bool branch; }; -#define NUM_BUS_CLKS 2 - /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider - * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) * @num_intf_clks: the total number of intf_clks clk_bulk_data entries * @type: the ICC provider type * @regmap: regmap for QoS registers read/write access * @bus_clk_rate: bus clock rate in Hz - * @bus_clks: the clk_bulk_data table of bus clocks + * @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks * @intf_clks: a clk_bulk_data array of interface clocks + * @bus_clk: a pointer to a HLOS-owned bus clock * @qos_offset: offset to QoS registers * @keep_alive: whether to always keep a minimum vote on the bus clocks * @is_on: whether the bus is powered on */ struct qcom_icc_provider { struct icc_provider provider; - int num_bus_clks; int num_intf_clks; enum qcom_icc_type type; struct regmap *regmap; int qos_offset; - u64 bus_clk_rate[NUM_BUS_CLKS]; - struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; + u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM]; const struct rpm_clk_resource *bus_clk_desc; + struct clk *bus_clk; struct clk_bulk_data *intf_clks; bool keep_alive; bool is_on; @@ -118,12 +115,10 @@ struct qcom_icc_node { struct qcom_icc_desc { struct qcom_icc_node * const *nodes; size_t num_nodes; - const char * const *bus_clocks; const struct rpm_clk_resource *bus_clk_desc; const char * const *intf_clocks; size_t num_intf_clocks; bool keep_alive; - bool no_clk_scaling; enum qcom_icc_type type; const struct regmap_config *regmap_cfg; int qos_offset; diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index a596f4035d2e..8081b3cb1025 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -1818,7 +1818,6 @@ static const struct qcom_icc_desc msm8996_a0noc = { .num_nodes = ARRAY_SIZE(a0noc_nodes), .intf_clocks = a0noc_intf_clocks, .num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks), - .no_clk_scaling = true, .regmap_cfg = &msm8996_a0noc_regmap_config }; diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index 5743ed680e8e..211fa1fa569c 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -1618,7 +1618,6 @@ static const struct qcom_icc_desc sdm660_gnoc = { .nodes = sdm660_gnoc_nodes, .num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes), .regmap_cfg = &sdm660_gnoc_regmap_config, - .no_clk_scaling = true, }; static struct qcom_icc_node * const sdm660_mnoc_nodes[] = { From patchwork Tue May 30 10:20:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D71C0C7EE33 for ; Tue, 30 May 2023 10:21:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229727AbjE3KVu (ORCPT ); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:27 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:17 +0200 Subject: [PATCH 18/20] interconnect: qcom: icc-rpm: Fix bucket number MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-18-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=2704; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=WF7ldM/Iz77YHgJ7F9fOqcoIKTA2NJmusrp1SsEdUMk=; b=jpkYdzXFWDoKVAz6AYnYdeSgan0HtBADUGl0JQy3WSI4gTlBsf42eR6LIDlTuIhwdOUjc1Dib V0akIqRTNZFBmAj8ZwpWux0ulUXBCBoU3tCV0eSyHE+Y7H6ENAf+5YH X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org SMD RPM only provides two buckets, one each for the active-only and active-sleep RPM contexts. Use the correct constant to allocate and operate on them. Fixes: dcbce7b0a79c ("interconnect: qcom: icc-rpm: Support multiple buckets") Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/icc-rpm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index d08eefd963f4..db84bf56bde3 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -249,7 +249,7 @@ static void qcom_icc_pre_bw_aggregate(struct icc_node *node) size_t i; qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { qn->sum_avg[i] = 0; qn->max_peak[i] = 0; } @@ -275,7 +275,7 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, if (!tag) tag = QCOM_ICC_TAG_ALWAYS; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (tag & BIT(i)) { qn->sum_avg[i] += avg_bw; qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw); @@ -300,11 +300,11 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, { struct icc_node *node; struct qcom_icc_node *qn; - u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; + u64 sum_avg[QCOM_SMD_RPM_STATE_NUM]; int i; /* Initialise aggregate values */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { agg_avg[i] = 0; agg_peak[i] = 0; } @@ -317,7 +317,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, */ list_for_each_entry(node, &provider->nodes, node_list) { qn = node->data; - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) { if (qn->channels) sum_avg[i] = div_u64(qn->sum_avg[i], qn->channels); else @@ -328,7 +328,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, } /* Find maximum values across all buckets */ - for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) + for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) *max_agg_avg = max_t(u64, *max_agg_avg, agg_avg[i]); } @@ -339,7 +339,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct icc_provider *provider; u64 sum_bw; u64 active_rate, sleep_rate; - u64 agg_avg[QCOM_ICC_NUM_BUCKETS], agg_peak[QCOM_ICC_NUM_BUCKETS]; + u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; u64 max_agg_avg; int ret; From patchwork Tue May 30 10:20:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33BC3C7EE39 for ; Tue, 30 May 2023 10:21:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231499AbjE3KVt (ORCPT ); Tue, 30 May 2023 06:21:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231578AbjE3KVJ (ORCPT ); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:28 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:18 +0200 Subject: [PATCH 19/20] interconnect: qcom: icc-rpm: Set bandwidth on both contexts MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-19-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=3312; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=qwy/rjk4gKlt7mY7+plyZcBiZlb68NtNwjzvIjVvGOU=; b=TSrtQgnLSkKbMLjsdHmWuil358LrQjiLY6mWR3H//Z/UJ07p68RNaRM0lPXg4jcFrEXb/r+cX DY94IAx3ZplBbeDRplEwqZVhac08z3sjaDGhy0NnLzHj+j54KpfmbyU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Up until now, for some reason we've only been setting bandwidth values on the active-only context. That pretty much meant that RPM could lift all votes when entering sleep mode. Or never sleep at all. That in turn could potentially break things like USB wakeup, as the connection between APSS and SNoC/PNoC would simply be dead. Set the values appropriately. Fixes: 30c8fa3ec61a ("interconnect: qcom: Add MSM8916 interconnect provider driver") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 54 +++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index db84bf56bde3..59be704364bb 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -205,34 +205,39 @@ static int qcom_icc_qos_set(struct icc_node *node) } } -static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 sum_bw) +static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw) { - int ret = 0; + int ret, rpm_ctx = 0; + u64 bw_bps; if (qn->qos.ap_owned) return 0; - if (qn->mas_rpm_id != -1) { - ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE, - RPM_BUS_MASTER_REQ, - qn->mas_rpm_id, - sum_bw); - if (ret) { - pr_err("qcom_icc_rpm_smd_send mas %d error %d\n", - qn->mas_rpm_id, ret); - return ret; + for (rpm_ctx = 0; rpm_ctx < QCOM_SMD_RPM_STATE_NUM; rpm_ctx++) { + bw_bps = icc_units_to_bps(bw[rpm_ctx]); + + if (qn->mas_rpm_id != -1) { + ret = qcom_icc_rpm_smd_send(rpm_ctx, + RPM_BUS_MASTER_REQ, + qn->mas_rpm_id, + bw_bps); + if (ret) { + pr_err("qcom_icc_rpm_smd_send mas %d error %d\n", + qn->mas_rpm_id, ret); + return ret; + } } - } - if (qn->slv_rpm_id != -1) { - ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE, - RPM_BUS_SLAVE_REQ, - qn->slv_rpm_id, - sum_bw); - if (ret) { - pr_err("qcom_icc_rpm_smd_send slv %d error %d\n", - qn->slv_rpm_id, ret); - return ret; + if (qn->slv_rpm_id != -1) { + ret = qcom_icc_rpm_smd_send(rpm_ctx, + RPM_BUS_SLAVE_REQ, + qn->slv_rpm_id, + bw_bps); + if (ret) { + pr_err("qcom_icc_rpm_smd_send slv %d error %d\n", + qn->slv_rpm_id, ret); + return ret; + } } } @@ -337,7 +342,6 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) struct qcom_icc_provider *qp; struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; struct icc_provider *provider; - u64 sum_bw; u64 active_rate, sleep_rate; u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; u64 max_agg_avg; @@ -351,14 +355,12 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); - sum_bw = icc_units_to_bps(max_agg_avg); - - ret = qcom_icc_rpm_set(src_qn, sum_bw); + ret = qcom_icc_rpm_set(src_qn, agg_avg); if (ret) return ret; if (dst_qn) { - ret = qcom_icc_rpm_set(dst_qn, sum_bw); + ret = qcom_icc_rpm_set(dst_qn, agg_avg); if (ret) return ret; } From patchwork Tue May 30 10:20:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13259719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C48DDC7EE23 for ; Tue, 30 May 2023 10:22:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231551AbjE3KWS (ORCPT ); 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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:29 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:19 +0200 Subject: [PATCH 20/20] interconnect: qcom: Divide clk rate by src node bus width MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-20-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=2453; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=A2xuhtZVawiVfe99Wd1nS5W5Zg3I4zNjmwvGs3s+zi0=; b=hkQXVBfrqCLUDeLOKO2rhZ5dD/3o6xqfIHgI3EXCatqQweKw8yTc3FhFffUDySUhf/LCxUByx +Yb4EPlILCzAbDncb5Lgpb65iONQ74ZFI9cP48gahIkZsk8/cTTuqBk X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Ever since the introduction of SMD RPM ICC, we've been dividing the clock rate by the wrong bus width. This has resulted in: - setting wrong (mostly too low) rates, affecting performance - most often /2 or /4 - things like DDR never hit their full potential - the rates were only correct if src bus width == dst bus width for all src, dst pairs on a given bus - Qualcomm using the same wrong logic in their BSP driver in msm-5.x that ships in production devices today - me losing my sanity trying to find this Resolve it by using dst_qn, if it exists. Fixes: 5e4e6c4d3ae0 ("interconnect: qcom: Add QCS404 interconnect provider driver") Signed-off-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpm.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 59be704364bb..58e2a8b1b7c3 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -340,7 +340,7 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) { struct qcom_icc_provider *qp; - struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL; + struct qcom_icc_node *src_qn = NULL, *dst_qn = NULL, *qn = NULL; struct icc_provider *provider; u64 active_rate, sleep_rate; u64 agg_avg[QCOM_SMD_RPM_STATE_NUM], agg_peak[QCOM_SMD_RPM_STATE_NUM]; @@ -353,6 +353,8 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) provider = src->provider; qp = to_qcom_provider(provider); + qn = dst_qn ? dst_qn : src_qn; + qcom_icc_bus_aggregate(provider, agg_avg, agg_peak, &max_agg_avg); ret = qcom_icc_rpm_set(src_qn, agg_avg); @@ -372,11 +374,11 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) /* Intentionally keep the rates in kHz as that's what RPM accepts */ active_rate = max(agg_avg[QCOM_SMD_RPM_ACTIVE_STATE], agg_peak[QCOM_SMD_RPM_ACTIVE_STATE]); - do_div(active_rate, src_qn->buswidth); + do_div(active_rate, qn->buswidth); sleep_rate = max(agg_avg[QCOM_SMD_RPM_SLEEP_STATE], agg_peak[QCOM_SMD_RPM_SLEEP_STATE]); - do_div(sleep_rate, src_qn->buswidth); + do_div(sleep_rate, qn->buswidth); /* * Downstream checks whether the requested rate is zero, but it makes little sense