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Wysocki" , , Lukas Wunner , Mario Limonciello Subject: [PATCH v5 1/2] PCI: Refactor pci_bridge_d3_possible() Date: Tue, 30 May 2023 11:39:46 -0500 Message-ID: <20230530163947.230418-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT023:EE_|PH8PR12MB8430:EE_ X-MS-Office365-Filtering-Correlation-Id: 2f4084fd-1b5f-41f1-f8c0-08db612c993c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ncbdg4dC8gpBttNSn0rC3eVfWU54EL5VIGsTFJFv3a9ZG6XyeO2KLQQb/ZpGdc6y5zljUeVHX+D35/aw9+ufnF0ApvPJkYe4EuKiBFUYToAmJBo6YCDVW7SWvGD1vzss37TKNUIZMGEONJsPg+3C3+uNEvuu42oZmQUTs0RWkWH03nfkEj7LDo3KwfSS+cyomZ+PcVqIoWL5bx1Lp6mOVN4uRt3O894BXVLbnOVYY8bBwRVwy0HsOSQF+qhhoDwl9y3fDi2XsfRWDw9XS36JNvG8HoqQzK7QnPqG3Gt8MZ4DvwDgjBpXW4rQlXABbE4VX+fdXeU54JYU1d0BVjp1DV+L2Z/mmKdw+6HxVo/r6fgMfGCax3Idrlmz4Xh4W9fX85SSEhb0EWZZvige2X609cslXpBCc1YikMEUf5A9lQdSII37kHjyobTIgDHVf0MkG9wE7D8JlMdu1VdhpBjyloWpYsL+d07kqG0mZeWO5dc2uU30k47sefFFB8yyvFHA1XhLpiz52/+L0adbs5W18pmZopN0cpTGmXV7tYcN1laDxMcE7uub+hRW89dnDCiPC93iQof/sya/ht3SRsWfU6tS0QZum0TRYiGtsCgqaSdZHfQIIGvAiGqLxmtqAncUXJNzMSCNOqf92V9ejFwr2GQBuzkj0IPU5TIXFzD0fN0o5kSG55KT2VK7ndt5f+VNpPSGSdtRilKrPufT0wvYTI6C02KGyHs5cZv9ujNrSl9OT/YnqhiGKGZp/qdV7nxR2Ibr2McR5Fzq0rbYa3Mz3A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(396003)(346002)(39860400002)(376002)(451199021)(46966006)(40470700004)(36840700001)(7696005)(356005)(81166007)(40460700003)(26005)(40480700001)(6666004)(1076003)(82740400003)(36756003)(5660300002)(478600001)(36860700001)(186003)(16526019)(86362001)(2616005)(336012)(426003)(4326008)(70586007)(70206006)(6916009)(47076005)(54906003)(41300700001)(2906002)(82310400005)(316002)(83380400001)(8936002)(8676002)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 May 2023 16:40:37.9952 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2f4084fd-1b5f-41f1-f8c0-08db612c993c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB8430 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org All of the cases handled by pci_bridge_d3_possible() are specific to these branches: ``` case PCI_EXP_TYPE_ROOT_PORT: case PCI_EXP_TYPE_UPSTREAM: case PCI_EXP_TYPE_DOWNSTREAM: ``` Drop a level of indentation by returning false in the default case instead. No intended functional changes. Acked-by: Rafael J. Wysocki Reviewed-by: Mika Westerberg Signed-off-by: Mario Limonciello --- v4->v5: * Add tags v3->v4: * New patch --- drivers/pci/pci.c | 68 +++++++++++++++++++++++------------------------ 1 file changed, 34 insertions(+), 34 deletions(-) base-commit: 7877cb91f1081754a1487c144d85dc0d2e2e7fc4 diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 5ede93222bc1..d1fa040bcea7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2978,48 +2978,48 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) case PCI_EXP_TYPE_ROOT_PORT: case PCI_EXP_TYPE_UPSTREAM: case PCI_EXP_TYPE_DOWNSTREAM: - if (pci_bridge_d3_disable) - return false; + break; + default: + return false; + } - /* - * Hotplug ports handled by firmware in System Management Mode - * may not be put into D3 by the OS (Thunderbolt on non-Macs). - */ - if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge)) - return false; + if (pci_bridge_d3_disable) + return false; - if (pci_bridge_d3_force) - return true; + /* + * Hotplug ports handled by firmware in System Management Mode + * may not be put into D3 by the OS (Thunderbolt on non-Macs). + */ + if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge)) + return false; - /* Even the oldest 2010 Thunderbolt controller supports D3. */ - if (bridge->is_thunderbolt) - return true; + if (pci_bridge_d3_force) + return true; - /* Platform might know better if the bridge supports D3 */ - if (platform_pci_bridge_d3(bridge)) - return true; + /* Even the oldest 2010 Thunderbolt controller supports D3. */ + if (bridge->is_thunderbolt) + return true; - /* - * Hotplug ports handled natively by the OS were not validated - * by vendors for runtime D3 at least until 2018 because there - * was no OS support. - */ - if (bridge->is_hotplug_bridge) - return false; + /* Platform might know better if the bridge supports D3 */ + if (platform_pci_bridge_d3(bridge)) + return true; - if (dmi_check_system(bridge_d3_blacklist)) - return false; + /* + * Hotplug ports handled natively by the OS were not validated + * by vendors for runtime D3 at least until 2018 because there + * was no OS support. + */ + if (bridge->is_hotplug_bridge) + return false; - /* - * It should be safe to put PCIe ports from 2015 or newer - * to D3. - */ - if (dmi_get_bios_year() >= 2015) - return true; - break; - } + if (dmi_check_system(bridge_d3_blacklist)) + return false; - return false; + /* + * It should be safe to put PCIe ports from 2015 or newer + * to D3. + */ + return dmi_get_bios_year() >= 2015; } static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) From patchwork Tue May 30 16:39:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13260762 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E51AC7EE31 for ; Tue, 30 May 2023 16:40:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232680AbjE3Qko (ORCPT ); Tue, 30 May 2023 12:40:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232065AbjE3Qkm (ORCPT ); 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Tue, 30 May 2023 11:40:37 -0500 From: Mario Limonciello To: Bjorn Helgaas CC: , , "Mika Westerberg" , S-k Shyam-sundar , Natikar Basavaraj , Deucher Alexander , "Rafael J . Wysocki" , , Lukas Wunner , Mario Limonciello , Iain Lane , Kuppuswamy Sathyanarayanan Subject: [PATCH v5 2/2] PCI: Don't assume root ports are power manageable Date: Tue, 30 May 2023 11:39:47 -0500 Message-ID: <20230530163947.230418-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230530163947.230418-1-mario.limonciello@amd.com> References: <20230530163947.230418-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT051:EE_|DM4PR12MB5181:EE_ X-MS-Office365-Filtering-Correlation-Id: 5204f739-286f-483c-0089-08db612c99c6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Upj25H1hKnxMB2jAXXO9F2wpxJ2soyta2n68xxaN5TZkIMxLiHeAZRCQOc/mkYcSR0WEFZSsozBUxCUCrZCNlpkKu9l5rybDWcCS11jnrP5l9ZuDoKo2JfAGv5zoD57Qh8LxfNiz4jv8dmI2Lmhiuta6ffw5N1KeVON6NukWNRqncklgq9Facz0HHnK87E+aV2hg+hg9e3zlEq4ZZbfkge3Ey4c8ODjBebC2CFkffK2hhcaU4cSmH/DeQ0XLO4YDsjlhS+MXepqKNcKr813MWW39ZPTi5OYIIe6III3scARZagXQAKzT0vzWocqmMSoiF/LZJG7prUZ098yxh1NB4ZFp1VwX81gOZkRhzRWAhhPdk1lIBlf0DiXHFvRU0dxLfnCoZCpqg/LFtDHshle/uglLwfvkaLM/q4BDW+tTvI9GSk96MlRbKR2sSJuQ95Zr2TaTlhUtk8RXPL8dabiNOt3TJMoZ6x5ppbRrFA+ex5pm0ECY0EPhRp41ZftGqoHk3OreBdsPSu4UhPgTa8kU7wKP2Lsqv0AZIQmWWFQgP3FqCag1XhIQEVP/GODyOaODMB+6dE5wslL6SAN1xvI9sVew/MdPccOWLhfFyC6zRgP2VbRHLASwK5HbQBcG0RJIhLkpydf7PxfW4AT6gzXmOGjHaelE7rYiMSfgMmuDJwb9OCNGw6YB5qUWkWC6xN6F1T3x7iQ4be0T4extC43EBzSPGsSgPweePccnbz8me5F7jMTvnA8j2KNggqXF9O1NZws4pOVy+zYfrOAi9bT4gQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(346002)(376002)(396003)(39860400002)(451199021)(40470700004)(46966006)(36840700001)(966005)(186003)(16526019)(2616005)(41300700001)(426003)(336012)(83380400001)(26005)(1076003)(66574015)(7696005)(6666004)(36860700001)(47076005)(478600001)(40460700003)(54906003)(4326008)(81166007)(356005)(6916009)(82740400003)(70206006)(70586007)(40480700001)(316002)(5660300002)(8676002)(8936002)(44832011)(2906002)(86362001)(82310400005)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 May 2023 16:40:38.8934 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5204f739-286f-483c-0089-08db612c99c6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT051.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5181 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Using a USB keyboard or mouse to wakeup the system from s2idle fails when that xHCI device is connected to a USB-C port for an AMD USB4 router. Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") all PCIe ports go into D3 during s2idle. When specific root ports are put into D3 over s2idle on some AMD platforms it is not possible for the platform to properly identify wakeup sources. This happens whether the root port goes into D3hot or D3cold. Comparing registers between Linux and Windows 11 this behavior to put these specific root ports into D3 at suspend is unique to Linux. On an affected system Windows does not put those specific root ports into D3 over Modern Standby. Windows avoids putting Root Ports that are not power manageable (e.g do not have platform firmware support) into low power states. Linux shouldn't assume root ports support D3 just because they're on a machine newer than 2015, the ports should also be deemed power manageable. Add an extra check explicitly for root ports to ensure D3 isn't selected for them if they are not power-manageable through platform firmware. Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") Reported-by: Iain Lane Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121 Acked-by: Rafael J. Wysocki Reviewed-by: Kuppuswamy Sathyanarayanan Reviewed-by: Mika Westerberg Signed-off-by: Mario Limonciello --- v4->v5: * Add tags * Fix title * Adjust commit message v3->v4: * Move after refactor --- drivers/pci/pci.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index d1fa040bcea7..d293db963327 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3015,6 +3015,14 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) if (dmi_check_system(bridge_d3_blacklist)) return false; + /* + * It's not safe to put root ports that don't support power + * management into D3. + */ + if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT && + !platform_pci_power_manageable(bridge)) + return false; + /* * It should be safe to put PCIe ports from 2015 or newer * to D3.