From patchwork Thu Jun 1 09:39:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13263226 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 342F2C7EE2F for ; Thu, 1 Jun 2023 09:39:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232793AbjFAJji (ORCPT ); Thu, 1 Jun 2023 05:39:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232932AbjFAJj3 (ORCPT ); Thu, 1 Jun 2023 05:39:29 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3BCAE74 for ; Thu, 1 Jun 2023 02:39:14 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-4f50470d77cso718358e87.0 for ; Thu, 01 Jun 2023 02:39:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685612352; x=1688204352; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=g6Zyh9SS/ay5C8X6ZpDqvKWzoRMQVLw0+Knzztfmr6U=; b=vUFRGvUBj2vao0+xRbhI2W6IhVqThUUSAMyyU7+vepX6BqoSt4CRtAMpukhCjRGnDk 0JMSv2JhoZF0E2jAFmYsr0Vf8sWnMa66EDczESM3rYqSGwOODIVZGNAcFbmw3sWflmGB wYI9Xn2UeEmcSi005tL9M57VqpDuM50QUAykyKJRz7sYOp+P5qw1PNsNVKPqX5WTxBbq 92z0qxSNksuMEvePSoQ0i2GVDUeklGy2Wg0UmEZ71GdgIQMQ0qAKRG+1Rp5FGHcQmNe1 QGbHm5v9/Rsqe6i8LPWeOeLCcKKm+c2Rra5v9+6oRv5Jjcy5DHtnK8VYKSHcwFHrfpq0 kC3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685612352; x=1688204352; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g6Zyh9SS/ay5C8X6ZpDqvKWzoRMQVLw0+Knzztfmr6U=; b=S8B/7ewb1sidhk0GchbkNDRTIq1vF0vhgssoF3kbQL6pGXoMswdyESeB5K9T1TQshF h4iUB/EC3biEtuTW6LdTNF6YQHRy/vLaGu5uvxaAiFHZwrINdvGCAFhFux/eY5HqQDff hn/LLlg/oeaICvxQz1aJfj8UvqWMqF1SJvrOvVJvIIuiJa+gwvdZzKdHmjOrMDE04vwi AitEMUdYGGuD7VZ3HfmWDagQp4Cq1gtpiBSWwXayxeKScMdGWXW+5LYs6LFzkr3urvYC M5trV1O75mEaDT0fDD853zbFFFrRK7wk2bRBX1mZ5S0CJN/rbiTsrxGEufeIUvtHFQqm 5NcQ== X-Gm-Message-State: AC+VfDxQsKGG/yDyFT6At4TN077Viq6u5ovt4Suuzqb/8wT8AzfE3DNT JWD2bXSl+rI+GfNpd+HOUGHO4A== X-Google-Smtp-Source: ACHHUZ5Y8h+x8Wx9jb6ZilqY5aQZXMqvnwtKWR/FNfO0LQraJ01cwVW2QLzUT3WGsDUlYRN8qI4TIQ== X-Received: by 2002:ac2:5deb:0:b0:4f2:40dd:e2cf with SMTP id z11-20020ac25deb000000b004f240dde2cfmr1006787lfq.55.1685612352392; Thu, 01 Jun 2023 02:39:12 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id v3-20020a056512048300b004f3b258feefsm1031119lfq.179.2023.06.01.02.39.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 02:39:12 -0700 (PDT) From: Konrad Dybcio Date: Thu, 01 Jun 2023 11:39:07 +0200 Subject: [PATCH 1/2] clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi) MIME-Version: 1.0 Message-Id: <20230601-topic-alpha_ctl-v1-1-b6a932dfcf68@linaro.org> References: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org> In-Reply-To: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Iskren Chernev Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685612350; l=2006; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=wYVC8kdHJdhvnMuMnLKibz47EG2aGZVDSm2mijcxJhM=; b=H/wQbdL0OfMcmYF31Muucv9e8Y7m1Ku/adaUr5wH7HSFZoLNywx+S3xNliNCQmZmE65dFR5at ocJiQSpxaKuAZx85XvQwtUbafzOoFp3gs9IprHtdFk9jb61DJK6kTHD X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The "vanilla" Alpha PLL configs are sometimes provided with an intention to only update certain bits of th register. Do so if a mask is found. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-alpha-pll.c | 19 +++++++++++++++---- drivers/clk/qcom/clk-alpha-pll.h | 2 ++ 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index f81c7c561352..e4ef645f65d1 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -384,10 +384,21 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val); - clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), - config->test_ctl_val); - clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), - config->test_ctl_hi_val); + if (config->test_ctl_mask) + regmap_update_bits(regmap, PLL_TEST_CTL(pll), + config->test_ctl_mask, + config->test_ctl_val); + else + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), + config->test_ctl_val); + + if (config->test_ctl_hi_mask) + regmap_update_bits(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_mask, + config->test_ctl_hi_val); + else + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_val); if (pll->flags & SUPPORTS_FSM_MODE) qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 6ff0d08eb938..e4bd863027ab 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -123,7 +123,9 @@ struct alpha_pll_config { u32 user_ctl_hi_val; u32 user_ctl_hi1_val; u32 test_ctl_val; + u32 test_ctl_mask; u32 test_ctl_hi_val; + u32 test_ctl_hi_mask; u32 test_ctl_hi1_val; u32 test_ctl_hi2_val; u32 main_output_mask; From patchwork Thu Jun 1 09:39:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13263227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2E99C7EE31 for ; Thu, 1 Jun 2023 09:39:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231889AbjFAJjk (ORCPT ); Thu, 1 Jun 2023 05:39:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232050AbjFAJjd (ORCPT ); Thu, 1 Jun 2023 05:39:33 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A28CE78 for ; Thu, 1 Jun 2023 02:39:15 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-4f4c264f6c6so687136e87.3 for ; Thu, 01 Jun 2023 02:39:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685612353; x=1688204353; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Xc5Z7FdibsmGdwgiV/8KbQWxOT9Tiw8Cs0GSujQgOBc=; b=V6vNXKj3f3bcLUGmfjMz1T8gwhhuAfK6vlnFGaabrtwXigrsETkfdE+uPDOEY/GHU7 uNN32i4fXCGshKm7FNAfx8hlkyLo2L2nMBUKLeEi2n9nV5uN3UO3LmHOZobhqadBar0x 6QfZ515Z09n5cbOp2tl8z2NPPAxOTRhzxGGyQH978ElFZSVKxCaE6EADUXziPXN4Wo31 Ddw3UqawQPgq5zBwUApGZPZvCegs9Dg8+UOzxm0zMnia2Jd6vDnbXKGAiNdxCnnnog12 ENE3baNWaovtzbPLj4rMQPBCfwBSLbSOvXuL+EtyitzbjdDe30h29kd1FXxaSUXHIEBI MgAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685612353; x=1688204353; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xc5Z7FdibsmGdwgiV/8KbQWxOT9Tiw8Cs0GSujQgOBc=; b=Z/3m4ZpEx6Kv9pbGyZbe2h/h4myQ3RrQwRg1/zNNhs3qI0TqbKWdANSNYkOAjbFaoA PMBRANnpJDh/fOHEDUKgL0XpTCVUcSzyA7vHTLxdGyzTYiPePnlmDXw7cptwwpGAMJrB a/4li1wkVgO8Gag3O3Qu6ovZAEUYYU/aM7dJI0C+SvKggRO0QTvCAR7ANwD+PdQEmKNL fz8uVBVscP3lwCd/6vdVQ/cLRa5MXLD02yiPc8a5IU7Sb+0kcvEH3v8mULnFg3OnKkFG L9hCluZ4c5FGkDowmS1JVKj2rybvxzd7oLBg2eOsgADbJ24tpTL3S89zDvycH2Hha67t tcsQ== X-Gm-Message-State: AC+VfDxhCabed9f41DIbUv/rAbFZ4DebMscI3gOF+gIbeGfTuME4Vh61 J3J9jiHoytKipTpl4iRwlFLUpw== X-Google-Smtp-Source: ACHHUZ7IFtTrJRawCjuqtPt6AMA2+XViWBjkBWsRc8UqEwdcLoyo8qk51EgzMkfXz9GQPXlSx0QP3Q== X-Received: by 2002:ac2:4214:0:b0:4ec:8524:65a4 with SMTP id y20-20020ac24214000000b004ec852465a4mr801852lfh.55.1685612353425; Thu, 01 Jun 2023 02:39:13 -0700 (PDT) Received: from [192.168.1.101] (abyj77.neoplus.adsl.tpnet.pl. [83.9.29.77]) by smtp.gmail.com with ESMTPSA id v3-20020a056512048300b004f3b258feefsm1031119lfq.179.2023.06.01.02.39.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 02:39:13 -0700 (PDT) From: Konrad Dybcio Date: Thu, 01 Jun 2023 11:39:08 +0200 Subject: [PATCH 2/2] clk: qcom: gcc-sm6115: Add missing PLL config properties MIME-Version: 1.0 Message-Id: <20230601-topic-alpha_ctl-v1-2-b6a932dfcf68@linaro.org> References: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org> In-Reply-To: <20230601-topic-alpha_ctl-v1-0-b6a932dfcf68@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Iskren Chernev Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685612350; l=1703; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=SPvCmzGhftB/XAFnbpI3W945MryOao+OxYb3yPb5WLA=; b=uGXQdD8bVwAhRq4ZoZThpA9708kDy5PvmDdfw0OR+wSrx/VVrfjEvTo0oMvQnX2USKv7X49/s sqLe0MHvgTTCKwf2DsNlypPUHln9cUvl2/My+YBt5zNO26e3gpZc/UV X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When the driver was ported upstream, PLL ctl register values were omitted. Add them to ensure the PLLs are fully configured like we expect them to. Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115") Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gcc-sm6115.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/qcom/gcc-sm6115.c b/drivers/clk/qcom/gcc-sm6115.c index 5f09aefa7fb9..033e308ff865 100644 --- a/drivers/clk/qcom/gcc-sm6115.c +++ b/drivers/clk/qcom/gcc-sm6115.c @@ -119,6 +119,8 @@ static const struct alpha_pll_config gpll10_config = { .vco_mask = GENMASK(21, 20), .main_output_mask = BIT(0), .config_ctl_val = 0x4001055b, + .test_ctl_hi1_val = 0x1, + .test_ctl_hi_mask = 0x1, }; static struct clk_alpha_pll gpll10 = { @@ -170,6 +172,8 @@ static const struct alpha_pll_config gpll11_config = { .vco_val = 0x2 << 20, .vco_mask = GENMASK(21, 20), .config_ctl_val = 0x4001055b, + .test_ctl_hi1_val = 0x1, + .test_ctl_hi_mask = 0x1, }; static struct clk_alpha_pll gpll11 = { @@ -362,6 +366,8 @@ static const struct alpha_pll_config gpll8_config = { .post_div_val = 0x1 << 8, .post_div_mask = GENMASK(11, 8), .config_ctl_val = 0x4001055b, + .test_ctl_hi1_val = 0x1, + .test_ctl_hi_mask = 0x1, }; static struct clk_alpha_pll gpll8 = { @@ -413,6 +419,8 @@ static const struct alpha_pll_config gpll9_config = { .post_div_mask = GENMASK(9, 8), .main_output_mask = BIT(0), .config_ctl_val = 0x00004289, + .test_ctl_mask = GENMASK(31, 0), + .test_ctl_val = 0x08000000, }; static struct clk_alpha_pll gpll9 = {