From patchwork Thu Jun 1 11:54:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zelong Dong X-Patchwork-Id: 13263585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B22C8C7EE23 for ; Thu, 1 Jun 2023 11:55:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yybQg3mKjCFRBTGu9JsKIB3Vm3Db/6QXgDna+NH2kac=; b=gcbDoZuNPHr/yq cb+hdcet/+OB6FInIGWBqaghiFXeM+rs7xpjJNuzd1kJ4nkqIzLc1fgVRbMRXVf3EfOp8Ce7nuCwd HHjP/zxGJlV3jvGEImdpeY9RDfWxfwZ2KSzBUb9t/jFYAapKLj1jvoPvui4mnmLgvlvl6SYP8RoWC hPP4e5o5IAypbqblcJmhpAKvZXxURluYiMfJVb1impxHfozpQlpgZjYH9qc0LsUlvVRqsWZC1eu3L 3C4uN9Gx2SgDeW7DfEaExI6sawmHmsq92b+hyAczsr+fhNYfGrxMZKPemJj9JLXrTlmFjOvazy5/Z 39r3RIDfD4j19Rth6w9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtF-003J0x-00; Thu, 01 Jun 2023 11:54:49 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtC-003Iyj-1J for linux-amlogic@lists.infradead.org; Thu, 01 Jun 2023 11:54:47 +0000 Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Thu, 1 Jun 2023 19:53:58 +0800 From: zelong dong To: Neil Armstrong , Sean Young , Mauro Carvalho Chehab , Rob Herring , Jerome Brunet , Kevin Hilman , Martin Blumenstingl CC: , , , , , Zelong Dong Subject: [PATCH v3 1/3] media: rc: meson-ir: sort Meson IR Controller register macros Date: Thu, 1 Jun 2023 19:54:31 +0800 Message-ID: <20230601115433.21809-2-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230601115433.21809-1-zelong.dong@amlogic.com> References: <20230601115433.21809-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.11.69] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_045446_440568_7B1C8ED8 X-CRM114-Status: UNSURE ( 8.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Zelong Dong There are more registers to come in the next Meson IR Controller. For defining clearly, sort register macros and let address and bit macros as a set. Signed-off-by: Zelong Dong --- drivers/media/rc/meson-ir.c | 29 ++++++++++------------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c index 49aa309d1a8c..6d77a8c33dc1 100644 --- a/drivers/media/rc/meson-ir.c +++ b/drivers/media/rc/meson-ir.c @@ -19,44 +19,35 @@ #define DRIVER_NAME "meson-ir" -/* valid on all Meson platforms */ #define IR_DEC_LDR_ACTIVE 0x00 #define IR_DEC_LDR_IDLE 0x04 #define IR_DEC_LDR_REPEAT 0x08 #define IR_DEC_BIT_0 0x0c #define IR_DEC_REG0 0x10 +#define REG0_RATE_MASK GENMASK(11, 0) #define IR_DEC_FRAME 0x14 #define IR_DEC_STATUS 0x18 +#define STATUS_IR_DEC_IN BIT(8) #define IR_DEC_REG1 0x1c -/* only available on Meson 8b and newer */ -#define IR_DEC_REG2 0x20 - -#define REG0_RATE_MASK GENMASK(11, 0) - -#define DECODE_MODE_NEC 0x0 -#define DECODE_MODE_RAW 0x2 - -/* Meson 6b uses REG1 to configure the mode */ +#define REG1_TIME_IV_MASK GENMASK(28, 16) +#define REG1_ENABLE BIT(15) #define REG1_MODE_MASK GENMASK(8, 7) #define REG1_MODE_SHIFT 7 - -/* Meson 8b / GXBB use REG2 to configure the mode */ +#define REG1_IRQSEL_MASK GENMASK(3, 2) +#define REG1_RESET BIT(0) +/* The following regs are only available on Meson 8b and newer */ +#define IR_DEC_REG2 0x20 #define REG2_MODE_MASK GENMASK(3, 0) #define REG2_MODE_SHIFT 0 -#define REG1_TIME_IV_MASK GENMASK(28, 16) +#define DECODE_MODE_NEC 0x0 +#define DECODE_MODE_RAW 0x2 -#define REG1_IRQSEL_MASK GENMASK(3, 2) #define REG1_IRQSEL_NEC_MODE 0 #define REG1_IRQSEL_RISE_FALL 1 #define REG1_IRQSEL_FALL 2 #define REG1_IRQSEL_RISE 3 -#define REG1_RESET BIT(0) -#define REG1_ENABLE BIT(15) - -#define STATUS_IR_DEC_IN BIT(8) - #define MESON_TRATE 10 /* us */ struct meson_ir { From patchwork Thu Jun 1 11:54:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zelong Dong X-Patchwork-Id: 13263586 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08B98C7EE32 for ; Thu, 1 Jun 2023 11:55:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TIVd8iUqTjMNl5vkRtfA+pYcYJTf0WK2uAXrf//0rpg=; b=Brvax591FHipQE Z0ZoH8ZAHl0QZaWhZ31gUpD//JK6CBgPfdK+IpQn8GLmxYj/e26/rJQINSMV8hjEj+HFO0WTtFE5V yjuTmFn6Wmg4m06mL+IwtWx9DoN06xf+n1tGuRDgMxK3EBgRcZl676ktYyrcDDZ/RZYur944SMMk0 fvC6pbN1XZA6ydug4hiI1yWGsALZCrlyTASF4t0ayuqvlzNOAIZc+PDhhsogruxSf49XCTy0gQoeW I/00o2qCQ6Mc3HzSo3lhlOcPdSiv9OUpaIwdJGIbviicdaXZM//7Yvbse3JRI16cJLnawgsafjOu0 6kWSkfKSwAZwk3NBD8AQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtH-003J1g-1U; Thu, 01 Jun 2023 11:54:51 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtE-003Iyj-0H for linux-amlogic@lists.infradead.org; Thu, 01 Jun 2023 11:54:49 +0000 Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Thu, 1 Jun 2023 19:54:00 +0800 From: zelong dong To: Neil Armstrong , Sean Young , Mauro Carvalho Chehab , Rob Herring , Jerome Brunet , Kevin Hilman , Martin Blumenstingl CC: , , , , , Zelong Dong Subject: [PATCH v3 2/3] media: rc: meson-ir: rename Meson IR Controller register macros Date: Thu, 1 Jun 2023 19:54:32 +0800 Message-ID: <20230601115433.21809-3-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230601115433.21809-1-zelong.dong@amlogic.com> References: <20230601115433.21809-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.11.69] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_045448_127073_B18442AC X-CRM114-Status: GOOD ( 13.56 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Zelong Dong There are more registers to come in the next Meson IR Controller. For defining clearly, rename register macros. Signed-off-by: Zelong Dong --- drivers/media/rc/meson-ir.c | 77 +++++++++++++++++++------------------ 1 file changed, 40 insertions(+), 37 deletions(-) diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c index 6d77a8c33dc1..a0ccde02bc08 100644 --- a/drivers/media/rc/meson-ir.c +++ b/drivers/media/rc/meson-ir.c @@ -24,31 +24,30 @@ #define IR_DEC_LDR_REPEAT 0x08 #define IR_DEC_BIT_0 0x0c #define IR_DEC_REG0 0x10 -#define REG0_RATE_MASK GENMASK(11, 0) +#define IR_DEC_REG0_BASE_TIME GENMASK(11, 0) #define IR_DEC_FRAME 0x14 #define IR_DEC_STATUS 0x18 -#define STATUS_IR_DEC_IN BIT(8) +#define IR_DEC_STATUS_PULSE BIT(8) #define IR_DEC_REG1 0x1c -#define REG1_TIME_IV_MASK GENMASK(28, 16) -#define REG1_ENABLE BIT(15) -#define REG1_MODE_MASK GENMASK(8, 7) -#define REG1_MODE_SHIFT 7 -#define REG1_IRQSEL_MASK GENMASK(3, 2) -#define REG1_RESET BIT(0) +#define IR_DEC_REG1_TIME_IV GENMASK(28, 16) +#define IR_DEC_REG1_ENABLE BIT(15) +#define IR_DEC_REG1_MODE GENMASK(8, 7) +#define IR_DEC_REG1_IRQSEL GENMASK(3, 2) +#define IR_DEC_REG1_RESET BIT(0) /* The following regs are only available on Meson 8b and newer */ #define IR_DEC_REG2 0x20 -#define REG2_MODE_MASK GENMASK(3, 0) -#define REG2_MODE_SHIFT 0 +#define IR_DEC_REG2_MODE GENMASK(3, 0) -#define DECODE_MODE_NEC 0x0 -#define DECODE_MODE_RAW 0x2 +#define DEC_MODE_NEC 0x0 +#define DEC_MODE_RAW 0x2 -#define REG1_IRQSEL_NEC_MODE 0 -#define REG1_IRQSEL_RISE_FALL 1 -#define REG1_IRQSEL_FALL 2 -#define REG1_IRQSEL_RISE 3 +#define IRQSEL_NEC_MODE 0 +#define IRQSEL_RISE_FALL 1 +#define IRQSEL_FALL 2 +#define IRQSEL_RISE 3 -#define MESON_TRATE 10 /* us */ +#define MESON_RAW_TRATE 10 /* us */ +#define MESON_HW_TRATE 20 /* us */ struct meson_ir { void __iomem *reg; @@ -76,11 +75,11 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id) spin_lock(&ir->lock); duration = readl_relaxed(ir->reg + IR_DEC_REG1); - duration = FIELD_GET(REG1_TIME_IV_MASK, duration); - rawir.duration = duration * MESON_TRATE; + duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration); + rawir.duration = duration * MESON_RAW_TRATE; status = readl_relaxed(ir->reg + IR_DEC_STATUS); - rawir.pulse = !!(status & STATUS_IR_DEC_IN); + rawir.pulse = !!(status & IR_DEC_STATUS_PULSE); ir_raw_event_store_with_timeout(ir->rc, &rawir); @@ -122,7 +121,7 @@ static int meson_ir_probe(struct platform_device *pdev) map_name = of_get_property(node, "linux,rc-map-name", NULL); ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY; ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; - ir->rc->rx_resolution = MESON_TRATE; + ir->rc->rx_resolution = MESON_RAW_TRATE; ir->rc->min_timeout = 1; ir->rc->timeout = IR_DEFAULT_TIMEOUT; ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT; @@ -144,24 +143,27 @@ static int meson_ir_probe(struct platform_device *pdev) } /* Reset the decoder */ - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET); - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_RESET, + IR_DEC_REG1_RESET); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_RESET, 0); /* Set general operation mode (= raw/software decoding) */ if (of_device_is_compatible(node, "amlogic,meson6-ir")) - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK, - FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW)); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_MODE, + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW)); else - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK, - FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW)); + meson_ir_set_mask(ir, IR_DEC_REG2, IR_DEC_REG2_MODE, + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW)); /* Set rate */ - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1); + meson_ir_set_mask(ir, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, + MESON_RAW_TRATE - 1); /* IRQ on rising and falling edges */ - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK, - FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL)); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_IRQSEL, + FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL)); /* Enable the decoder */ - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_ENABLE, + IR_DEC_REG1_ENABLE); dev_info(dev, "receiver initialized\n"); @@ -175,7 +177,7 @@ static void meson_ir_remove(struct platform_device *pdev) /* Disable the decoder */ spin_lock_irqsave(&ir->lock, flags); - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0); spin_unlock_irqrestore(&ir->lock, flags); } @@ -193,14 +195,15 @@ static void meson_ir_shutdown(struct platform_device *pdev) * bootloader a chance to power the system back on */ if (of_device_is_compatible(node, "amlogic,meson6-ir")) - meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK, - DECODE_MODE_NEC << REG1_MODE_SHIFT); + meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_MODE, + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC)); else - meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK, - DECODE_MODE_NEC << REG2_MODE_SHIFT); + meson_ir_set_mask(ir, IR_DEC_REG2, IR_DEC_REG2_MODE, + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC)); /* Set rate to default value */ - meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13); + meson_ir_set_mask(ir, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, + MESON_HW_TRATE - 1); spin_unlock_irqrestore(&ir->lock, flags); } From patchwork Thu Jun 1 11:54:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zelong Dong X-Patchwork-Id: 13263587 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D795C7EE23 for ; Thu, 1 Jun 2023 11:55:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5ivSpnwPra8q2VuMqc2VbNux0fSNZVkipPpfYv5OR3w=; b=3uFBKvi4IsCq+v /ai2cVVUrE4s/SKkSwjo7I8O3yNsYNQgcEYBOuTA7c6AA/LX272L4jIzgJHnaTm43e1HqLskToD7K uwAQ6VB+PgxDkzmm23eUZNY9ZF5NkpO6syEN9uui8PV6mvnIoQpl3yMTCv0zSHAGQOq8O9QD9Bgfy 416NTsOw3M+D2mvTSOD7tJOOUGU4DK11tfDMobqcUW62mev5YPk/d99eXcoNCScGtL37YeOQRZtKr gxzo9ly7DK/gw8GITfOopJ3HQSKlR+vhvzsWH4x/o3sduDqFp01IVajy5c/FM59xL0Ub6cx25pL+4 8pCvh17jIsWGQwresSCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtI-003J2P-2q; Thu, 01 Jun 2023 11:54:52 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4gtG-003Iyj-09 for linux-amlogic@lists.infradead.org; Thu, 01 Jun 2023 11:54:51 +0000 Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Thu, 1 Jun 2023 19:54:01 +0800 From: zelong dong To: Neil Armstrong , Sean Young , Mauro Carvalho Chehab , Rob Herring , Jerome Brunet , Kevin Hilman , Martin Blumenstingl CC: , , , , , Zelong Dong Subject: [PATCH v3 3/3] media: rc: meson-ir: support MMIO regmaps to access registers Date: Thu, 1 Jun 2023 19:54:33 +0800 Message-ID: <20230601115433.21809-4-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230601115433.21809-1-zelong.dong@amlogic.com> References: <20230601115433.21809-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.11.69] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_045450_083341_4E468919 X-CRM114-Status: GOOD ( 17.37 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Zelong Dong Supports MMIO regmaps to access controller registers in Meson IR driver. Signed-off-by: Zelong Dong --- drivers/media/rc/Kconfig | 1 + drivers/media/rc/meson-ir.c | 72 +++++++++++++++++++------------------ 2 files changed, 39 insertions(+), 34 deletions(-) diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig index ac4172feb6f9..24437ed64a27 100644 --- a/drivers/media/rc/Kconfig +++ b/drivers/media/rc/Kconfig @@ -271,6 +271,7 @@ config IR_MCEUSB config IR_MESON tristate "Amlogic Meson IR remote receiver" depends on ARCH_MESON || COMPILE_TEST + select REGMAP_MMIO help Say Y if you want to use the IR remote receiver available on Amlogic Meson SoCs. diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c index a0ccde02bc08..d22d2578ec39 100644 --- a/drivers/media/rc/meson-ir.c +++ b/drivers/media/rc/meson-ir.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -50,21 +51,16 @@ #define MESON_HW_TRATE 20 /* us */ struct meson_ir { - void __iomem *reg; + struct regmap *reg; struct rc_dev *rc; spinlock_t lock; }; -static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg, - u32 mask, u32 value) -{ - u32 data; - - data = readl(ir->reg + reg); - data &= ~mask; - data |= (value & mask); - writel(data, ir->reg + reg); -} +static struct regmap_config meson_ir_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, +}; static irqreturn_t meson_ir_irq(int irqno, void *dev_id) { @@ -74,11 +70,11 @@ static irqreturn_t meson_ir_irq(int irqno, void *dev_id) spin_lock(&ir->lock); - duration = readl_relaxed(ir->reg + IR_DEC_REG1); + regmap_read(ir->reg, IR_DEC_REG1, &duration); duration = FIELD_GET(IR_DEC_REG1_TIME_IV, duration); rawir.duration = duration * MESON_RAW_TRATE; - status = readl_relaxed(ir->reg + IR_DEC_STATUS); + regmap_read(ir->reg, IR_DEC_STATUS, &status); rawir.pulse = !!(status & IR_DEC_STATUS_PULSE); ir_raw_event_store_with_timeout(ir->rc, &rawir); @@ -92,6 +88,7 @@ static int meson_ir_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *node = dev->of_node; + void __iomem *res_start; const char *map_name; struct meson_ir *ir; int irq, ret; @@ -100,7 +97,12 @@ static int meson_ir_probe(struct platform_device *pdev) if (!ir) return -ENOMEM; - ir->reg = devm_platform_ioremap_resource(pdev, 0); + res_start = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(res_start)) + return PTR_ERR(res_start); + + ir->reg = devm_regmap_init_mmio(&pdev->dev, res_start, + &meson_ir_regmap_config); if (IS_ERR(ir->reg)) return PTR_ERR(ir->reg); @@ -143,27 +145,28 @@ static int meson_ir_probe(struct platform_device *pdev) } /* Reset the decoder */ - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_RESET, - IR_DEC_REG1_RESET); - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_RESET, 0); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, + IR_DEC_REG1_RESET); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_RESET, 0); /* Set general operation mode (= raw/software decoding) */ if (of_device_is_compatible(node, "amlogic,meson6-ir")) - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_MODE, - FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW)); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE, + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_RAW)); else - meson_ir_set_mask(ir, IR_DEC_REG2, IR_DEC_REG2_MODE, - FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW)); + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE, + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_RAW)); /* Set rate */ - meson_ir_set_mask(ir, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, - MESON_RAW_TRATE - 1); + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, + FIELD_PREP(IR_DEC_REG0_BASE_TIME, + MESON_RAW_TRATE - 1)); /* IRQ on rising and falling edges */ - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_IRQSEL, - FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL)); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_IRQSEL, + FIELD_PREP(IR_DEC_REG1_IRQSEL, IRQSEL_RISE_FALL)); /* Enable the decoder */ - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_ENABLE, - IR_DEC_REG1_ENABLE); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, + IR_DEC_REG1_ENABLE); dev_info(dev, "receiver initialized\n"); @@ -177,7 +180,7 @@ static void meson_ir_remove(struct platform_device *pdev) /* Disable the decoder */ spin_lock_irqsave(&ir->lock, flags); - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_ENABLE, 0); spin_unlock_irqrestore(&ir->lock, flags); } @@ -195,15 +198,16 @@ static void meson_ir_shutdown(struct platform_device *pdev) * bootloader a chance to power the system back on */ if (of_device_is_compatible(node, "amlogic,meson6-ir")) - meson_ir_set_mask(ir, IR_DEC_REG1, IR_DEC_REG1_MODE, - FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC)); + regmap_update_bits(ir->reg, IR_DEC_REG1, IR_DEC_REG1_MODE, + FIELD_PREP(IR_DEC_REG1_MODE, DEC_MODE_NEC)); else - meson_ir_set_mask(ir, IR_DEC_REG2, IR_DEC_REG2_MODE, - FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC)); + regmap_update_bits(ir->reg, IR_DEC_REG2, IR_DEC_REG2_MODE, + FIELD_PREP(IR_DEC_REG2_MODE, DEC_MODE_NEC)); /* Set rate to default value */ - meson_ir_set_mask(ir, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, - MESON_HW_TRATE - 1); + regmap_update_bits(ir->reg, IR_DEC_REG0, IR_DEC_REG0_BASE_TIME, + FIELD_PREP(IR_DEC_REG0_BASE_TIME, + MESON_HW_TRATE - 1)); spin_unlock_irqrestore(&ir->lock, flags); }