From patchwork Fri Jun 2 18:54:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 13265755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 006F8C77B7A for ; Fri, 2 Jun 2023 18:55:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=r4/Gsf9xlBBqGwICFRitj4VKcpbZOrPgNSz0sIrbgvE=; b=o6B16EjKgP7Qjp zOOQP5pCcTYU7065/YRWuCd2h5Js3PZ7vR/wz3c1pm9jMQPz47Ccj47FZ3YA6+58IdHtrQJJ2nPy3 RByjdSbdTzhp8Z5QbrPBjy3Bm/n8yYcIFXFU6sjjGhGBUvnVa9Syt24ULjW5Vj1MslAyXw24FaTK8 R/Gqvef2Fyx0OTTJNi7twRJu0HOjY23wttMbNNlinb1vcCSkG9QAc/f0Gf1vOyVF0r96T9Nx/CZHJ Lu7mX1zKO6Bx6MUx8mawL+4kgiesJ0dm/p5s19gPk0crk2f+rdK48VU5zoHV7MA5BsZGwjr3PE3Lu 2CKj0KgT706pWd6MWMFw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q59uy-007gox-2x; Fri, 02 Jun 2023 18:54:32 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q59uu-007gne-27 for linux-arm-kernel@lists.infradead.org; Fri, 02 Jun 2023 18:54:30 +0000 Received: from dude02.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::28]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1q59um-0007kh-Mr; Fri, 02 Jun 2023 20:54:20 +0200 From: Lucas Stach To: Shawn Guo Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Marek Vasut , patchwork-lst@pengutronix.de, linux-arm-kernel@lists.infradead.org, Luca Ceresoli Subject: [PATCH 1/2] soc: imx: gpcv2: rename keep_clocks to bus_clocks Date: Fri, 2 Jun 2023 20:54:16 +0200 Message-Id: <20230602185417.4098937-1-l.stach@pengutronix.de> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::28 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230602_115428_719366_94E9E087 X-CRM114-Status: GOOD ( 14.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some top-level PGC domains have bus clocks that feed the logic inside the domain like the ADB and the blk-ctrl, which must not be gated as long as the domain is powered up. Until now we have marked those domains with the keep_clocks property. Rename this to bus_clocks as there are some more behavioral differences for the bus clocks needed that should be keyed off this property. Signed-off-by: Lucas Stach --- drivers/soc/imx/gpcv2.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 4b3300b090a8..706f852e5d87 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -293,7 +293,7 @@ struct imx_pgc_domain { } bits; const int voltage; - const bool keep_clocks; + const bool bus_clocks; struct device *dev; unsigned int pgc_sw_pup_reg; @@ -396,7 +396,7 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) } /* Disable reset clocks for all devices in the domain */ - if (!domain->keep_clocks) + if (!domain->bus_clocks) clk_bulk_disable_unprepare(domain->num_clks, domain->clks); return 0; @@ -419,7 +419,7 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) int ret; /* Enable reset clocks for all devices in the domain */ - if (!domain->keep_clocks) { + if (!domain->bus_clocks) { ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); if (ret) { dev_err(domain->dev, "failed to enable reset clocks\n"); @@ -484,7 +484,7 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) return 0; out_clk_disable: - if (!domain->keep_clocks) + if (!domain->bus_clocks) clk_bulk_disable_unprepare(domain->num_clks, domain->clks); return ret; @@ -638,7 +638,7 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = { .hskack = IMX8M_VPU_HSK_PWRDNACKN, }, .pgc = BIT(IMX8M_PGC_VPU), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8M_POWER_DOMAIN_DISP] = { @@ -738,7 +738,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskreq = IMX8MM_HSIO_HSK_PWRDNREQN, .hskack = IMX8MM_HSIO_HSK_PWRDNACKN, }, - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MM_POWER_DOMAIN_PCIE] = { @@ -787,7 +787,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_GPUMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_GPUMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MM_POWER_DOMAIN_GPU] = { @@ -814,7 +814,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_VPUMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MM_POWER_DOMAIN_VPUG1] = { @@ -848,7 +848,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .map = IMX8MM_VPUH1_A53_DOMAIN, }, .pgc = BIT(IMX8MM_PGC_VPUH1), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MM_POWER_DOMAIN_DISPMIX] = { @@ -862,7 +862,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MM_PGC_DISPMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MM_POWER_DOMAIN_MIPI] = { @@ -976,7 +976,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_MLMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_MLMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_AUDIOMIX] = { @@ -990,7 +990,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_AUDIOMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_AUDIOMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_GPU2D] = { @@ -1015,7 +1015,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_GPUMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_GPUMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_VPUMIX] = { @@ -1029,7 +1029,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_VPUMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_VPUMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_GPU3D] = { @@ -1054,7 +1054,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_MEDIAMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_MEDIAMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_VPU_G1] = { @@ -1101,7 +1101,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_HDMIMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_HDMIMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_HDMI_PHY] = { @@ -1137,7 +1137,7 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = { .hskack = IMX8MP_HSIOMIX_PWRDNACKN, }, .pgc = BIT(IMX8MP_PGC_HSIOMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP] = { @@ -1228,7 +1228,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = { .hskreq = IMX8MN_HSIO_HSK_PWRDNREQN, .hskack = IMX8MN_HSIO_HSK_PWRDNACKN, }, - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MN_POWER_DOMAIN_OTG1] = { @@ -1254,7 +1254,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = { .hskack = IMX8MN_GPUMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MN_PGC_GPUMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MN_POWER_DOMAIN_DISPMIX] = { @@ -1268,7 +1268,7 @@ static const struct imx_pgc_domain imx8mn_pgc_domains[] = { .hskack = IMX8MN_DISPMIX_HSK_PWRDNACKN, }, .pgc = BIT(IMX8MN_PGC_DISPMIX), - .keep_clocks = true, + .bus_clocks = true, }, [IMX8MN_POWER_DOMAIN_MIPI] = { From patchwork Fri Jun 2 18:54:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 13265754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5159AC7EE29 for ; Fri, 2 Jun 2023 18:54:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jWViU1El4giPICwaE836Z2fcUXG+oLT12+yLO1jZfUg=; b=CdEqCebUz6RGB8 bGWFMJ5S0u0vOl29ySEBC9HZGxLWEtfXFuPzcMzEeGqDyfL8eIMHgrnxXBj4ZT9PxkCDt/ZyhGdRY fiTmRVTbrzPSPJsejP1rWMn0zy0bATHeCXeEBRicKtwP/fCsAxOz3oGz+Q2eQAOSe1YCLPaYRZqrf oUkP9+40tbQZSxVBttrU/7crvxp0nFKb2IUA6SJLRXOGCHzNw0RvjCnHL3tMuWi1KfsUzPPZNvMpo vdm8Rb3u1ljkxtluZULpMw3uhUWf8H3xuV/JLcruowM9f8KWfwqyDFWfYzU1MpJwg8tSh/hE9W3hb 2VX0BNOyRDfc/bJz9dNA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q59uy-007gop-1A; Fri, 02 Jun 2023 18:54:32 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q59uu-007gnb-27 for linux-arm-kernel@lists.infradead.org; Fri, 02 Jun 2023 18:54:30 +0000 Received: from dude02.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::28]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1q59un-0007kh-3x; Fri, 02 Jun 2023 20:54:21 +0200 From: Lucas Stach To: Shawn Guo Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Marek Vasut , patchwork-lst@pengutronix.de, linux-arm-kernel@lists.infradead.org, Luca Ceresoli Subject: [PATCH 2/2] soc: imx: gpcv2: prepare bus clocks early Date: Fri, 2 Jun 2023 20:54:17 +0200 Message-Id: <20230602185417.4098937-2-l.stach@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230602185417.4098937-1-l.stach@pengutronix.de> References: <20230602185417.4098937-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::28 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230602_115428_719195_9544DC8F X-CRM114-Status: GOOD ( 17.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Prepare the bus clocks during PGC domain driver probe. This avoids a potential deadlock when there a clock providers inside the domain, as this might end up trying to take the CCF prepare_lock from two different contexts, when runtime PM is trying to resume the PGC domain for the clock provider. By keeping the bus clocks prepared as long as there is a PGC domain driver attached, we don't need to take the prepare_lock in the domain power up/down paths. We don't want to do this for regular reset clocks, as this might lead to some PLLs being kept prepared that could otherwise be shut down. For the bus clocks this isn't a concern, as all the bus clocks are derived from always-on system PLLs. Signed-off-by: Lucas Stach Reviewed-by: Marco Felsch --- drivers/soc/imx/gpcv2.c | 41 ++++++++++++++++++++++++++++++++++------- 1 file changed, 34 insertions(+), 7 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 706f852e5d87..428e2fd82f26 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -337,10 +337,14 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) reset_control_assert(domain->reset); - /* Enable reset clocks for all devices in the domain */ - ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); + if (!domain->bus_clocks) + /* Enable reset clocks for all devices in the domain */ + ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); + else + /* Enable bus clocks for this domain */ + ret = clk_bulk_enable(domain->num_clks, domain->clks); if (ret) { - dev_err(domain->dev, "failed to enable reset clocks\n"); + dev_err(domain->dev, "failed to enable clocks\n"); goto out_regulator_disable; } @@ -402,7 +406,10 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) return 0; out_clk_disable: - clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + if (!domain->bus_clocks) + clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + else + clk_bulk_disable(domain->num_clks, domain->clks); out_regulator_disable: if (!IS_ERR(domain->regulator)) regulator_disable(domain->regulator); @@ -466,8 +473,11 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) } } - /* Disable reset clocks for all devices in the domain */ - clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + /* Disable bus or reset clocks for all devices in the domain */ + if (!domain->bus_clocks) + clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + else + clk_bulk_disable(domain->num_clks, domain->clks); if (!IS_ERR(domain->regulator)) { ret = regulator_disable(domain->regulator); @@ -486,6 +496,8 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) out_clk_disable: if (!domain->bus_clocks) clk_bulk_disable_unprepare(domain->num_clks, domain->clks); + else + clk_bulk_disable(domain->num_clks, domain->clks); return ret; } @@ -1343,10 +1355,19 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) regmap_update_bits(domain->regmap, domain->regs->map, domain->bits.map, domain->bits.map); + if (domain->bus_clocks) { + ret = clk_bulk_prepare(domain->num_clks, domain->clks); + if (ret) { + dev_err(domain->dev, + "Failed to prepare domain's clocks\n"); + goto out_domain_unmap; + } + } + ret = pm_genpd_init(&domain->genpd, NULL, true); if (ret) { dev_err(domain->dev, "Failed to init power domain\n"); - goto out_domain_unmap; + goto out_disable_clocks; } if (IS_ENABLED(CONFIG_LOCKDEP) && @@ -1364,6 +1385,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) out_genpd_remove: pm_genpd_remove(&domain->genpd); +out_disable_clocks: + if (domain->bus_clocks) + clk_bulk_unprepare(domain->num_clks, domain->clks); out_domain_unmap: if (domain->bits.map) regmap_update_bits(domain->regmap, domain->regs->map, @@ -1380,6 +1404,9 @@ static int imx_pgc_domain_remove(struct platform_device *pdev) of_genpd_del_provider(domain->dev->of_node); pm_genpd_remove(&domain->genpd); + if (domain->bus_clocks) + clk_bulk_unprepare(domain->num_clks, domain->clks); + if (domain->bits.map) regmap_update_bits(domain->regmap, domain->regs->map, domain->bits.map, 0);