From patchwork Mon Jun 5 15:40:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 13267688 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 234E01F93A for ; Mon, 5 Jun 2023 15:40:21 +0000 (UTC) Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC4341BB; Mon, 5 Jun 2023 08:40:15 -0700 (PDT) Received: from arisu.mtl.collabora.ca (mtl.collabora.ca [66.171.169.34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id 1CC536602242; Mon, 5 Jun 2023 16:40:13 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685979614; bh=vWggyIWMQJwPp+5rrAFGhNQx/8NDyETfk2n0HVwyCl8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c9a9zBIYcIdls2PzTWUkthOwuEK1v/PspIqd2Os67mqb5Z56YMIh483PHx6F/dRIv Hm0b0/VhgyWceKlaAKRGsfzLDZ6lxq7ZWVkC5/e8mlFJNcGgK8k2QliAVc10S0Cy1r k9f3/LnCgE/3gD2ZmN+BTUOzksLhBhV93p/IE2EOQZpULJ5rxPGquXCE3nXNH+aFWI gCU4lvxqcjnBmkJ/qpWX3PEeIj+Cl/QCnpwjhO51xvebwPX/EdooyDQKrjH7u6CgFf 1FTR3+W3tl/PMXklFxWWVcum482W4S+vs+zayKUXaRUtXfctdtRXyLN1oO//qZrKxs Yc91Wz4LkumoA== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Florian Fainelli Subject: [PATCH v4 1/3] net: phy: realtek: Add optional external PHY clock Date: Mon, 5 Jun 2023 11:40:08 -0400 Message-Id: <20230605154010.49611-2-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605154010.49611-1-detlev.casanova@collabora.com> References: <20230605154010.49611-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org In some cases, the PHY can use an external clock source instead of a crystal. Add an optional clock in the phy node to make sure that the clock source is enabled, if specified, before probing. Reviewed-by: Florian Fainelli Reviewed-by: Andrew Lunn Signed-off-by: Detlev Casanova --- drivers/net/phy/realtek.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 3d99fd6664d7..b13dd0b3c99e 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -12,6 +12,7 @@ #include #include #include +#include #define RTL821x_PHYSR 0x11 #define RTL821x_PHYSR_DUPLEX BIT(13) @@ -80,6 +81,7 @@ struct rtl821x_priv { u16 phycr1; u16 phycr2; bool has_phycr2; + struct clk *clk; }; static int rtl821x_read_page(struct phy_device *phydev) @@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev) if (!priv) return -ENOMEM; + priv->clk = devm_clk_get_optional_enabled(dev, NULL); + if (IS_ERR(priv->clk)) + return dev_err_probe(dev, PTR_ERR(priv->clk), + "failed to get phy clock\n"); + ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); if (ret < 0) return ret; From patchwork Mon Jun 5 15:40:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 13267689 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 943211F93A for ; Mon, 5 Jun 2023 15:40:22 +0000 (UTC) Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B202E47; Mon, 5 Jun 2023 08:40:18 -0700 (PDT) Received: from arisu.mtl.collabora.ca (mtl.collabora.ca [66.171.169.34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id 939236606E75; Mon, 5 Jun 2023 16:40:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685979617; bh=GfOUH1eSkfsqisstMtmMreKlJ+WCmkLmHuqV+nkGrac=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bTw3kr38lsARY9wfeuRH27+grI/VcygflDEzhmEA9QovB9AKuckIaK5fNhJb3eCJT kJ+/+OPc0vECHwfc/+LAKpgW2OVGh4FKin3ZqpBi5eiGAsy8QiPa1Lm6o6ZwGvgC0n 6tz750fSd+j8BL9XY4L2wMTdvRPUC8dDJJCJ0Xozj83t0ArtTgLqgDHhcyEvcWLXj7 2sguktZsqaY+nS1s516Jj++fj/XdRKuY2sSkfhS5N+xvyWwE5FLSoL+9dfg5lCbZ2w lEbA5stvgdiefdBERpeb7UCIbSZjzY36GJ42W/Qewiy2nRrSUNoB341GxeZm6EmaFY kCjZ+vVLt15Xg== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Krzysztof Kozlowski Subject: [PATCH v4 2/3] dt-bindings: net: phy: Document support for external PHY clk Date: Mon, 5 Jun 2023 11:40:09 -0400 Message-Id: <20230605154010.49611-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605154010.49611-1-detlev.casanova@collabora.com> References: <20230605154010.49611-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Ethern PHYs can have external an clock that needs to be activated before communicating with the PHY. Acked-by: Krzysztof Kozlowski Signed-off-by: Detlev Casanova --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 4f574532ee13..c1241c8a3b77 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -93,6 +93,12 @@ properties: the turn around line low at end of the control phase of the MDIO transaction. + clocks: + maxItems: 1 + description: + External clock connected to the PHY. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator. + enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Mon Jun 5 15:40:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Detlev Casanova X-Patchwork-Id: 13267690 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBF4C1F93A for ; Mon, 5 Jun 2023 15:40:23 +0000 (UTC) Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DE4AE4B; Mon, 5 Jun 2023 08:40:20 -0700 (PDT) Received: from arisu.mtl.collabora.ca (mtl.collabora.ca [66.171.169.34]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id DE055660036A; Mon, 5 Jun 2023 16:40:17 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685979619; bh=pTp6/xk/Wg5wGQWw/vjAgqilJMAtoUJefEJPkScDWl4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V1OzFLkh72ZNfGgey0ZL3otcPLcUv/LkTVp4ChTBsreaddqesNNasKhY8YiqvZ1yp vrd/u6f53c06Hr/BAAgyWFj2qkH6q/5xkiSkMdPNDxG8DU/DhlbMSAKgurRqAe+7LH 19FveSBeXeiGBz1LB7ZT9yQ2AivStSzOFgvHvIPuzDGCEA+KGcg/Ea77qsxxSDFrLk XIYtAgu8unZcVqLdRp4dIu+WLSobvCgnf/52qBNVL682PaYh9j5D9nfhOq6cPCYx/z DDuMAteufcIUIYAgTtyjYnJAl5CodOT6CTnRLdCJrUrzHkCGLHRA7a/HArc5GpPwa6 FUAY8b75bqbLg== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova , Florian Fainelli Subject: [PATCH v4 3/3] net: phy: realtek: Disable clock on suspend Date: Mon, 5 Jun 2023 11:40:10 -0400 Message-Id: <20230605154010.49611-4-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230605154010.49611-1-detlev.casanova@collabora.com> References: <20230605154010.49611-1-detlev.casanova@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org For PHYs that call rtl821x_probe() where an external clock can be configured, make sure that the clock is disabled when ->suspend() is called and enabled on resume. The PHY_ALWAYS_CALL_SUSPEND is added to ensure that the suspend function is actually always called. Reviewed-by: Florian Fainelli Signed-off-by: Detlev Casanova --- drivers/net/phy/realtek.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index b13dd0b3c99e..894172a3e15f 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -426,10 +426,31 @@ static int rtl8211f_config_init(struct phy_device *phydev) return genphy_soft_reset(phydev); } +static int rtl821x_suspend(struct phy_device *phydev) +{ + struct rtl821x_priv *priv = phydev->priv; + int ret = 0; + + if (!phydev->wol_enabled) { + ret = genphy_suspend(phydev); + + if (ret) + return ret; + + clk_disable_unprepare(priv->clk); + } + + return ret; +} + static int rtl821x_resume(struct phy_device *phydev) { + struct rtl821x_priv *priv = phydev->priv; int ret; + if (!phydev->wol_enabled) + clk_prepare_enable(priv->clk); + ret = genphy_resume(phydev); if (ret < 0) return ret; @@ -934,10 +955,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { PHY_ID_MATCH_EXACT(RTL_8211FVD_PHYID), .name = "RTL8211F-VD Gigabit Ethernet", @@ -946,10 +968,11 @@ static struct phy_driver realtek_drvs[] = { .read_status = rtlgen_read_status, .config_intr = &rtl8211f_config_intr, .handle_interrupt = rtl8211f_handle_interrupt, - .suspend = genphy_suspend, + .suspend = rtl821x_suspend, .resume = rtl821x_resume, .read_page = rtl821x_read_page, .write_page = rtl821x_write_page, + .flags = PHY_ALWAYS_CALL_SUSPEND, }, { .name = "Generic FE-GE Realtek PHY", .match_phy_device = rtlgen_match_phy_device,