From patchwork Tue Jun 6 13:50:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Stark X-Patchwork-Id: 13269242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 760B0C77B7A for ; Tue, 6 Jun 2023 13:51:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=YCOtOVN7fAN9K2F1iqJ3d0qjxAlEsnkzEisR+ROISjw=; b=36POMvk7l4JA/l V97Rm3zQkb/r4v7CCpEud3+iLCBS9BwvBa8QOgNnkHty8uGmsLmo/0EOm9CpkiNAiJy5onTMM3/13 z+wDT3I9xB+MJPBP1BNEorVtLc4+rudiRdH7uegnoDOhgUgLmNAXAJa0F3TZ1kwmmvCILHKr8cLAq SEikAigfjbrwfN/mB3vNV1WglXo0t3ez3fg6qESj9G72i31wcwoM/hY96eMQy56PNbEtvCngiBkSf hL2bHcaM4SWO/QAYpMg9nA+dlxcf3BWCc/zB/qLINLgl7zkEqi/7HCpfGa5mqzKFEfLvs0LsNneMH AXozjVLKJ6cQYZzDDtpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6X5Y-001uNw-2l; Tue, 06 Jun 2023 13:51:08 +0000 Received: from mx.sberdevices.ru ([45.89.227.171]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6X5S-001uMR-0w; Tue, 06 Jun 2023 13:51:07 +0000 Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id 2408D5FD41; Tue, 6 Jun 2023 16:50:59 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1686059459; bh=9kFJi/z4Psvva6f9jMpTP3rE2fmtgwDXrYMID542PFA=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=XxNJshJLzEfaXwSgrsmMX4VErysyDd8xVvonhfy0pQ3JD3GU3R5CGil3yXhiOwIiW TT+eNHkzPiFdHESY+ysL1qPgFtjoK+8H7XgVTm0NqPLUcus1+JwO9vu5WIjdtZuxex n6UBSfRqECNtxsOm4XGP3M5OTgPcfMowX4N/qXfq8Y1oM4MgEz9xdyth7pMui8yd85 JmL5LTk3Ycrc5UkOboyvzPst7gfqJEwBs6XflONf7kUdaWhkP6DTvg5CNpH8CCpBjN tHffklVSr1fBCDfGlDgewLXXx9A4WYf879EVIap+P1iEvNRbQ8d+PxtHM0jOPvwO8W dHQKBpXp5dC3w== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Tue, 6 Jun 2023 16:50:57 +0300 (MSK) From: George Stark To: , , , , , , , , CC: , , , , , George Stark Subject: [PATCH v2] meson saradc: fix clock divider mask length Date: Tue, 6 Jun 2023 16:50:17 +0300 Message-ID: <20230606135017.4141617-1-gnstark@sberdevices.ru> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH02.sberdevices.ru (172.16.1.5) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2023/06/06 11:10:00 #21443593 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230606_065102_503935_2165D507 X-CRM114-Status: GOOD ( 10.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to datasheets of supported meson SOCs length of ADC_CLK_DIV field is 6 bits long. Although all supported SOCs have the register with the field ADC_CLK_DIV documented later SOCs use external clock rather than ADC internal clock so this patch affects only meson8 family (S8* SOCs) Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs") Signed-off-by: George Stark --- Changelog: v1 -> v2: * Update commit message --- drivers/iio/adc/meson_saradc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index 85b6826cc10c..b93ff42b8c19 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -72,7 +72,7 @@ #define MESON_SAR_ADC_REG3_PANEL_DETECT_COUNT_MASK GENMASK(20, 18) #define MESON_SAR_ADC_REG3_PANEL_DETECT_FILTER_TB_MASK GENMASK(17, 16) #define MESON_SAR_ADC_REG3_ADC_CLK_DIV_SHIFT 10 - #define MESON_SAR_ADC_REG3_ADC_CLK_DIV_WIDTH 5 + #define MESON_SAR_ADC_REG3_ADC_CLK_DIV_WIDTH 6 #define MESON_SAR_ADC_REG3_BLOCK_DLY_SEL_MASK GENMASK(9, 8) #define MESON_SAR_ADC_REG3_BLOCK_DLY_MASK GENMASK(7, 0)