From patchwork Thu Jun 15 09:32:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D830CEB64DD for ; Thu, 15 Jun 2023 09:34:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245551AbjFOJeK (ORCPT ); Thu, 15 Jun 2023 05:34:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245577AbjFOJd5 (ORCPT ); Thu, 15 Jun 2023 05:33:57 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4635F26AA; Thu, 15 Jun 2023 02:33:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686821635; x=1718357635; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DP5OdKqj1D84yqaG/GeThc9/POEoEnWjBojZ5uISPW8=; b=UEGJWBR69qEWBhSztw8QvDWu5TYv2pByrFAG/pp6sPZKQlS0AW88Trgj HuYaOj4OnIyUZT7fA5LqL2KpU1XLpMEr5fWq6Z7MgHV6LIB9ftdHYvI4y UAC/TeN3P7w+vbfBOyeVZWUyxdUv51Ae243Z+YZLsPlJQTl1OajrucrLH bLhkaDHzqirWTMToatp7AFADyN2phUqmx/37FQ8v8Jloej1z2yIson9OP szwisbGzs/IKkEU4CMt7EP2VAbHF+hIdPijWSB7UCP/c01U4Thg2K8Q26 kjdwP3caIuWY7aaVk7FJv7in1F57cJHVKciU1vMoBrZ+cYseRKw12E67a A==; X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="230266342" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:33:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:33:54 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:33:49 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 01/11] clk: at91: clk-main: add support for parent_data/parent_hw Date: Thu, 15 Jun 2023 12:32:17 +0300 Message-ID: <20230615093227.576102-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_data and parent_hw in main oscillator clock drivers. With this parent-child relations are described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-main were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91rm9200.c | 4 ++-- drivers/clk/at91/at91sam9260.c | 4 ++-- drivers/clk/at91/at91sam9g45.c | 4 ++-- drivers/clk/at91/at91sam9n12.c | 4 ++-- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 4 ++-- drivers/clk/at91/clk-main.c | 32 ++++++++++++++++++++++---------- drivers/clk/at91/dt-compat.c | 6 +++--- drivers/clk/at91/pmc.h | 9 ++++++--- drivers/clk/at91/sam9x60.c | 4 ++-- drivers/clk/at91/sama5d2.c | 4 ++-- drivers/clk/at91/sama5d3.c | 4 ++-- drivers/clk/at91/sama5d4.c | 4 ++-- drivers/clk/at91/sama7g5.c | 4 ++-- 14 files changed, 52 insertions(+), 37 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 0b860126d589..83917a2c31bd 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -108,12 +108,12 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc"); + hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index b521f470428f..e9b56826a9be 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -363,12 +363,12 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc"); + hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index 5099669ddcbd..e25fb1bcafc7 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -123,12 +123,12 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc"); + hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 08a10e12d08d..35f137fb89e9 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -147,14 +147,14 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 1a1b6b2bb0e3..d3186dd34c26 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -95,7 +95,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) if (!at91sam9rl_pmc) return; - hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name); + hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 13e589c95907..57f41aab94b2 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -169,14 +169,14 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 8601b27c1ae0..4b5f0ff9e287 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -152,14 +152,15 @@ struct clk_hw * __init at91_clk_register_main_osc(struct regmap *regmap, const char *name, const char *parent_name, + struct clk_parent_data *parent_data, bool bypass) { struct clk_main_osc *osc; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; - if (!name || !parent_name) + if (!name || !(parent_name || parent_data)) return ERR_PTR(-EINVAL); osc = kzalloc(sizeof(*osc), GFP_KERNEL); @@ -168,7 +169,10 @@ at91_clk_register_main_osc(struct regmap *regmap, init.name = name; init.ops = &main_osc_ops; - init.parent_names = &parent_name; + if (parent_data) + init.parent_data = (const struct clk_parent_data *)parent_data; + else + init.parent_names = &parent_name; init.num_parents = 1; init.flags = CLK_IGNORE_UNUSED; @@ -397,17 +401,18 @@ static const struct clk_ops rm9200_main_ops = { struct clk_hw * __init at91_clk_register_rm9200_main(struct regmap *regmap, const char *name, - const char *parent_name) + const char *parent_name, + struct clk_hw *parent_hw) { struct clk_rm9200_main *clkmain; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; if (!name) return ERR_PTR(-EINVAL); - if (!parent_name) + if (!(parent_name || parent_hw)) return ERR_PTR(-EINVAL); clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL); @@ -416,7 +421,10 @@ at91_clk_register_rm9200_main(struct regmap *regmap, init.name = name; init.ops = &rm9200_main_ops; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; init.flags = 0; @@ -543,10 +551,11 @@ struct clk_hw * __init at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, const char **parent_names, + struct clk_hw **parent_hws, int num_parents) { struct clk_sam9x5_main *clkmain; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned int status; struct clk_hw *hw; int ret; @@ -554,7 +563,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, if (!name) return ERR_PTR(-EINVAL); - if (!parent_names || !num_parents) + if (!(parent_hws || parent_names) || !num_parents) return ERR_PTR(-EINVAL); clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL); @@ -563,7 +572,10 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, init.name = name; init.ops = &sam9x5_main_ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_PARENT_GATE; diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 97f67e23ef80..ecb0bebb8a7d 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -269,7 +269,7 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np) if (IS_ERR(regmap)) return; - hw = at91_clk_register_main_osc(regmap, name, parent_name, bypass); + hw = at91_clk_register_main_osc(regmap, name, parent_name, NULL, bypass); if (IS_ERR(hw)) return; @@ -323,7 +323,7 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np) if (IS_ERR(regmap)) return; - hw = at91_clk_register_rm9200_main(regmap, name, parent_name); + hw = at91_clk_register_rm9200_main(regmap, name, parent_name, NULL); if (IS_ERR(hw)) return; @@ -354,7 +354,7 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np) of_property_read_string(np, "clock-output-names", &name); - hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, + hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL, num_parents); if (IS_ERR(hw)) return; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 1b3ca7dd9b57..487e44deeca0 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -161,14 +161,17 @@ at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name, u32 frequency, u32 accuracy); struct clk_hw * __init at91_clk_register_main_osc(struct regmap *regmap, const char *name, - const char *parent_name, bool bypass); + const char *parent_name, + struct clk_parent_data *parent_data, bool bypass); struct clk_hw * __init at91_clk_register_rm9200_main(struct regmap *regmap, const char *name, - const char *parent_name); + const char *parent_name, + struct clk_hw *parent_hw); struct clk_hw * __init at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, - const char **parent_names, int num_parents); + const char **parent_names, + struct clk_hw **parent_hws, int num_parents); struct clk_hw * __init at91_clk_register_master_pres(struct regmap *regmap, const char *name, diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index ac070db58195..e2f40f167c08 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -219,14 +219,14 @@ static void __init sam9x60_pmc_setup(struct device_node *np) if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, 0); + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0); if (IS_ERR(hw)) goto err_free; main_osc_hw = hw; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index c0e3e1a4bbf3..2ee8f10d3b03 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -202,14 +202,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index ad6068b884de..88de1cccbb46 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -150,14 +150,14 @@ static void __init sama5d3_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index e876ec971a39..4e6e276bbc4c 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -165,14 +165,14 @@ static void __init sama5d4_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index f135b662f1ff..42dc74dbfc28 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -936,14 +936,14 @@ static void __init sama7g5_pmc_setup(struct device_node *np) bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, bypass); if (IS_ERR(hw)) goto err_free; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; From patchwork Thu Jun 15 09:32:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D0E5EB64DC for ; Thu, 15 Jun 2023 09:34:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245604AbjFOJeQ (ORCPT ); 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X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="218626802" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:03 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:33:59 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:33:54 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 02/11] clk: at91: clk-generated: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:18 +0300 Message-ID: <20230615093227.576102-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in generic clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-generated were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/clk-generated.c | 11 +++++++++-- drivers/clk/at91/dt-compat.c | 2 +- drivers/clk/at91/pmc.h | 3 ++- drivers/clk/at91/sam9x60.c | 2 +- drivers/clk/at91/sama5d2.c | 2 +- drivers/clk/at91/sama7g5.c | 2 +- 6 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index 943ea67bf135..4b4edeecc889 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -319,22 +319,29 @@ struct clk_hw * __init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char **parent_names, + struct clk_hw **parent_hws, u32 *mux_table, u8 num_parents, u8 id, const struct clk_range *range, int chg_pid) { struct clk_generated *gck; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; + if (!(parent_names || parent_hws)) + return ERR_PTR(-ENOMEM); + gck = kzalloc(sizeof(*gck), GFP_KERNEL); if (!gck) return ERR_PTR(-ENOMEM); init.name = name; init.ops = &generated_ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; if (chg_pid >= 0) diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index ecb0bebb8a7d..e5a56aaff96d 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -171,7 +171,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np) hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &dt_pcr_layout, name, - parent_names, NULL, + parent_names, NULL, NULL, num_parents, id, &range, chg_pid); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 487e44deeca0..e947c78a82d0 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -144,7 +144,8 @@ struct clk_hw * __init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char **parent_names, - u32 *mux_table, u8 num_parents, u8 id, + struct clk_hw **parent_hws, u32 *mux_table, + u8 num_parents, u8 id, const struct clk_range *range, int chg_pid); struct clk_hw * __init diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index e2f40f167c08..dcc8f8142180 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -351,7 +351,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &sam9x60_pcr_layout, sam9x60_gck[i].n, - parent_names, NULL, 6, + parent_names, NULL, NULL, 6, sam9x60_gck[i].id, &sam9x60_gck[i].r, INT_MIN); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 2ee8f10d3b03..18695c9c9beb 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -358,7 +358,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &sama5d2_pcr_layout, sama5d2_gck[i].n, - parent_names, NULL, 6, + parent_names, NULL, NULL, 6, sama5d2_gck[i].id, &sama5d2_gck[i].r, sama5d2_gck[i].chg_pid); diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 42dc74dbfc28..e754c127b2b8 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1111,7 +1111,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &sama7g5_pcr_layout, sama7g5_gck[i].n, - parent_names, mux_table, + parent_names, NULL, mux_table, num_parents, sama7g5_gck[i].id, &sama7g5_gck[i].r, From patchwork Thu Jun 15 09:32:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DFDEEB64DB for ; Thu, 15 Jun 2023 09:34:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245705AbjFOJee (ORCPT ); Thu, 15 Jun 2023 05:34:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245616AbjFOJeG (ORCPT ); Thu, 15 Jun 2023 05:34:06 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8BDA2728; Thu, 15 Jun 2023 02:34:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686821643; x=1718357643; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rtSGHQH+TiGeHwbsMLir4gXm6vMflKlMIN8yJet5ZzI=; b=MYkSc85jJtawlanBjQ+UDLVNYflkyAX9h2rta0dEfRe8yyzR+2ddDXGc qLUMqHiN636HZW5mT7uFVOAs1JgYa3dxRooJaN1RKwSRRT6ocCBzKYzq5 fNpyoujOx3l41Kzuvm4rOYP2kzskwJi8iZqQXlipOsMoUO/ikXjgWpUzR 4Mzf8HTQQownWWoMgihJ/DkkZW4AT11ibXFjJPsFEhLo+f8ANeitUFQzy 2zy82IoNjCviIo5SU+9zuAFXS5si8ld1cJyXewTTUITypYsrF03Tzdzdk iQq2Njl3vUSzTrsntJjJHX/t/0MDqsZMD+PinFRIJaHwFN1ATdqF+flMc A==; X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="230266374" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:03 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:02 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:33:59 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 03/11] clk: at91: clk-master: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:19 +0300 Message-ID: <20230615093227.576102-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in master clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-master were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91rm9200.c | 4 ++-- drivers/clk/at91/at91sam9260.c | 4 ++-- drivers/clk/at91/at91sam9g45.c | 4 ++-- drivers/clk/at91/at91sam9n12.c | 4 ++-- drivers/clk/at91/at91sam9rl.c | 4 ++-- drivers/clk/at91/at91sam9x5.c | 4 ++-- drivers/clk/at91/clk-master.c | 28 +++++++++++++++++++--------- drivers/clk/at91/dt-compat.c | 4 ++-- drivers/clk/at91/pmc.h | 6 ++++-- drivers/clk/at91/sam9x60.c | 4 ++-- drivers/clk/at91/sama5d2.c | 4 ++-- drivers/clk/at91/sama5d3.c | 4 ++-- drivers/clk/at91/sama5d4.c | 4 ++-- drivers/clk/at91/sama7g5.c | 4 ++-- 14 files changed, 47 insertions(+), 35 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 83917a2c31bd..259e314ef40f 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -140,7 +140,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) parent_names[2] = "pllack"; parent_names[3] = "pllbck"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91rm9200_master_layout, &rm9200_mck_characteristics, &rm9200_mck_lock); @@ -148,7 +148,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91rm9200_master_layout, &rm9200_mck_characteristics, &rm9200_mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index e9b56826a9be..f9bf65c77c9b 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -416,7 +416,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, parent_names[2] = "pllack"; parent_names[3] = "pllbck"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91rm9200_master_layout, data->mck_characteristics, &at91sam9260_mck_lock); @@ -424,7 +424,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91rm9200_master_layout, data->mck_characteristics, &at91sam9260_mck_lock, diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index e25fb1bcafc7..c9313a7b32ea 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -156,7 +156,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) parent_names[2] = "plladivck"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91rm9200_master_layout, &mck_characteristics, &at91sam9g45_mck_lock); @@ -164,7 +164,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91rm9200_master_layout, &mck_characteristics, &at91sam9g45_mck_lock, diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 35f137fb89e9..608410bef120 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -183,7 +183,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) parent_names[2] = "plladivck"; parent_names[3] = "pllbck"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91sam9x5_master_layout, &mck_characteristics, &at91sam9n12_mck_lock); @@ -191,7 +191,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91sam9x5_master_layout, &mck_characteristics, &at91sam9n12_mck_lock, diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index d3186dd34c26..90911cbd9690 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -120,7 +120,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) parent_names[2] = "pllack"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock); @@ -128,7 +128,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 57f41aab94b2..63097cdd4809 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -204,14 +204,14 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, parent_names[2] = "plladivck"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index b7cd1924de52..15c46489ba85 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -473,18 +473,19 @@ static struct clk_hw * __init at91_clk_register_master_internal(struct regmap *regmap, const char *name, int num_parents, const char **parent_names, + struct clk_hw **parent_hws, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics, const struct clk_ops *ops, spinlock_t *lock, u32 flags) { struct clk_master *master; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; unsigned int mckr; unsigned long irqflags; int ret; - if (!name || !num_parents || !parent_names || !lock) + if (!name || !num_parents || !(parent_names || parent_hws) || !lock) return ERR_PTR(-EINVAL); master = kzalloc(sizeof(*master), GFP_KERNEL); @@ -493,7 +494,10 @@ at91_clk_register_master_internal(struct regmap *regmap, init.name = name; init.ops = ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = flags; @@ -527,12 +531,13 @@ struct clk_hw * __init at91_clk_register_master_pres(struct regmap *regmap, const char *name, int num_parents, const char **parent_names, + struct clk_hw **parent_hws, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics, spinlock_t *lock) { return at91_clk_register_master_internal(regmap, name, num_parents, - parent_names, layout, + parent_names, parent_hws, layout, characteristics, &master_pres_ops, lock, CLK_SET_RATE_GATE); @@ -541,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap, struct clk_hw * __init at91_clk_register_master_div(struct regmap *regmap, const char *name, const char *parent_name, - const struct clk_master_layout *layout, + struct clk_hw *parent_hw, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics, spinlock_t *lock, u32 flags, u32 safe_div) { @@ -554,7 +559,8 @@ at91_clk_register_master_div(struct regmap *regmap, ops = &master_div_ops_chg; hw = at91_clk_register_master_internal(regmap, name, 1, - &parent_name, layout, + parent_name ? &parent_name : NULL, + parent_hw ? &parent_hw : NULL, layout, characteristics, ops, lock, flags); @@ -806,18 +812,19 @@ struct clk_hw * __init at91_clk_sama7g5_register_master(struct regmap *regmap, const char *name, int num_parents, const char **parent_names, + struct clk_hw **parent_hws, u32 *mux_table, spinlock_t *lock, u8 id, bool critical, int chg_pid) { struct clk_master *master; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned long flags; unsigned int val; int ret; - if (!name || !num_parents || !parent_names || !mux_table || + if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table || !lock || id > MASTER_MAX_ID) return ERR_PTR(-EINVAL); @@ -827,7 +834,10 @@ at91_clk_sama7g5_register_master(struct regmap *regmap, init.name = name; init.ops = &sama7g5_master_ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; if (chg_pid >= 0) diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index e5a56aaff96d..4a024bb97312 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -420,12 +420,12 @@ of_at91_clk_master_setup(struct device_node *np, return; hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents, - parent_names, layout, + parent_names, NULL, layout, characteristics, &mck_lock); if (IS_ERR(hw)) goto out_free_characteristics; - hw = at91_clk_register_master_div(regmap, name, "masterck_pres", + hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL, layout, characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index e947c78a82d0..c09abb8ff8fe 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -177,13 +177,14 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, struct clk_hw * __init at91_clk_register_master_pres(struct regmap *regmap, const char *name, int num_parents, const char **parent_names, + struct clk_hw **parent_hws, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics, spinlock_t *lock); struct clk_hw * __init at91_clk_register_master_div(struct regmap *regmap, const char *name, - const char *parent_names, + const char *parent_names, struct clk_hw *parent_hw, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics, spinlock_t *lock, u32 flags, u32 safe_div); @@ -191,7 +192,8 @@ at91_clk_register_master_div(struct regmap *regmap, const char *name, struct clk_hw * __init at91_clk_sama7g5_register_master(struct regmap *regmap, const char *name, int num_parents, - const char **parent_names, u32 *mux_table, + const char **parent_names, + struct clk_hw **parent_hws, u32 *mux_table, spinlock_t *lock, u8 id, bool critical, int chg_pid); diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index dcc8f8142180..3ff1eb3bee81 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -280,13 +280,13 @@ static void __init sam9x60_pmc_setup(struct device_node *np) parent_names[1] = "mainck"; parent_names[2] = "pllack_divck"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3, - parent_names, &sam9x60_master_layout, + parent_names, NULL, &sam9x60_master_layout, &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", &sam9x60_master_layout, + "masterck_pres", NULL, &sam9x60_master_layout, &mck_characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 18695c9c9beb..c47d43a7e95b 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -260,14 +260,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np) parent_names[2] = "plladivck"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index 88de1cccbb46..d605a540b30f 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -183,14 +183,14 @@ static void __init sama5d3_pmc_setup(struct device_node *np) parent_names[2] = "plladivck"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 4e6e276bbc4c..21a61840d5f3 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -198,14 +198,14 @@ static void __init sama5d4_pmc_setup(struct device_node *np) parent_names[2] = "plladivck"; parent_names[3] = "utmick"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, + parent_names, NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", + "masterck_pres", NULL, &at91sam9x5_master_layout, &mck_characteristics, &mck_lock, CLK_SET_RATE_GATE, 0); diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index e754c127b2b8..989d66f5370e 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -995,7 +995,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) } parent_names[0] = "cpupll_divpmcck"; - hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck", + hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck", NULL, &mck0_layout, &mck0_characteristics, &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5); if (IS_ERR(hw)) @@ -1022,7 +1022,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) sama7g5_mckx[i].ep_count); hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n, - num_parents, parent_names, mux_table, + num_parents, parent_names, NULL, mux_table, &pmc_mckX_lock, sama7g5_mckx[i].id, sama7g5_mckx[i].c, sama7g5_mckx[i].ep_chg_id); From patchwork Thu Jun 15 09:32:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280975 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5F32EB64DC for ; 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X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="218626898" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:19 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:07 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:03 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 04/11] clk: at91: clk-peripheral: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:20 +0300 Message-ID: <20230615093227.576102-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in peripheral clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-peripheral were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91rm9200.c | 2 +- drivers/clk/at91/at91sam9260.c | 2 +- drivers/clk/at91/at91sam9g45.c | 2 +- drivers/clk/at91/at91sam9n12.c | 2 +- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 4 ++-- drivers/clk/at91/clk-peripheral.c | 22 +++++++++++++++------- drivers/clk/at91/dt-compat.c | 3 ++- drivers/clk/at91/pmc.h | 4 +++- drivers/clk/at91/sam9x60.c | 2 +- drivers/clk/at91/sama5d2.c | 4 ++-- drivers/clk/at91/sama5d3.c | 2 +- drivers/clk/at91/sama5d4.c | 4 ++-- drivers/clk/at91/sama7g5.c | 2 +- 14 files changed, 34 insertions(+), 23 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 259e314ef40f..9eaf54418b7e 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -193,7 +193,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91rm9200_periphck); i++) { hw = at91_clk_register_peripheral(regmap, at91rm9200_periphck[i].n, - "masterck_div", + "masterck_div", NULL, at91rm9200_periphck[i].id); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index f9bf65c77c9b..b124a8da58c7 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -470,7 +470,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, for (i = 0; i < data->num_pck; i++) { hw = at91_clk_register_peripheral(regmap, data->pck[i].n, - "masterck_div", + "masterck_div", NULL, data->pck[i].id); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index c9313a7b32ea..be968b428ed7 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -214,7 +214,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9g45_periphck); i++) { hw = at91_clk_register_peripheral(regmap, at91sam9g45_periphck[i].n, - "masterck_div", + "masterck_div", NULL, at91sam9g45_periphck[i].id); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 608410bef120..8441eae0daaa 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -240,7 +240,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &at91sam9n12_pcr_layout, at91sam9n12_periphck[i].n, - "masterck_div", + "masterck_div", NULL, at91sam9n12_periphck[i].id, &range, INT_MIN, 0); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 90911cbd9690..94a6b48352ce 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -170,7 +170,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) { hw = at91_clk_register_peripheral(regmap, at91sam9rl_periphck[i].n, - "masterck_div", + "masterck_div", NULL, at91sam9rl_periphck[i].id); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 63097cdd4809..15fbbcf535bc 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -274,7 +274,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &at91sam9x5_pcr_layout, at91sam9x5_periphck[i].n, - "masterck_div", + "masterck_div", NULL, at91sam9x5_periphck[i].id, &range, INT_MIN, 0); if (IS_ERR(hw)) @@ -287,7 +287,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &at91sam9x5_pcr_layout, extra_pcks[i].n, - "masterck_div", + "masterck_div", NULL, extra_pcks[i].id, &range, INT_MIN, 0); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index 93ea685e27f6..c173a44c800a 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -97,14 +97,15 @@ static const struct clk_ops peripheral_ops = { struct clk_hw * __init at91_clk_register_peripheral(struct regmap *regmap, const char *name, - const char *parent_name, u32 id) + const char *parent_name, struct clk_hw *parent_hw, + u32 id) { struct clk_peripheral *periph; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; - if (!name || !parent_name || id > PERIPHERAL_ID_MAX) + if (!name || !(parent_name || parent_hw) || id > PERIPHERAL_ID_MAX) return ERR_PTR(-EINVAL); periph = kzalloc(sizeof(*periph), GFP_KERNEL); @@ -113,7 +114,10 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name, init.name = name; init.ops = &peripheral_ops; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; init.flags = 0; @@ -444,15 +448,16 @@ struct clk_hw * __init at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char *parent_name, + struct clk_hw *parent_hw, u32 id, const struct clk_range *range, int chg_pid, unsigned long flags) { struct clk_sam9x5_peripheral *periph; - struct clk_init_data init; + struct clk_init_data init = {}; struct clk_hw *hw; int ret; - if (!name || !parent_name) + if (!name || !(parent_name || parent_hw)) return ERR_PTR(-EINVAL); periph = kzalloc(sizeof(*periph), GFP_KERNEL); @@ -460,7 +465,10 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; init.flags = flags; if (chg_pid < 0) { diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 4a024bb97312..8995e1cc73c6 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -490,7 +490,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type) if (type == PERIPHERAL_AT91RM9200) { hw = at91_clk_register_peripheral(regmap, name, - parent_name, id); + parent_name, NULL, id); } else { struct clk_range range = CLK_RANGE(0, 0); unsigned long flags = 0; @@ -512,6 +512,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type) &dt_pcr_layout, name, parent_name, + NULL, id, &range, INT_MIN, flags); diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index c09abb8ff8fe..6866e810352b 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -199,11 +199,13 @@ at91_clk_sama7g5_register_master(struct regmap *regmap, struct clk_hw * __init at91_clk_register_peripheral(struct regmap *regmap, const char *name, - const char *parent_name, u32 id); + const char *parent_name, struct clk_hw *parent_hw, + u32 id); struct clk_hw * __init at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char *parent_name, + struct clk_hw *parent_hw, u32 id, const struct clk_range *range, int chg_pid, unsigned long flags); diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 3ff1eb3bee81..71fa8cb86a9d 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -337,7 +337,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sam9x60_pcr_layout, sam9x60_periphck[i].n, - "masterck_div", + "masterck_div", NULL, sam9x60_periphck[i].id, &range, INT_MIN, sam9x60_periphck[i].flags); diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index c47d43a7e95b..944e1fec8ad2 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -324,7 +324,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama5d2_pcr_layout, sama5d2_periphck[i].n, - "masterck_div", + "masterck_div", NULL, sama5d2_periphck[i].id, &range, INT_MIN, sama5d2_periphck[i].flags); @@ -338,7 +338,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama5d2_pcr_layout, sama5d2_periph32ck[i].n, - "h32mxck", + "h32mxck", NULL, sama5d2_periph32ck[i].id, &sama5d2_periph32ck[i].r, INT_MIN, 0); diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index d605a540b30f..f61bef0838c9 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -244,7 +244,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama5d3_pcr_layout, sama5d3_periphck[i].n, - "masterck_div", + "masterck_div", NULL, sama5d3_periphck[i].id, &sama5d3_periphck[i].r, INT_MIN, diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 21a61840d5f3..f0bf2096f666 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -267,7 +267,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama5d4_pcr_layout, sama5d4_periphck[i].n, - "masterck_div", + "masterck_div", NULL, sama5d4_periphck[i].id, &range, INT_MIN, sama5d4_periphck[i].flags); @@ -281,7 +281,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama5d4_pcr_layout, sama5d4_periph32ck[i].n, - "h32mxck", + "h32mxck", NULL, sama5d4_periph32ck[i].id, &range, INT_MIN, 0); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 989d66f5370e..c913c1c7a9f9 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1079,7 +1079,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama7g5_pcr_layout, sama7g5_periphck[i].n, - sama7g5_periphck[i].p, + sama7g5_periphck[i].p, NULL, sama7g5_periphck[i].id, &sama7g5_periphck[i].r, sama7g5_periphck[i].chgp ? 0 : From patchwork Thu Jun 15 09:32:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280974 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEABCC0015E for ; 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X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="218626871" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:12 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:11 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:07 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 05/11] clk: at91: clk-programmable: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:21 +0300 Message-ID: <20230615093227.576102-6-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in programmable clock driver. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-programmable were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91rm9200.c | 2 +- drivers/clk/at91/at91sam9260.c | 2 +- drivers/clk/at91/at91sam9g45.c | 2 +- drivers/clk/at91/at91sam9n12.c | 2 +- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 2 +- drivers/clk/at91/clk-programmable.c | 11 +++++++---- drivers/clk/at91/dt-compat.c | 2 +- drivers/clk/at91/pmc.h | 3 ++- drivers/clk/at91/sam9x60.c | 2 +- drivers/clk/at91/sama5d2.c | 2 +- drivers/clk/at91/sama5d3.c | 2 +- drivers/clk/at91/sama5d4.c | 2 +- drivers/clk/at91/sama7g5.c | 2 +- 14 files changed, 21 insertions(+), 17 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 9eaf54418b7e..2dd69628b7ba 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -171,7 +171,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 4, i, + parent_names, NULL, 4, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index b124a8da58c7..7d292d0c2bfc 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -448,7 +448,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 4, i, + parent_names, NULL, 4, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index be968b428ed7..b49415952510 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -191,7 +191,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91sam9g45_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 8441eae0daaa..63151cd0d3b2 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -216,7 +216,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91sam9x5_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 94a6b48352ce..858987757b87 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -148,7 +148,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 15fbbcf535bc..6a971b34f7dd 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -241,7 +241,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91sam9x5_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c index 6c4b259d31d3..1195fb405503 100644 --- a/drivers/clk/at91/clk-programmable.c +++ b/drivers/clk/at91/clk-programmable.c @@ -215,16 +215,16 @@ static const struct clk_ops programmable_ops = { struct clk_hw * __init at91_clk_register_programmable(struct regmap *regmap, const char *name, const char **parent_names, - u8 num_parents, u8 id, + struct clk_hw **parent_hws, u8 num_parents, u8 id, const struct clk_programmable_layout *layout, u32 *mux_table) { struct clk_programmable *prog; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; - if (id > PROG_ID_MAX) + if (id > PROG_ID_MAX || !(parent_names || parent_hws)) return ERR_PTR(-EINVAL); prog = kzalloc(sizeof(*prog), GFP_KERNEL); @@ -233,7 +233,10 @@ at91_clk_register_programmable(struct regmap *regmap, init.name = name; init.ops = &programmable_ops; - init.parent_names = parent_names; + if (parent_hws) + init.parent_hws = (const struct clk_hw **)parent_hws; + else + init.parent_names = parent_names; init.num_parents = num_parents; init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 8995e1cc73c6..96ce2287e13a 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -770,7 +770,7 @@ of_at91_clk_prog_setup(struct device_node *np, name = progclknp->name; hw = at91_clk_register_programmable(regmap, name, - parent_names, num_parents, + parent_names, NULL, num_parents, id, layout, mux_table); if (IS_ERR(hw)) continue; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 6866e810352b..658bbf574af9 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -234,7 +234,8 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, struct clk_hw * __init at91_clk_register_programmable(struct regmap *regmap, const char *name, - const char **parent_names, u8 num_parents, u8 id, + const char **parent_names, struct clk_hw **parent_hws, + u8 num_parents, u8 id, const struct clk_programmable_layout *layout, u32 *mux_table); diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 71fa8cb86a9d..369123dc009c 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -313,7 +313,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 6, i, + parent_names, NULL, 6, i, &sam9x60_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 944e1fec8ad2..8eda5f95d142 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -300,7 +300,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 6, i, + parent_names, NULL, 6, i, &sama5d2_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index f61bef0838c9..68a540cf8eda 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -220,7 +220,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91sam9x5_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index f0bf2096f666..9145fa184388 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -243,7 +243,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 5, i, + parent_names, NULL, 5, i, &at91sam9x5_programmable_layout, NULL); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index c913c1c7a9f9..22942af8dce4 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1056,7 +1056,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, parent_names, - 9, i, + NULL, 9, i, &programmable_layout, sama7g5_prog_mux_table); if (IS_ERR(hw)) From patchwork Thu Jun 15 09:32:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4180AEB64DC for ; Thu, 15 Jun 2023 09:35:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245577AbjFOJfj (ORCPT ); Thu, 15 Jun 2023 05:35:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343659AbjFOJfO (ORCPT ); Thu, 15 Jun 2023 05:35:14 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B92D295B; Thu, 15 Jun 2023 02:34:39 -0700 (PDT) DKIM-Signature: v=1; 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Thu, 15 Jun 2023 02:34:16 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:11 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 06/11] clk: at91: clk-system: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:22 +0300 Message-ID: <20230615093227.576102-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in system clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-system were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91rm9200.c | 2 +- drivers/clk/at91/at91sam9260.c | 2 +- drivers/clk/at91/at91sam9g45.c | 2 +- drivers/clk/at91/at91sam9n12.c | 2 +- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 4 ++-- drivers/clk/at91/clk-system.c | 12 ++++++++---- drivers/clk/at91/dt-compat.c | 4 ++-- drivers/clk/at91/pmc.h | 3 ++- drivers/clk/at91/sam9x60.c | 2 +- drivers/clk/at91/sama5d2.c | 2 +- drivers/clk/at91/sama5d3.c | 2 +- drivers/clk/at91/sama5d4.c | 2 +- drivers/clk/at91/sama7g5.c | 2 +- 14 files changed, 24 insertions(+), 19 deletions(-) diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c index 2dd69628b7ba..3f19e737ae4d 100644 --- a/drivers/clk/at91/at91rm9200.c +++ b/drivers/clk/at91/at91rm9200.c @@ -182,7 +182,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91rm9200_systemck); i++) { hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n, - at91rm9200_systemck[i].p, + at91rm9200_systemck[i].p, NULL, at91rm9200_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index 7d292d0c2bfc..0799a13060ea 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -459,7 +459,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np, for (i = 0; i < data->num_sck; i++) { hw = at91_clk_register_system(regmap, data->sck[i].n, - data->sck[i].p, + data->sck[i].p, NULL, data->sck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index b49415952510..ec2f26c3a80a 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -202,7 +202,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9g45_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n, - at91sam9g45_systemck[i].p, + at91sam9g45_systemck[i].p, NULL, at91sam9g45_systemck[i].id, at91sam9g45_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c index 63151cd0d3b2..751786184ae2 100644 --- a/drivers/clk/at91/at91sam9n12.c +++ b/drivers/clk/at91/at91sam9n12.c @@ -227,7 +227,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9n12_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9n12_systemck[i].n, - at91sam9n12_systemck[i].p, + at91sam9n12_systemck[i].p, NULL, at91sam9n12_systemck[i].id, at91sam9n12_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 858987757b87..051b2eeb9276 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -159,7 +159,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, - at91sam9rl_systemck[i].p, + at91sam9rl_systemck[i].p, NULL, at91sam9rl_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index 6a971b34f7dd..e1be2c4c54be 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -252,7 +252,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, for (i = 0; i < ARRAY_SIZE(at91sam9x5_systemck); i++) { hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n, - at91sam9x5_systemck[i].p, + at91sam9x5_systemck[i].p, NULL, at91sam9x5_systemck[i].id, at91sam9x5_systemck[i].flags); if (IS_ERR(hw)) @@ -263,7 +263,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, if (has_lcdck) { hw = at91_clk_register_system(regmap, "lcdck", "masterck_div", - 3, 0); + NULL, 3, 0); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 10193650429e..90eed39d0785 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -105,14 +105,15 @@ static const struct clk_ops system_ops = { struct clk_hw * __init at91_clk_register_system(struct regmap *regmap, const char *name, - const char *parent_name, u8 id, unsigned long flags) + const char *parent_name, struct clk_hw *parent_hw, u8 id, + unsigned long flags) { struct clk_system *sys; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; - if (!parent_name || id > SYSTEM_MAX_ID) + if (!(parent_name || parent_hw) || id > SYSTEM_MAX_ID) return ERR_PTR(-EINVAL); sys = kzalloc(sizeof(*sys), GFP_KERNEL); @@ -121,7 +122,10 @@ at91_clk_register_system(struct regmap *regmap, const char *name, init.name = name; init.ops = &system_ops; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; init.flags = CLK_SET_RATE_PARENT | flags; diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 96ce2287e13a..e5fcf2e0d235 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -908,8 +908,8 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np) if (!strcmp(sysclknp->name, "ddrck")) flags = CLK_IS_CRITICAL; - hw = at91_clk_register_system(regmap, name, parent_name, id, - flags); + hw = at91_clk_register_system(regmap, name, parent_name, NULL, + id, flags); if (IS_ERR(hw)) continue; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 658bbf574af9..101e005a9550 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -251,7 +251,8 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name, struct clk_hw * __init at91_clk_register_system(struct regmap *regmap, const char *name, - const char *parent_name, u8 id, unsigned long flags); + const char *parent_name, struct clk_hw *parent_hw, + u8 id, unsigned long flags); struct clk_hw * __init at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name, diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 369123dc009c..505827013b46 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -324,7 +324,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) { hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n, - sam9x60_systemck[i].p, + sam9x60_systemck[i].p, NULL, sam9x60_systemck[i].id, sam9x60_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 8eda5f95d142..c5df06190e1c 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -311,7 +311,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n, - sama5d2_systemck[i].p, + sama5d2_systemck[i].p, NULL, sama5d2_systemck[i].id, sama5d2_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index 68a540cf8eda..15fa180a3f58 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -231,7 +231,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d3_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d3_systemck[i].n, - sama5d3_systemck[i].p, + sama5d3_systemck[i].p, NULL, sama5d3_systemck[i].id, sama5d3_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 9145fa184388..2440a34d1d67 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -254,7 +254,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama5d4_systemck); i++) { hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n, - sama5d4_systemck[i].p, + sama5d4_systemck[i].p, NULL, sama5d4_systemck[i].id, sama5d4_systemck[i].flags); if (IS_ERR(hw)) diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 22942af8dce4..b606d642a22b 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1067,7 +1067,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama7g5_systemck); i++) { hw = at91_clk_register_system(regmap, sama7g5_systemck[i].n, - sama7g5_systemck[i].p, + sama7g5_systemck[i].p, NULL, sama7g5_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; From patchwork Thu Jun 15 09:32:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280976 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 713D3EB64DC for ; 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X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="216166862" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:31 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:20 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:17 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 07/11] clk: at91: clk-utmi: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:23 +0300 Message-ID: <20230615093227.576102-8-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in utmi clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-utmi were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/at91sam9g45.c | 2 +- drivers/clk/at91/at91sam9rl.c | 2 +- drivers/clk/at91/at91sam9x5.c | 2 +- drivers/clk/at91/clk-utmi.c | 24 +++++++++++++++++------- drivers/clk/at91/dt-compat.c | 2 +- drivers/clk/at91/pmc.h | 5 +++-- drivers/clk/at91/sama5d2.c | 2 +- drivers/clk/at91/sama5d3.c | 2 +- drivers/clk/at91/sama5d4.c | 2 +- drivers/clk/at91/sama7g5.c | 2 +- 10 files changed, 28 insertions(+), 17 deletions(-) diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c index ec2f26c3a80a..f45a7b80f7d8 100644 --- a/drivers/clk/at91/at91sam9g45.c +++ b/drivers/clk/at91/at91sam9g45.c @@ -145,7 +145,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np) at91sam9g45_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 051b2eeb9276..969f809e7d65 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -109,7 +109,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) at91sam9rl_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c index e1be2c4c54be..3b801d12fac0 100644 --- a/drivers/clk/at91/at91sam9x5.c +++ b/drivers/clk/at91/at91sam9x5.c @@ -193,7 +193,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np, at91sam9x5_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index a22c10d9a1b9..40c84f5af5e8 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -144,21 +144,30 @@ static struct clk_hw * __init at91_clk_register_utmi_internal(struct regmap *regmap_pmc, struct regmap *regmap_sfr, const char *name, const char *parent_name, + struct clk_hw *parent_hw, const struct clk_ops *ops, unsigned long flags) { struct clk_utmi *utmi; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; + if (!(parent_name || parent_hw)) + return ERR_PTR(-EINVAL); + utmi = kzalloc(sizeof(*utmi), GFP_KERNEL); if (!utmi) return ERR_PTR(-ENOMEM); init.name = name; init.ops = ops; - init.parent_names = parent_name ? &parent_name : NULL; - init.num_parents = parent_name ? 1 : 0; + if (parent_hw) { + init.parent_hws = parent_hw ? (const struct clk_hw **)&parent_hw : NULL; + init.num_parents = parent_hw ? 1 : 0; + } else { + init.parent_names = parent_name ? &parent_name : NULL; + init.num_parents = parent_name ? 1 : 0; + } init.flags = flags; utmi->hw.init = &init; @@ -177,10 +186,11 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc, struct clk_hw * __init at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr, - const char *name, const char *parent_name) + const char *name, const char *parent_name, + struct clk_hw *parent_hw) { return at91_clk_register_utmi_internal(regmap_pmc, regmap_sfr, name, - parent_name, &utmi_ops, CLK_SET_RATE_GATE); + parent_name, parent_hw, &utmi_ops, CLK_SET_RATE_GATE); } static int clk_utmi_sama7g5_prepare(struct clk_hw *hw) @@ -279,8 +289,8 @@ static const struct clk_ops sama7g5_utmi_ops = { struct clk_hw * __init at91_clk_sama7g5_register_utmi(struct regmap *regmap_pmc, const char *name, - const char *parent_name) + const char *parent_name, struct clk_hw *parent_hw) { return at91_clk_register_utmi_internal(regmap_pmc, NULL, name, - parent_name, &sama7g5_utmi_ops, 0); + parent_name, parent_hw, &sama7g5_utmi_ops, 0); } diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index e5fcf2e0d235..a32dc2111b90 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -1055,7 +1055,7 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np) regmap_sfr = NULL; } - hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name); + hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name, NULL); if (IS_ERR(hw)) return; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 101e005a9550..8e32be004843 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -269,10 +269,11 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name, struct clk_hw * __init at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr, - const char *name, const char *parent_name); + const char *name, const char *parent_name, + struct clk_hw *parent_hw); struct clk_hw * __init at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name, - const char *parent_name); + const char *parent_name, struct clk_hw *parent_hw); #endif /* __PMC_H_ */ diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index c5df06190e1c..c16594fce90c 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -249,7 +249,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np) if (IS_ERR(regmap_sfr)) regmap_sfr = NULL; - hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c index 15fa180a3f58..522ce6031446 100644 --- a/drivers/clk/at91/sama5d3.c +++ b/drivers/clk/at91/sama5d3.c @@ -172,7 +172,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np) sama5d3_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 2440a34d1d67..160c0bddb6a3 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -187,7 +187,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np) sama5d4_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck"); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); if (IS_ERR(hw)) goto err_free; diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index b606d642a22b..42f2f61cc6d1 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -1035,7 +1035,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) sama7g5_pmc->chws[sama7g5_mckx[i].eid] = hw; } - hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", "main_xtal"); + hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", "main_xtal", NULL); if (IS_ERR(hw)) goto err_free; From patchwork Thu Jun 15 09:32:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280972 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F558EB64D9 for ; Thu, 15 Jun 2023 09:35:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244424AbjFOJfh (ORCPT ); Thu, 15 Jun 2023 05:35:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343599AbjFOJfC (ORCPT ); Thu, 15 Jun 2023 05:35:02 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF4E8272A; Thu, 15 Jun 2023 02:34:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; 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Thu, 15 Jun 2023 02:34:25 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:21 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 08/11] clk: at91: clk-sam9x60-pll: add support for parent_hw Date: Thu, 15 Jun 2023 12:32:24 +0300 Message-ID: <20230615093227.576102-9-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add support for parent_hw in SAM9X60 PLL clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-sam9x60-pll were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/clk-sam9x60-pll.c | 17 ++++++++++++----- drivers/clk/at91/pmc.h | 3 ++- drivers/clk/at91/sam9x60.c | 4 ++-- drivers/clk/at91/sama7g5.c | 2 +- 4 files changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index d757003004cb..7143a160cdcc 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -616,7 +616,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, { struct sam9x60_frac *frac; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned long parent_rate, irqflags; unsigned int val; int ret; @@ -629,7 +629,10 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_name; + if (parent_name) + init.parent_names = &parent_name; + else + init.parent_hws = (const struct clk_hw **)&parent_hw; init.num_parents = 1; if (flags & CLK_SET_RATE_GATE) init.ops = &sam9x60_frac_pll_ops; @@ -692,14 +695,15 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, struct clk_hw * __init sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, - const char *name, const char *parent_name, u8 id, + const char *name, const char *parent_name, + struct clk_hw *parent_hw, u8 id, const struct clk_pll_characteristics *characteristics, const struct clk_pll_layout *layout, u32 flags, u32 safe_div) { struct sam9x60_div *div; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned long irqflags; unsigned int val; int ret; @@ -716,7 +720,10 @@ sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; if (flags & CLK_SET_RATE_GATE) init.ops = &sam9x60_div_pll_ops; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 8e32be004843..0f52e80bcd49 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -220,7 +220,8 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name, struct clk_hw * __init sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, - const char *name, const char *parent_name, u8 id, + const char *name, const char *parent_name, + struct clk_hw *parent_hw, u8 id, const struct clk_pll_characteristics *characteristics, const struct clk_pll_layout *layout, u32 flags, u32 safe_div); diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 505827013b46..e309cbf3cb9a 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -246,7 +246,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck", - "pllack_fracck", 0, &plla_characteristics, + "pllack_fracck", NULL, 0, &plla_characteristics, &pll_div_layout, /* * This feeds CPU. It should not @@ -266,7 +266,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck", - "upllck_fracck", 1, &upll_characteristics, + "upllck_fracck", NULL, 1, &upll_characteristics, &pll_div_layout, CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 42f2f61cc6d1..3297e028c2c5 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -975,7 +975,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) case PLL_TYPE_DIV: hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, sama7g5_plls[i][j].n, - sama7g5_plls[i][j].p, i, + sama7g5_plls[i][j].p, NULL, i, sama7g5_plls[i][j].c, sama7g5_plls[i][j].l, sama7g5_plls[i][j].f, From patchwork Thu Jun 15 09:32:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280978 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 979AFEB64DB for ; Thu, 15 Jun 2023 09:36:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245741AbjFOJgp (ORCPT ); Thu, 15 Jun 2023 05:36:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245747AbjFOJgL (ORCPT ); Thu, 15 Jun 2023 05:36:11 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78D9C358C; Thu, 15 Jun 2023 02:35:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686821723; x=1718357723; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6S7fBvJMryuXc9NJ//LZErtsGf/tBr9F4503HKO5kT0=; b=sKYBEJgu+WGI/0j7DwIp7hORmg3Qzjroe/55YOh0gMWy9p2jujb5UXtt Oip8RomJJwVbZLJEGgFHPDF9g7rcGsCM3U/IfMgdtumNy9Ci6H4rj77eM zg0MIdpglSltMl/L5RtUl02nTZ6TKncbEypG79VmaalwrSZjJu8GCAuZx IPWH1BqQpDXjS0cHa7h0vO7j5Bzl8CeYROm+cSKirRIR0UBT62LmEX4FR rzicYCOhaPaiQqolXreB8vcSKjGjNyGP/w65wn/IJ/oMRvQKpi30MSyEW AIctA7qqpTfF3E6GwEnNEMSU6/5+p2/OiAdmnDUJvVK0HBvC9z8Br1LV+ w==; X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="216166897" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 15 Jun 2023 02:34:35 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:29 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:25 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 09/11] clk: at91: sckc: switch to parent_data/parent_hw Date: Thu, 15 Jun 2023 12:32:25 +0300 Message-ID: <20230615093227.576102-10-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Switch slow clock drivers to use parent_data and parent_hw. With this parent-child relation is described with pointers rather than strings. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/sckc.c | 75 ++++++++++++++++++++++++++--------------- 1 file changed, 48 insertions(+), 27 deletions(-) diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c index fdc9b669f8a7..fdd963eb9f0f 100644 --- a/drivers/clk/at91/sckc.c +++ b/drivers/clk/at91/sckc.c @@ -117,17 +117,17 @@ static const struct clk_ops slow_osc_ops = { static struct clk_hw * __init at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, - const char *parent_name, + const struct clk_parent_data *parent_data, unsigned long startup, bool bypass, const struct clk_slow_bits *bits) { struct clk_slow_osc *osc; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; - if (!sckcr || !name || !parent_name) + if (!sckcr || !name || !parent_data) return ERR_PTR(-EINVAL); osc = kzalloc(sizeof(*osc), GFP_KERNEL); @@ -136,7 +136,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr, init.name = name; init.ops = &slow_osc_ops; - init.parent_names = &parent_name; + init.parent_data = parent_data; init.num_parents = 1; init.flags = CLK_IGNORE_UNUSED; @@ -317,16 +317,16 @@ static const struct clk_ops sam9x5_slow_ops = { static struct clk_hw * __init at91_clk_register_sam9x5_slow(void __iomem *sckcr, const char *name, - const char **parent_names, + const struct clk_hw **parent_hws, int num_parents, const struct clk_slow_bits *bits) { struct clk_sam9x5_slow *slowck; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; int ret; - if (!sckcr || !name || !parent_names || !num_parents) + if (!sckcr || !name || !parent_hws || !num_parents) return ERR_PTR(-EINVAL); slowck = kzalloc(sizeof(*slowck), GFP_KERNEL); @@ -335,7 +335,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr, init.name = name; init.ops = &sam9x5_slow_ops; - init.parent_names = parent_names; + init.parent_hws = parent_hws; init.num_parents = num_parents; init.flags = 0; @@ -366,18 +366,21 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, unsigned int rc_osc_startup_us, const struct clk_slow_bits *bits) { - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; void __iomem *regbase = of_iomap(np, 0); struct device_node *child = NULL; const char *xtal_name; struct clk_hw *slow_rc, *slow_osc, *slowck; + static struct clk_parent_data parent_data = { + .name = "slow_xtal", + }; + const struct clk_hw *parent_hws[2]; bool bypass; int ret; if (!regbase) return; - slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0], + slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc", 32768, 50000000, rc_osc_startup_us, bits); if (IS_ERR(slow_rc)) @@ -401,12 +404,16 @@ static void __init at91sam9x5_sckc_register(struct device_node *np, if (!xtal_name) goto unregister_slow_rc; - slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], - xtal_name, 1200000, bypass, bits); + parent_data.fw_name = xtal_name; + + slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", + &parent_data, 1200000, bypass, bits); if (IS_ERR(slow_osc)) goto unregister_slow_rc; - slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, + parent_hws[0] = slow_rc; + parent_hws[1] = slow_osc; + slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws, 2, bits); if (IS_ERR(slowck)) goto unregister_slow_osc; @@ -464,14 +471,17 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) struct clk_hw_onecell_data *clk_data; struct clk_hw *slow_rc, *slow_osc; const char *xtal_name; - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; + const struct clk_hw *parent_hws[2]; + static struct clk_parent_data parent_data = { + .name = "slow_xtal", + }; bool bypass; int ret; if (!regbase) return; - slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0], + slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, "slow_rc_osc", NULL, 0, 32768, 93750000); if (IS_ERR(slow_rc)) @@ -481,9 +491,10 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) if (!xtal_name) goto unregister_slow_rc; + parent_data.fw_name = xtal_name; bypass = of_property_read_bool(np, "atmel,osc-bypass"); - slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], - xtal_name, 5000000, bypass, + slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", + &parent_data, 5000000, bypass, &at91sam9x60_bits); if (IS_ERR(slow_osc)) goto unregister_slow_rc; @@ -494,14 +505,16 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np) /* MD_SLCK and TD_SLCK. */ clk_data->num = 2; - clk_data->hws[0] = clk_hw_register_fixed_rate(NULL, "md_slck", - parent_names[0], - 0, 32768); + clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck", + slow_rc, + 0, 32768); if (IS_ERR(clk_data->hws[0])) goto clk_data_free; + parent_hws[0] = slow_rc; + parent_hws[1] = slow_osc; clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", - parent_names, 2, + parent_hws, 2, &at91sam9x60_bits); if (IS_ERR(clk_data->hws[1])) goto unregister_md_slck; @@ -572,30 +585,36 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) void __iomem *regbase = of_iomap(np, 0); struct clk_hw *slow_rc, *slowck; struct clk_sama5d4_slow_osc *osc; - struct clk_init_data init; + struct clk_init_data init = {}; const char *xtal_name; - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; + const struct clk_hw *parent_hws[2]; + static struct clk_parent_data parent_data = { + .name = "slow_xtal", + }; int ret; if (!regbase) return; slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, - parent_names[0], + "slow_rc_osc", NULL, 0, 32768, 250000000); if (IS_ERR(slow_rc)) return; xtal_name = of_clk_get_parent_name(np, 0); + if (!xtal_name) + goto unregister_slow_rc; + parent_data.fw_name = xtal_name; osc = kzalloc(sizeof(*osc), GFP_KERNEL); if (!osc) goto unregister_slow_rc; - init.name = parent_names[1]; + init.name = "slow_osc"; init.ops = &sama5d4_slow_osc_ops; - init.parent_names = &xtal_name; + init.parent_data = &parent_data; init.num_parents = 1; init.flags = CLK_IGNORE_UNUSED; @@ -608,8 +627,10 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np) if (ret) goto free_slow_osc_data; + parent_hws[0] = slow_rc; + parent_hws[1] = &osc->hw; slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", - parent_names, 2, + parent_hws, 2, &at91sama5d4_bits); if (IS_ERR(slowck)) goto unregister_slow_osc; From patchwork Thu Jun 15 09:32:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13280979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BD42EB64DB for ; Thu, 15 Jun 2023 09:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343499AbjFOJhE (ORCPT ); Thu, 15 Jun 2023 05:37:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243249AbjFOJgi (ORCPT ); Thu, 15 Jun 2023 05:36:38 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A39642711; Thu, 15 Jun 2023 02:35:36 -0700 (PDT) DKIM-Signature: v=1; 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Thu, 15 Jun 2023 02:34:33 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:29 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 10/11] clk: at91: sama7g5: switch to parent_hw and parent_data Date: Thu, 15 Jun 2023 12:32:26 +0300 Message-ID: <20230615093227.576102-11-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Switch SAMA7G5 clocks to use parent_hw and parent_data. Having parent_hw instead of parent names improves to clock registration speed and re-parenting. Extra time saved on registration is ~250us when running at 800MHz. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/sama7g5.c | 796 +++++++++++++++++++++---------------- 1 file changed, 454 insertions(+), 342 deletions(-) diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 3297e028c2c5..7e06ea22c8af 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -56,6 +56,18 @@ enum pll_ids { PLL_ID_MAX, }; +/* + * PLL component identifier + * @PLL_COMPID_FRAC: Fractional PLL component identifier + * @PLL_COMPID_DIV0: 1st PLL divider component identifier + * @PLL_COMPID_DIV1: 2nd PLL divider component identifier + */ +enum pll_component_id { + PLL_COMPID_FRAC, + PLL_COMPID_DIV0, + PLL_COMPID_DIV1, +}; + /* * PLL type identifiers * @PLL_TYPE_FRAC: fractional PLL identifier @@ -118,186 +130,234 @@ static const struct clk_pll_characteristics pll_characteristics = { .output = pll_outputs, }; +/* + * SAMA7G5 PLL possible parents + * @SAMA7G5_PLL_PARENT_MAINCK: MAINCK is PLL a parent + * @SAMA7G5_PLL_PARENT_MAIN_XTAL: MAIN XTAL is a PLL parent + * @SAMA7G5_PLL_PARENT_FRACCK: Frac PLL is a PLL parent (for PLL dividers) + */ +enum sama7g5_pll_parent { + SAMA7G5_PLL_PARENT_MAINCK, + SAMA7G5_PLL_PARENT_MAIN_XTAL, + SAMA7G5_PLL_PARENT_FRACCK, +}; + /* * PLL clocks description * @n: clock name - * @p: clock parent * @l: clock layout * @c: clock characteristics + * @hw: pointer to clk_hw * @t: clock type * @f: clock flags + * @p: clock parent * @eid: export index in sama7g5->chws[] array * @safe_div: intermediate divider need to be set on PRE_RATE_CHANGE * notification */ -static const struct { +static struct sama7g5_pll { const char *n; - const char *p; const struct clk_pll_layout *l; const struct clk_pll_characteristics *c; + struct clk_hw *hw; unsigned long f; + enum sama7g5_pll_parent p; u8 t; u8 eid; u8 safe_div; } sama7g5_plls[][PLL_ID_MAX] = { [PLL_ID_CPU] = { - { .n = "cpupll_fracck", - .p = "mainck", - .l = &pll_layout_frac, - .c = &cpu_pll_characteristics, - .t = PLL_TYPE_FRAC, - /* - * This feeds cpupll_divpmcck which feeds CPU. It should - * not be disabled. - */ - .f = CLK_IS_CRITICAL, }, - - { .n = "cpupll_divpmcck", - .p = "cpupll_fracck", - .l = &pll_layout_divpmc, - .c = &cpu_pll_characteristics, - .t = PLL_TYPE_DIV, - /* This feeds CPU. It should not be disabled. */ - .f = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, - .eid = PMC_CPUPLL, - /* - * Safe div=15 should be safe even for switching b/w 1GHz and - * 90MHz (frac pll might go up to 1.2GHz). - */ - .safe_div = 15, }, + [PLL_COMPID_FRAC] = { + .n = "cpupll_fracck", + .p = SAMA7G5_PLL_PARENT_MAINCK, + .l = &pll_layout_frac, + .c = &cpu_pll_characteristics, + .t = PLL_TYPE_FRAC, + /* + * This feeds cpupll_divpmcck which feeds CPU. It should + * not be disabled. + */ + .f = CLK_IS_CRITICAL, + }, + + [PLL_COMPID_DIV0] = { + .n = "cpupll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &cpu_pll_characteristics, + .t = PLL_TYPE_DIV, + /* This feeds CPU. It should not be disabled. */ + .f = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, + .eid = PMC_CPUPLL, + /* + * Safe div=15 should be safe even for switching b/w 1GHz and + * 90MHz (frac pll might go up to 1.2GHz). + */ + .safe_div = 15, + }, }, [PLL_ID_SYS] = { - { .n = "syspll_fracck", - .p = "mainck", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - /* - * This feeds syspll_divpmcck which may feed critical parts - * of the systems like timers. Therefore it should not be - * disabled. - */ - .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, }, - - { .n = "syspll_divpmcck", - .p = "syspll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - /* - * This may feed critical parts of the systems like timers. - * Therefore it should not be disabled. - */ - .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, - .eid = PMC_SYSPLL, }, + [PLL_COMPID_FRAC] = { + .n = "syspll_fracck", + .p = SAMA7G5_PLL_PARENT_MAINCK, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + /* + * This feeds syspll_divpmcck which may feed critical parts + * of the systems like timers. Therefore it should not be + * disabled. + */ + .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, + }, + + [PLL_COMPID_DIV0] = { + .n = "syspll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + /* + * This may feed critical parts of the systems like timers. + * Therefore it should not be disabled. + */ + .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, + .eid = PMC_SYSPLL, + }, }, [PLL_ID_DDR] = { - { .n = "ddrpll_fracck", - .p = "mainck", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - /* - * This feeds ddrpll_divpmcck which feeds DDR. It should not - * be disabled. - */ - .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, }, - - { .n = "ddrpll_divpmcck", - .p = "ddrpll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - /* This feeds DDR. It should not be disabled. */ - .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, }, + [PLL_COMPID_FRAC] = { + .n = "ddrpll_fracck", + .p = SAMA7G5_PLL_PARENT_MAINCK, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + /* + * This feeds ddrpll_divpmcck which feeds DDR. It should not + * be disabled. + */ + .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, + }, + + [PLL_COMPID_DIV0] = { + .n = "ddrpll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + /* This feeds DDR. It should not be disabled. */ + .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE, + }, }, [PLL_ID_IMG] = { - { .n = "imgpll_fracck", - .p = "mainck", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - .f = CLK_SET_RATE_GATE, }, - - { .n = "imgpll_divpmcck", - .p = "imgpll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT, }, + [PLL_COMPID_FRAC] = { + .n = "imgpll_fracck", + .p = SAMA7G5_PLL_PARENT_MAINCK, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + .f = CLK_SET_RATE_GATE, + }, + + [PLL_COMPID_DIV0] = { + .n = "imgpll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT, + }, }, [PLL_ID_BAUD] = { - { .n = "baudpll_fracck", - .p = "mainck", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - .f = CLK_SET_RATE_GATE, }, - - { .n = "baudpll_divpmcck", - .p = "baudpll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT, }, + [PLL_COMPID_FRAC] = { + .n = "baudpll_fracck", + .p = SAMA7G5_PLL_PARENT_MAINCK, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + .f = CLK_SET_RATE_GATE, }, + + [PLL_COMPID_DIV0] = { + .n = "baudpll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT, + }, }, [PLL_ID_AUDIO] = { - { .n = "audiopll_fracck", - .p = "main_xtal", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - .f = CLK_SET_RATE_GATE, }, - - { .n = "audiopll_divpmcck", - .p = "audiopll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT, - .eid = PMC_AUDIOPMCPLL, }, - - { .n = "audiopll_diviock", - .p = "audiopll_fracck", - .l = &pll_layout_divio, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT, - .eid = PMC_AUDIOIOPLL, }, + [PLL_COMPID_FRAC] = { + .n = "audiopll_fracck", + .p = SAMA7G5_PLL_PARENT_MAIN_XTAL, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + .f = CLK_SET_RATE_GATE, + }, + + [PLL_COMPID_DIV0] = { + .n = "audiopll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT, + .eid = PMC_AUDIOPMCPLL, + }, + + [PLL_COMPID_DIV1] = { + .n = "audiopll_diviock", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divio, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT, + .eid = PMC_AUDIOIOPLL, + }, }, [PLL_ID_ETH] = { - { .n = "ethpll_fracck", - .p = "main_xtal", - .l = &pll_layout_frac, - .c = &pll_characteristics, - .t = PLL_TYPE_FRAC, - .f = CLK_SET_RATE_GATE, }, - - { .n = "ethpll_divpmcck", - .p = "ethpll_fracck", - .l = &pll_layout_divpmc, - .c = &pll_characteristics, - .t = PLL_TYPE_DIV, - .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT, }, + [PLL_COMPID_FRAC] = { + .n = "ethpll_fracck", + .p = SAMA7G5_PLL_PARENT_MAIN_XTAL, + .l = &pll_layout_frac, + .c = &pll_characteristics, + .t = PLL_TYPE_FRAC, + .f = CLK_SET_RATE_GATE, + }, + + [PLL_COMPID_DIV0] = { + .n = "ethpll_divpmcck", + .p = SAMA7G5_PLL_PARENT_FRACCK, + .l = &pll_layout_divpmc, + .c = &pll_characteristics, + .t = PLL_TYPE_DIV, + .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | + CLK_SET_RATE_PARENT, + }, }, }; +/* Used to create an array entry identifying a PLL by its components. */ +#define PLL_IDS_TO_ARR_ENTRY(_id, _comp) { PLL_ID_##_id, PLL_COMPID_##_comp} + /* * Master clock (MCK[1..4]) description * @n: clock name - * @ep: extra parents names array * @ep_chg_chg_id: index in parents array that specifies the changeable + * @ep: extra parents names array (entry formed by PLL components + * identifiers (see enum pll_component_id)) + * @hw: pointer to clk_hw * parent * @ep_count: extra parents count * @ep_mux_table: mux table for extra parents @@ -305,9 +365,13 @@ static const struct { * @eid: export index in sama7g5->chws[] array * @c: true if clock is critical and cannot be disabled */ -static const struct { +static struct { const char *n; - const char *ep[4]; + struct { + int pll_id; + int pll_compid; + } ep[4]; + struct clk_hw *hw; int ep_chg_id; u8 ep_count; u8 ep_mux_table[4]; @@ -315,9 +379,10 @@ static const struct { u8 eid; u8 c; } sama7g5_mckx[] = { + { .n = "mck0", }, /* Dummy entry for MCK0 to store hw in probe. */ { .n = "mck1", .id = 1, - .ep = { "syspll_divpmcck", }, + .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), }, .ep_mux_table = { 5, }, .ep_count = 1, .ep_chg_id = INT_MIN, @@ -326,7 +391,7 @@ static const struct { { .n = "mck2", .id = 2, - .ep = { "ddrpll_divpmcck", }, + .ep = { PLL_IDS_TO_ARR_ENTRY(DDR, DIV0), }, .ep_mux_table = { 6, }, .ep_count = 1, .ep_chg_id = INT_MIN, @@ -334,14 +399,15 @@ static const struct { { .n = "mck3", .id = 3, - .ep = { "syspll_divpmcck", "ddrpll_divpmcck", "imgpll_divpmcck", }, + .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(DDR, DIV0), + PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), }, .ep_mux_table = { 5, 6, 7, }, .ep_count = 3, .ep_chg_id = 5, }, { .n = "mck4", .id = 4, - .ep = { "syspll_divpmcck", }, + .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), }, .ep_mux_table = { 5, }, .ep_count = 1, .ep_chg_id = INT_MIN, @@ -351,120 +417,137 @@ static const struct { /* * System clock description * @n: clock name - * @p: clock parent name * @id: clock id */ static const struct { const char *n; - const char *p; u8 id; } sama7g5_systemck[] = { - { .n = "pck0", .p = "prog0", .id = 8, }, - { .n = "pck1", .p = "prog1", .id = 9, }, - { .n = "pck2", .p = "prog2", .id = 10, }, - { .n = "pck3", .p = "prog3", .id = 11, }, - { .n = "pck4", .p = "prog4", .id = 12, }, - { .n = "pck5", .p = "prog5", .id = 13, }, - { .n = "pck6", .p = "prog6", .id = 14, }, - { .n = "pck7", .p = "prog7", .id = 15, }, + { .n = "pck0", .id = 8, }, + { .n = "pck1", .id = 9, }, + { .n = "pck2", .id = 10, }, + { .n = "pck3", .id = 11, }, + { .n = "pck4", .id = 12, }, + { .n = "pck5", .id = 13, }, + { .n = "pck6", .id = 14, }, + { .n = "pck7", .id = 15, }, }; /* Mux table for programmable clocks. */ static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, }; +/* + * Peripheral clock parent hw identifier (used to index in sama7g5_mckx[]) + * @PCK_PARENT_HW_MCK0: pck parent hw identifier is MCK0 + * @PCK_PARENT_HW_MCK1: pck parent hw identifier is MCK1 + * @PCK_PARENT_HW_MCK2: pck parent hw identifier is MCK2 + * @PCK_PARENT_HW_MCK3: pck parent hw identifier is MCK3 + * @PCK_PARENT_HW_MCK4: pck parent hw identifier is MCK4 + * @PCK_PARENT_HW_MAX: max identifier + */ +enum sama7g5_pck_parent_hw_id { + PCK_PARENT_HW_MCK0, + PCK_PARENT_HW_MCK1, + PCK_PARENT_HW_MCK2, + PCK_PARENT_HW_MCK3, + PCK_PARENT_HW_MCK4, + PCK_PARENT_HW_MAX, +}; + /* * Peripheral clock description * @n: clock name - * @p: clock parent name + * @p: clock parent hw id * @r: clock range values * @id: clock id * @chgp: index in parent array of the changeable parent */ -static const struct { +static struct { const char *n; - const char *p; + enum sama7g5_pck_parent_hw_id p; struct clk_range r; u8 chgp; u8 id; } sama7g5_periphck[] = { - { .n = "pioA_clk", .p = "mck0", .id = 11, }, - { .n = "securam_clk", .p = "mck0", .id = 18, }, - { .n = "sfr_clk", .p = "mck1", .id = 19, }, - { .n = "hsmc_clk", .p = "mck1", .id = 21, }, - { .n = "xdmac0_clk", .p = "mck1", .id = 22, }, - { .n = "xdmac1_clk", .p = "mck1", .id = 23, }, - { .n = "xdmac2_clk", .p = "mck1", .id = 24, }, - { .n = "acc_clk", .p = "mck1", .id = 25, }, - { .n = "aes_clk", .p = "mck1", .id = 27, }, - { .n = "tzaesbasc_clk", .p = "mck1", .id = 28, }, - { .n = "asrc_clk", .p = "mck1", .id = 30, .r = { .max = 200000000, }, }, - { .n = "cpkcc_clk", .p = "mck0", .id = 32, }, - { .n = "csi_clk", .p = "mck3", .id = 33, .r = { .max = 266000000, }, .chgp = 1, }, - { .n = "csi2dc_clk", .p = "mck3", .id = 34, .r = { .max = 266000000, }, .chgp = 1, }, - { .n = "eic_clk", .p = "mck1", .id = 37, }, - { .n = "flex0_clk", .p = "mck1", .id = 38, }, - { .n = "flex1_clk", .p = "mck1", .id = 39, }, - { .n = "flex2_clk", .p = "mck1", .id = 40, }, - { .n = "flex3_clk", .p = "mck1", .id = 41, }, - { .n = "flex4_clk", .p = "mck1", .id = 42, }, - { .n = "flex5_clk", .p = "mck1", .id = 43, }, - { .n = "flex6_clk", .p = "mck1", .id = 44, }, - { .n = "flex7_clk", .p = "mck1", .id = 45, }, - { .n = "flex8_clk", .p = "mck1", .id = 46, }, - { .n = "flex9_clk", .p = "mck1", .id = 47, }, - { .n = "flex10_clk", .p = "mck1", .id = 48, }, - { .n = "flex11_clk", .p = "mck1", .id = 49, }, - { .n = "gmac0_clk", .p = "mck1", .id = 51, }, - { .n = "gmac1_clk", .p = "mck1", .id = 52, }, - { .n = "icm_clk", .p = "mck1", .id = 55, }, - { .n = "isc_clk", .p = "mck3", .id = 56, .r = { .max = 266000000, }, .chgp = 1, }, - { .n = "i2smcc0_clk", .p = "mck1", .id = 57, .r = { .max = 200000000, }, }, - { .n = "i2smcc1_clk", .p = "mck1", .id = 58, .r = { .max = 200000000, }, }, - { .n = "matrix_clk", .p = "mck1", .id = 60, }, - { .n = "mcan0_clk", .p = "mck1", .id = 61, .r = { .max = 200000000, }, }, - { .n = "mcan1_clk", .p = "mck1", .id = 62, .r = { .max = 200000000, }, }, - { .n = "mcan2_clk", .p = "mck1", .id = 63, .r = { .max = 200000000, }, }, - { .n = "mcan3_clk", .p = "mck1", .id = 64, .r = { .max = 200000000, }, }, - { .n = "mcan4_clk", .p = "mck1", .id = 65, .r = { .max = 200000000, }, }, - { .n = "mcan5_clk", .p = "mck1", .id = 66, .r = { .max = 200000000, }, }, - { .n = "pdmc0_clk", .p = "mck1", .id = 68, .r = { .max = 200000000, }, }, - { .n = "pdmc1_clk", .p = "mck1", .id = 69, .r = { .max = 200000000, }, }, - { .n = "pit64b0_clk", .p = "mck1", .id = 70, }, - { .n = "pit64b1_clk", .p = "mck1", .id = 71, }, - { .n = "pit64b2_clk", .p = "mck1", .id = 72, }, - { .n = "pit64b3_clk", .p = "mck1", .id = 73, }, - { .n = "pit64b4_clk", .p = "mck1", .id = 74, }, - { .n = "pit64b5_clk", .p = "mck1", .id = 75, }, - { .n = "pwm_clk", .p = "mck1", .id = 77, }, - { .n = "qspi0_clk", .p = "mck1", .id = 78, }, - { .n = "qspi1_clk", .p = "mck1", .id = 79, }, - { .n = "sdmmc0_clk", .p = "mck1", .id = 80, }, - { .n = "sdmmc1_clk", .p = "mck1", .id = 81, }, - { .n = "sdmmc2_clk", .p = "mck1", .id = 82, }, - { .n = "sha_clk", .p = "mck1", .id = 83, }, - { .n = "spdifrx_clk", .p = "mck1", .id = 84, .r = { .max = 200000000, }, }, - { .n = "spdiftx_clk", .p = "mck1", .id = 85, .r = { .max = 200000000, }, }, - { .n = "ssc0_clk", .p = "mck1", .id = 86, .r = { .max = 200000000, }, }, - { .n = "ssc1_clk", .p = "mck1", .id = 87, .r = { .max = 200000000, }, }, - { .n = "tcb0_ch0_clk", .p = "mck1", .id = 88, .r = { .max = 200000000, }, }, - { .n = "tcb0_ch1_clk", .p = "mck1", .id = 89, .r = { .max = 200000000, }, }, - { .n = "tcb0_ch2_clk", .p = "mck1", .id = 90, .r = { .max = 200000000, }, }, - { .n = "tcb1_ch0_clk", .p = "mck1", .id = 91, .r = { .max = 200000000, }, }, - { .n = "tcb1_ch1_clk", .p = "mck1", .id = 92, .r = { .max = 200000000, }, }, - { .n = "tcb1_ch2_clk", .p = "mck1", .id = 93, .r = { .max = 200000000, }, }, - { .n = "tcpca_clk", .p = "mck1", .id = 94, }, - { .n = "tcpcb_clk", .p = "mck1", .id = 95, }, - { .n = "tdes_clk", .p = "mck1", .id = 96, }, - { .n = "trng_clk", .p = "mck1", .id = 97, }, - { .n = "udphsa_clk", .p = "mck1", .id = 104, }, - { .n = "udphsb_clk", .p = "mck1", .id = 105, }, - { .n = "uhphs_clk", .p = "mck1", .id = 106, }, + { .n = "pioA_clk", .p = PCK_PARENT_HW_MCK0, .id = 11, }, + { .n = "securam_clk", .p = PCK_PARENT_HW_MCK0, .id = 18, }, + { .n = "sfr_clk", .p = PCK_PARENT_HW_MCK1, .id = 19, }, + { .n = "hsmc_clk", .p = PCK_PARENT_HW_MCK1, .id = 21, }, + { .n = "xdmac0_clk", .p = PCK_PARENT_HW_MCK1, .id = 22, }, + { .n = "xdmac1_clk", .p = PCK_PARENT_HW_MCK1, .id = 23, }, + { .n = "xdmac2_clk", .p = PCK_PARENT_HW_MCK1, .id = 24, }, + { .n = "acc_clk", .p = PCK_PARENT_HW_MCK1, .id = 25, }, + { .n = "aes_clk", .p = PCK_PARENT_HW_MCK1, .id = 27, }, + { .n = "tzaesbasc_clk", .p = PCK_PARENT_HW_MCK1, .id = 28, }, + { .n = "asrc_clk", .p = PCK_PARENT_HW_MCK1, .id = 30, .r = { .max = 200000000, }, }, + { .n = "cpkcc_clk", .p = PCK_PARENT_HW_MCK0, .id = 32, }, + { .n = "csi_clk", .p = PCK_PARENT_HW_MCK3, .id = 33, .r = { .max = 266000000, }, .chgp = 1, }, + { .n = "csi2dc_clk", .p = PCK_PARENT_HW_MCK3, .id = 34, .r = { .max = 266000000, }, .chgp = 1, }, + { .n = "eic_clk", .p = PCK_PARENT_HW_MCK1, .id = 37, }, + { .n = "flex0_clk", .p = PCK_PARENT_HW_MCK1, .id = 38, }, + { .n = "flex1_clk", .p = PCK_PARENT_HW_MCK1, .id = 39, }, + { .n = "flex2_clk", .p = PCK_PARENT_HW_MCK1, .id = 40, }, + { .n = "flex3_clk", .p = PCK_PARENT_HW_MCK1, .id = 41, }, + { .n = "flex4_clk", .p = PCK_PARENT_HW_MCK1, .id = 42, }, + { .n = "flex5_clk", .p = PCK_PARENT_HW_MCK1, .id = 43, }, + { .n = "flex6_clk", .p = PCK_PARENT_HW_MCK1, .id = 44, }, + { .n = "flex7_clk", .p = PCK_PARENT_HW_MCK1, .id = 45, }, + { .n = "flex8_clk", .p = PCK_PARENT_HW_MCK1, .id = 46, }, + { .n = "flex9_clk", .p = PCK_PARENT_HW_MCK1, .id = 47, }, + { .n = "flex10_clk", .p = PCK_PARENT_HW_MCK1, .id = 48, }, + { .n = "flex11_clk", .p = PCK_PARENT_HW_MCK1, .id = 49, }, + { .n = "gmac0_clk", .p = PCK_PARENT_HW_MCK1, .id = 51, }, + { .n = "gmac1_clk", .p = PCK_PARENT_HW_MCK1, .id = 52, }, + { .n = "icm_clk", .p = PCK_PARENT_HW_MCK1, .id = 55, }, + { .n = "isc_clk", .p = PCK_PARENT_HW_MCK3, .id = 56, .r = { .max = 266000000, }, .chgp = 1, }, + { .n = "i2smcc0_clk", .p = PCK_PARENT_HW_MCK1, .id = 57, .r = { .max = 200000000, }, }, + { .n = "i2smcc1_clk", .p = PCK_PARENT_HW_MCK1, .id = 58, .r = { .max = 200000000, }, }, + { .n = "matrix_clk", .p = PCK_PARENT_HW_MCK1, .id = 60, }, + { .n = "mcan0_clk", .p = PCK_PARENT_HW_MCK1, .id = 61, .r = { .max = 200000000, }, }, + { .n = "mcan1_clk", .p = PCK_PARENT_HW_MCK1, .id = 62, .r = { .max = 200000000, }, }, + { .n = "mcan2_clk", .p = PCK_PARENT_HW_MCK1, .id = 63, .r = { .max = 200000000, }, }, + { .n = "mcan3_clk", .p = PCK_PARENT_HW_MCK1, .id = 64, .r = { .max = 200000000, }, }, + { .n = "mcan4_clk", .p = PCK_PARENT_HW_MCK1, .id = 65, .r = { .max = 200000000, }, }, + { .n = "mcan5_clk", .p = PCK_PARENT_HW_MCK1, .id = 66, .r = { .max = 200000000, }, }, + { .n = "pdmc0_clk", .p = PCK_PARENT_HW_MCK1, .id = 68, .r = { .max = 200000000, }, }, + { .n = "pdmc1_clk", .p = PCK_PARENT_HW_MCK1, .id = 69, .r = { .max = 200000000, }, }, + { .n = "pit64b0_clk", .p = PCK_PARENT_HW_MCK1, .id = 70, }, + { .n = "pit64b1_clk", .p = PCK_PARENT_HW_MCK1, .id = 71, }, + { .n = "pit64b2_clk", .p = PCK_PARENT_HW_MCK1, .id = 72, }, + { .n = "pit64b3_clk", .p = PCK_PARENT_HW_MCK1, .id = 73, }, + { .n = "pit64b4_clk", .p = PCK_PARENT_HW_MCK1, .id = 74, }, + { .n = "pit64b5_clk", .p = PCK_PARENT_HW_MCK1, .id = 75, }, + { .n = "pwm_clk", .p = PCK_PARENT_HW_MCK1, .id = 77, }, + { .n = "qspi0_clk", .p = PCK_PARENT_HW_MCK1, .id = 78, }, + { .n = "qspi1_clk", .p = PCK_PARENT_HW_MCK1, .id = 79, }, + { .n = "sdmmc0_clk", .p = PCK_PARENT_HW_MCK1, .id = 80, }, + { .n = "sdmmc1_clk", .p = PCK_PARENT_HW_MCK1, .id = 81, }, + { .n = "sdmmc2_clk", .p = PCK_PARENT_HW_MCK1, .id = 82, }, + { .n = "sha_clk", .p = PCK_PARENT_HW_MCK1, .id = 83, }, + { .n = "spdifrx_clk", .p = PCK_PARENT_HW_MCK1, .id = 84, .r = { .max = 200000000, }, }, + { .n = "spdiftx_clk", .p = PCK_PARENT_HW_MCK1, .id = 85, .r = { .max = 200000000, }, }, + { .n = "ssc0_clk", .p = PCK_PARENT_HW_MCK1, .id = 86, .r = { .max = 200000000, }, }, + { .n = "ssc1_clk", .p = PCK_PARENT_HW_MCK1, .id = 87, .r = { .max = 200000000, }, }, + { .n = "tcb0_ch0_clk", .p = PCK_PARENT_HW_MCK1, .id = 88, .r = { .max = 200000000, }, }, + { .n = "tcb0_ch1_clk", .p = PCK_PARENT_HW_MCK1, .id = 89, .r = { .max = 200000000, }, }, + { .n = "tcb0_ch2_clk", .p = PCK_PARENT_HW_MCK1, .id = 90, .r = { .max = 200000000, }, }, + { .n = "tcb1_ch0_clk", .p = PCK_PARENT_HW_MCK1, .id = 91, .r = { .max = 200000000, }, }, + { .n = "tcb1_ch1_clk", .p = PCK_PARENT_HW_MCK1, .id = 92, .r = { .max = 200000000, }, }, + { .n = "tcb1_ch2_clk", .p = PCK_PARENT_HW_MCK1, .id = 93, .r = { .max = 200000000, }, }, + { .n = "tcpca_clk", .p = PCK_PARENT_HW_MCK1, .id = 94, }, + { .n = "tcpcb_clk", .p = PCK_PARENT_HW_MCK1, .id = 95, }, + { .n = "tdes_clk", .p = PCK_PARENT_HW_MCK1, .id = 96, }, + { .n = "trng_clk", .p = PCK_PARENT_HW_MCK1, .id = 97, }, + { .n = "udphsa_clk", .p = PCK_PARENT_HW_MCK1, .id = 104, }, + { .n = "udphsb_clk", .p = PCK_PARENT_HW_MCK1, .id = 105, }, + { .n = "uhphs_clk", .p = PCK_PARENT_HW_MCK1, .id = 106, }, }; /* * Generic clock description * @n: clock name - * @pp: PLL parents + * @pp: PLL parents (entry formed by PLL components identifiers + * (see enum pll_component_id)) * @pp_mux_table: PLL parents mux table * @r: clock output range * @pp_chg_id: id in parent array of changeable PLL parent @@ -473,7 +556,10 @@ static const struct { */ static const struct { const char *n; - const char *pp[8]; + struct { + int pll_id; + int pll_compid; + } pp[8]; const char pp_mux_table[8]; struct clk_range r; int pp_chg_id; @@ -483,7 +569,8 @@ static const struct { { .n = "adc_gclk", .id = 26, .r = { .max = 100000000, }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 7, 9, }, .pp_count = 3, .pp_chg_id = INT_MIN, }, @@ -491,7 +578,7 @@ static const struct { { .n = "asrc_gclk", .id = 30, .r = { .max = 200000000 }, - .pp = { "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 9, }, .pp_count = 1, .pp_chg_id = 3, }, @@ -499,7 +586,7 @@ static const struct { { .n = "csi_gclk", .id = 33, .r = { .max = 27000000 }, - .pp = { "ddrpll_divpmcck", "imgpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(DDR, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), }, .pp_mux_table = { 6, 7, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -507,7 +594,7 @@ static const struct { { .n = "flex0_gclk", .id = 38, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -515,7 +602,7 @@ static const struct { { .n = "flex1_gclk", .id = 39, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -523,7 +610,7 @@ static const struct { { .n = "flex2_gclk", .id = 40, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -531,7 +618,7 @@ static const struct { { .n = "flex3_gclk", .id = 41, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -539,7 +626,7 @@ static const struct { { .n = "flex4_gclk", .id = 42, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -547,7 +634,7 @@ static const struct { { .n = "flex5_gclk", .id = 43, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -555,7 +642,7 @@ static const struct { { .n = "flex6_gclk", .id = 44, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -563,7 +650,7 @@ static const struct { { .n = "flex7_gclk", .id = 45, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -571,7 +658,7 @@ static const struct { { .n = "flex8_gclk", .id = 46, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -579,7 +666,7 @@ static const struct { { .n = "flex9_gclk", .id = 47, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -587,7 +674,7 @@ static const struct { { .n = "flex10_gclk", .id = 48, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -595,7 +682,7 @@ static const struct { { .n = "flex11_gclk", .id = 49, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -603,7 +690,7 @@ static const struct { { .n = "gmac0_gclk", .id = 51, .r = { .max = 125000000 }, - .pp = { "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 10, }, .pp_count = 1, .pp_chg_id = 3, }, @@ -611,7 +698,7 @@ static const struct { { .n = "gmac1_gclk", .id = 52, .r = { .max = 50000000 }, - .pp = { "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 10, }, .pp_count = 1, .pp_chg_id = INT_MIN, }, @@ -619,7 +706,7 @@ static const struct { { .n = "gmac0_tsu_gclk", .id = 53, .r = { .max = 300000000 }, - .pp = { "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 9, 10, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -627,7 +714,7 @@ static const struct { { .n = "gmac1_tsu_gclk", .id = 54, .r = { .max = 300000000 }, - .pp = { "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 9, 10, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -635,7 +722,7 @@ static const struct { { .n = "i2smcc0_gclk", .id = 57, .r = { .max = 100000000 }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -643,7 +730,7 @@ static const struct { { .n = "i2smcc1_gclk", .id = 58, .r = { .max = 100000000 }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -651,7 +738,7 @@ static const struct { { .n = "mcan0_gclk", .id = 61, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -659,7 +746,7 @@ static const struct { { .n = "mcan1_gclk", .id = 62, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -667,7 +754,7 @@ static const struct { { .n = "mcan2_gclk", .id = 63, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -675,7 +762,7 @@ static const struct { { .n = "mcan3_gclk", .id = 64, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -683,7 +770,7 @@ static const struct { { .n = "mcan4_gclk", .id = 65, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -691,7 +778,7 @@ static const struct { { .n = "mcan5_gclk", .id = 66, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -699,7 +786,7 @@ static const struct { { .n = "pdmc0_gclk", .id = 68, .r = { .max = 50000000 }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -707,7 +794,7 @@ static const struct { { .n = "pdmc1_gclk", .id = 69, .r = { .max = 50000000, }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -715,8 +802,9 @@ static const struct { { .n = "pit64b0_gclk", .id = 70, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -724,8 +812,9 @@ static const struct { { .n = "pit64b1_gclk", .id = 71, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -733,8 +822,9 @@ static const struct { { .n = "pit64b2_gclk", .id = 72, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -742,8 +832,9 @@ static const struct { { .n = "pit64b3_gclk", .id = 73, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -751,8 +842,9 @@ static const struct { { .n = "pit64b4_gclk", .id = 74, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -760,8 +852,9 @@ static const struct { { .n = "pit64b5_gclk", .id = 75, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -769,7 +862,7 @@ static const struct { { .n = "qspi0_gclk", .id = 78, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -777,7 +870,7 @@ static const struct { { .n = "qspi1_gclk", .id = 79, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, @@ -785,7 +878,7 @@ static const struct { { .n = "sdmmc0_gclk", .id = 80, .r = { .max = 208000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -793,7 +886,7 @@ static const struct { { .n = "sdmmc1_gclk", .id = 81, .r = { .max = 208000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -801,7 +894,7 @@ static const struct { { .n = "sdmmc2_gclk", .id = 82, .r = { .max = 208000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), }, .pp_mux_table = { 5, 8, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -809,7 +902,7 @@ static const struct { { .n = "spdifrx_gclk", .id = 84, .r = { .max = 150000000 }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -817,7 +910,7 @@ static const struct { { .n = "spdiftx_gclk", .id = 85, .r = { .max = 25000000 }, - .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), }, .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = 4, }, @@ -825,8 +918,9 @@ static const struct { { .n = "tcb0_ch0_gclk", .id = 88, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -834,8 +928,9 @@ static const struct { { .n = "tcb1_ch0_gclk", .id = 91, .r = { .max = 200000000 }, - .pp = { "syspll_divpmcck", "imgpll_divpmcck", "baudpll_divpmcck", - "audiopll_divpmcck", "ethpll_divpmcck", }, + .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0), + PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), + PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), }, .pp_mux_table = { 5, 7, 8, 9, 10, }, .pp_count = 5, .pp_chg_id = INT_MIN, }, @@ -884,34 +979,25 @@ static const struct clk_pcr_layout sama7g5_pcr_layout = { static void __init sama7g5_pmc_setup(struct device_node *np) { - const char *td_slck_name, *md_slck_name, *mainxtal_name; + const char *main_xtal_name = "main_xtal"; struct pmc_data *sama7g5_pmc; - const char *parent_names[10]; void **alloc_mem = NULL; int alloc_mem_size = 0; struct regmap *regmap; - struct clk_hw *hw; + struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw; + struct clk_hw *td_slck_hw, *md_slck_hw; + static struct clk_parent_data parent_data; + struct clk_hw *parent_hws[10]; bool bypass; int i, j; - i = of_property_match_string(np, "clock-names", "td_slck"); - if (i < 0) - return; - - td_slck_name = of_clk_get_parent_name(np, i); - - i = of_property_match_string(np, "clock-names", "md_slck"); - if (i < 0) - return; - - md_slck_name = of_clk_get_parent_name(np, i); + td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck")); + md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck")); + main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name)); - i = of_property_match_string(np, "clock-names", "main_xtal"); - if (i < 0) + if (!td_slck_hw || !md_slck_hw || !main_xtal_hw) return; - mainxtal_name = of_clk_get_parent_name(np, i); - regmap = device_node_to_regmap(np); if (IS_ERR(regmap)) return; @@ -929,21 +1015,23 @@ static void __init sama7g5_pmc_setup(struct device_node *np) if (!alloc_mem) goto err_free; - hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000, - 50000000); - if (IS_ERR(hw)) + main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000, + 50000000); + if (IS_ERR(main_rc_hw)) goto err_free; bypass = of_property_read_bool(np, "atmel,osc-bypass"); - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, - bypass); - if (IS_ERR(hw)) + parent_data.name = main_xtal_name; + parent_data.fw_name = main_xtal_name; + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL, + &parent_data, bypass); + if (IS_ERR(main_osc_hw)) goto err_free; - parent_names[0] = "main_rc_osc"; - parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); + parent_hws[0] = main_rc_hw; + parent_hws[1] = main_osc_hw; + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2); if (IS_ERR(hw)) goto err_free; @@ -958,15 +1046,22 @@ static void __init sama7g5_pmc_setup(struct device_node *np) switch (sama7g5_plls[i][j].t) { case PLL_TYPE_FRAC: - if (!strcmp(sama7g5_plls[i][j].p, "mainck")) + switch (sama7g5_plls[i][j].p) { + case SAMA7G5_PLL_PARENT_MAINCK: parent_hw = sama7g5_pmc->chws[PMC_MAIN]; - else - parent_hw = __clk_get_hw(of_clk_get_by_name(np, - sama7g5_plls[i][j].p)); + break; + case SAMA7G5_PLL_PARENT_MAIN_XTAL: + parent_hw = main_xtal_hw; + break; + default: + /* Should not happen. */ + parent_hw = NULL; + break; + } hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, sama7g5_plls[i][j].n, - sama7g5_plls[i][j].p, parent_hw, i, + NULL, parent_hw, i, sama7g5_plls[i][j].c, sama7g5_plls[i][j].l, sama7g5_plls[i][j].f); @@ -975,7 +1070,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) case PLL_TYPE_DIV: hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, sama7g5_plls[i][j].n, - sama7g5_plls[i][j].p, NULL, i, + NULL, sama7g5_plls[i][0].hw, i, sama7g5_plls[i][j].c, sama7g5_plls[i][j].l, sama7g5_plls[i][j].f, @@ -989,25 +1084,27 @@ static void __init sama7g5_pmc_setup(struct device_node *np) if (IS_ERR(hw)) goto err_free; + sama7g5_plls[i][j].hw = hw; if (sama7g5_plls[i][j].eid) sama7g5_pmc->chws[sama7g5_plls[i][j].eid] = hw; } } - parent_names[0] = "cpupll_divpmcck"; - hw = at91_clk_register_master_div(regmap, "mck0", "cpupll_divpmcck", NULL, + hw = at91_clk_register_master_div(regmap, "mck0", NULL, + sama7g5_plls[PLL_ID_CPU][1].hw, &mck0_layout, &mck0_characteristics, &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5); if (IS_ERR(hw)) goto err_free; - sama7g5_pmc->chws[PMC_MCK] = hw; + sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw; - parent_names[0] = md_slck_name; - parent_names[1] = td_slck_name; - parent_names[2] = "mainck"; - for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) { + parent_hws[0] = md_slck_hw; + parent_hws[1] = td_slck_hw; + parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN]; + for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) { u8 num_parents = 3 + sama7g5_mckx[i].ep_count; + struct clk_hw *tmp_parent_hws[8]; u32 *mux_table; mux_table = kmalloc_array(num_parents, sizeof(*mux_table), @@ -1018,11 +1115,17 @@ static void __init sama7g5_pmc_setup(struct device_node *np) SAMA7G5_INIT_TABLE(mux_table, 3); SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_mckx[i].ep_mux_table, sama7g5_mckx[i].ep_count); - SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_mckx[i].ep, + for (j = 0; j < sama7g5_mckx[i].ep_count; j++) { + u8 pll_id = sama7g5_mckx[i].ep[j].pll_id; + u8 pll_compid = sama7g5_mckx[i].ep[j].pll_compid; + + tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw; + } + SAMA7G5_FILL_TABLE(&parent_hws[3], tmp_parent_hws, sama7g5_mckx[i].ep_count); hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n, - num_parents, parent_names, NULL, mux_table, + num_parents, NULL, parent_hws, mux_table, &pmc_mckX_lock, sama7g5_mckx[i].id, sama7g5_mckx[i].c, sama7g5_mckx[i].ep_chg_id); @@ -1031,32 +1134,33 @@ static void __init sama7g5_pmc_setup(struct device_node *np) alloc_mem[alloc_mem_size++] = mux_table; + sama7g5_mckx[i].hw = hw; if (sama7g5_mckx[i].eid) sama7g5_pmc->chws[sama7g5_mckx[i].eid] = hw; } - hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", "main_xtal", NULL); + hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", NULL, main_xtal_hw); if (IS_ERR(hw)) goto err_free; sama7g5_pmc->chws[PMC_UTMI] = hw; - parent_names[0] = md_slck_name; - parent_names[1] = td_slck_name; - parent_names[2] = "mainck"; - parent_names[3] = "syspll_divpmcck"; - parent_names[4] = "ddrpll_divpmcck"; - parent_names[5] = "imgpll_divpmcck"; - parent_names[6] = "baudpll_divpmcck"; - parent_names[7] = "audiopll_divpmcck"; - parent_names[8] = "ethpll_divpmcck"; + parent_hws[0] = md_slck_hw; + parent_hws[1] = td_slck_hw; + parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN]; + parent_hws[3] = sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw; + parent_hws[4] = sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw; + parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw; + parent_hws[6] = sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw; + parent_hws[7] = sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw; + parent_hws[8] = sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw; for (i = 0; i < 8; i++) { char name[6]; snprintf(name, sizeof(name), "prog%d", i); - hw = at91_clk_register_programmable(regmap, name, parent_names, - NULL, 9, i, + hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws, + 9, i, &programmable_layout, sama7g5_prog_mux_table); if (IS_ERR(hw)) @@ -1067,7 +1171,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sama7g5_systemck); i++) { hw = at91_clk_register_system(regmap, sama7g5_systemck[i].n, - sama7g5_systemck[i].p, NULL, + NULL, sama7g5_pmc->pchws[i], sama7g5_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; @@ -1079,7 +1183,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sama7g5_pcr_layout, sama7g5_periphck[i].n, - sama7g5_periphck[i].p, NULL, + NULL, + sama7g5_mckx[sama7g5_periphck[i].p].hw, sama7g5_periphck[i].id, &sama7g5_periphck[i].r, sama7g5_periphck[i].chgp ? 0 : @@ -1090,11 +1195,12 @@ static void __init sama7g5_pmc_setup(struct device_node *np) sama7g5_pmc->phws[sama7g5_periphck[i].id] = hw; } - parent_names[0] = md_slck_name; - parent_names[1] = td_slck_name; - parent_names[2] = "mainck"; + parent_hws[0] = md_slck_hw; + parent_hws[1] = td_slck_hw; + parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN]; for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) { u8 num_parents = 3 + sama7g5_gck[i].pp_count; + struct clk_hw *tmp_parent_hws[8]; u32 *mux_table; mux_table = kmalloc_array(num_parents, sizeof(*mux_table), @@ -1105,13 +1211,19 @@ static void __init sama7g5_pmc_setup(struct device_node *np) SAMA7G5_INIT_TABLE(mux_table, 3); SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_gck[i].pp_mux_table, sama7g5_gck[i].pp_count); - SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_gck[i].pp, + for (j = 0; j < sama7g5_gck[i].pp_count; j++) { + u8 pll_id = sama7g5_gck[i].pp[j].pll_id; + u8 pll_compid = sama7g5_gck[i].pp[j].pll_compid; + + tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw; + } + SAMA7G5_FILL_TABLE(&parent_hws[3], tmp_parent_hws, sama7g5_gck[i].pp_count); hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &sama7g5_pcr_layout, - sama7g5_gck[i].n, - parent_names, NULL, mux_table, + sama7g5_gck[i].n, NULL, + parent_hws, mux_table, num_parents, sama7g5_gck[i].id, &sama7g5_gck[i].r, From patchwork Thu Jun 15 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with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 15 Jun 2023 02:34:37 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 15 Jun 2023 02:34:33 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , Claudiu Beznea Subject: [PATCH 11/11] clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id Date: Thu, 15 Jun 2023 12:32:27 +0300 Message-ID: <20230615093227.576102-12-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230615093227.576102-1-claudiu.beznea@microchip.com> References: <20230615093227.576102-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org s/ep_chg_chg_id/ep_chg_id in documentation of master clock structure. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard --- drivers/clk/at91/sama7g5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 7e06ea22c8af..91b5c6f14819 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -354,10 +354,10 @@ static struct sama7g5_pll { /* * Master clock (MCK[1..4]) description * @n: clock name - * @ep_chg_chg_id: index in parents array that specifies the changeable * @ep: extra parents names array (entry formed by PLL components * identifiers (see enum pll_component_id)) * @hw: pointer to clk_hw + * @ep_chg_id: index in parents array that specifies the changeable * parent * @ep_count: extra parents count * @ep_mux_table: mux table for extra parents