From patchwork Thu Jun 15 11:55:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13281108 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D081EB64DB for ; Thu, 15 Jun 2023 12:02:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344678AbjFOMCE (ORCPT ); Thu, 15 Jun 2023 08:02:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344675AbjFOMBr (ORCPT ); Thu, 15 Jun 2023 08:01:47 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 082F53C10; Thu, 15 Jun 2023 04:56:50 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 35FBufmJ086492; Thu, 15 Jun 2023 06:56:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1686830201; bh=W9iiHwjdGP5imfSBo37bnm2qDQ491c1YdJEXZJipicM=; h=From:Date:Subject:References:In-Reply-To:To:CC; b=GW+k0fMhYHeJ6q9PPU5rGDxIZDhEuUWzzl0DPBDBW1VE8ILiVbX1GY4OQilntjACU 0U03oULZapFtRnkEH6B7SrO+sgdCLhEVG/NUyYfnQSCmO+2kg0KN1Lrh5PX6pkjeFU qEs8l+/Z3IQD5pPmLKwzg8+kXvqCZMvP+oiaEa3A= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 35FBufKm130043 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Jun 2023 06:56:41 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Jun 2023 06:56:41 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Jun 2023 06:56:41 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 35FBueiY002003; Thu, 15 Jun 2023 06:56:41 -0500 From: Jai Luthra Date: Thu, 15 Jun 2023 17:25:35 +0530 Subject: [PATCH v3 1/2] dt-bindings: clock: Add binding documentation for TI Audio REFCLK MIME-Version: 1.0 Message-ID: <20230515-refclk-v3-1-37c0b550f406@ti.com> References: <20230515-refclk-v3-0-37c0b550f406@ti.com> In-Reply-To: <20230515-refclk-v3-0-37c0b550f406@ti.com> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Santosh Shilimkar CC: Vignesh Raghavendra , Andrew Davis , , , , Jai Luthra , Conor Dooley X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1529; i=j-luthra@ti.com; h=from:subject:message-id; bh=sQ9ec5YFJ+Y8ENQetUcqU9qt54E7RHL6FfG8IWKEvjo=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBkivx390StvIVTDs3XMMkmqkRhBKVHtbAo/YEYt r7sfHiEX6WJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZIr8dwAKCRBD3pH5JJpx RQRLD/wPZVGXumEedqmhqZDtKFsGoATCbKaMebE+idnLSYKetn8ZAwL0LKabhowjDC5+m4/nvTh sGurUHrhyZdE6S5dVJAe6XbzkAsR0llWpTisyJBOCBx/++Jxa7NtRYINu1os0OvCjHywwcrv6LH DEfJcSWb3i+XmO3+NmcuyTjyrMPcbWex257sP56qFifasjxcsk6uVgit27kOggnIfaOxOPH+5Jf VAbUD6TRy58AN4EvqJMTI39fP0B78lvyooAwmiyllB9BAsw87xtVv56ZGwGkHvjoj6vnCSoRn9o R9X829qDuxCQ4sCasvPtw7V2BO2/gobbMZMoDADPt7+suunneVMl6yPSRwPPf1CSC/nD6JY4slW FCGqRAxh6/DwfJ1CqLlXLxz1hTuSFaJ5RXFHjfyeUjlVjKvAWSxju4cJrOkICooMLDR/L4uuB9R 5i14dK+VUrulWnaJMnUrAjmWiuyxJcY0wDlqdNyIidxnIKno1lc9QgBQK11cCNWsBFfaj/KLyka tkoJlAeDW8IY2fVpifOeTx8HTrkO3gwbFruyaXqSI37kskgnj8YBarzFVYABRoD//zqTkKyNO+1 REVPfT8+woc8CTNQjss0Lj/O9208hAQEN2ioWwE4HXO7DPiZHMaOEza/ZB5vnexXXlqyI0FXAHn yxSlY/7IuTwk+iw== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add DT bindings for TI's audio reference clocks (REFCLK) present on AM62 SoC. Reviewed-by: Conor Dooley Signed-off-by: Jai Luthra --- .../bindings/clock/ti,am62-audio-refclk.yaml | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml b/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml new file mode 100644 index 000000000000..b2e40bd39a3a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti,am62-audio-refclk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Audio Reference Clock + +maintainers: + - Jai Luthra + +properties: + compatible: + items: + - const: ti,am62-audio-refclk + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + +additionalProperties: false + +examples: + - | + audio_refclk0: clock@82e0 { + compatible = "ti,am62-audio-refclk"; + reg = <0x82e0 0x4>; + clocks = <&k3_clks 157 0>; + assigned-clocks = <&k3_clks 157 0>; + assigned-clock-parents = <&k3_clks 157 8>; + #clock-cells = <0>; + }; From patchwork Thu Jun 15 11:55:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13281109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E19A2EB64DC for ; Thu, 15 Jun 2023 12:02:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344693AbjFOMCE (ORCPT ); Thu, 15 Jun 2023 08:02:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344684AbjFOMBr (ORCPT ); Thu, 15 Jun 2023 08:01:47 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D155330EA; 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Thu, 15 Jun 2023 06:56:42 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 35FBugTh002023; Thu, 15 Jun 2023 06:56:42 -0500 From: Jai Luthra Date: Thu, 15 Jun 2023 17:25:36 +0530 Subject: [PATCH v3 2/2] clk: keystone: syscon-clk: Add support for audio refclk MIME-Version: 1.0 Message-ID: <20230515-refclk-v3-2-37c0b550f406@ti.com> References: <20230515-refclk-v3-0-37c0b550f406@ti.com> In-Reply-To: <20230515-refclk-v3-0-37c0b550f406@ti.com> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Santosh Shilimkar CC: Vignesh Raghavendra , Andrew Davis , , , , Jai Luthra X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4511; i=j-luthra@ti.com; h=from:subject:message-id; bh=aXX5Y52h5kNHxME7gJtDWJYnpKWKJmaU80P5vBuWNYo=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBkivx4WhsqIOJTkWUzYotuipsajHTOEF3z7JgKK HRCuctNnUOJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZIr8eAAKCRBD3pH5JJpx RbXSD/0WSikZXm55sBRaxLwJraqF1Rzo2i5uBodRi1AAXrlahgenCmskTF0ItYJgHxE9dUwSoN2 SLVIWgXwgYrGFY+YLhRCsYRAcKCT/5GfO9QavLKMmHUhNIAq3+LxF/pLj88bbex4Tvd7/qwQQw1 8tke3LplyXnRfYkwFMTb072TGM8XZEwKlmQeI9anwH+ZGaT9gnAaLttoBjm2EHJJcIBDkBTSy2G 2nodUBWx/R/s6XySSHH1sX8r72tZgr6GLXyzBVLStLBu7sXW5RyuRrMP41nJvrmiN8p/5mxvfCb RjAOAjInxP68fJoex5OX7YY5ZujOLaizsBgDCVsbkRQhoOwRAI0vUUcJn0uvwC3yUrIIuHiz51G 0dYRMz7QqLov3c6sw00ePJgvWiVdEtd6c5w9aAnQc4aGdcZFVZo8AxDhPR8MBElMXoir9YwwnAQ /ea/lazKeZFm60MhXE7k91Tq51P5jsrm7rmRK+ldWfL7WQ6Pv+Fa0aA3dF0lQGgQHyNjXUrR01O jfFzSvf9rhaiC9W8UoDPpKjcKsgiDiTTotzAZkKYvR+CHCgWX8WIjL3ZGg4toUXBnIVQT1otsoS Hx3a5C+MukBtYkTysU+QrA/CDb5TNiNCRQNGd39EmZ1997c4n73kZTRA76iXVanCSjKXuWXiXvh xPzA6ORChbthXFQ== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org TI's AM62 SoC can optionally provide two audio reference clocks (AUDIO_REFCLKx) to external peripherals. By default this reference clock is looped-back inside the SoC to a mux that goes to McASP AHCLK, but can optionally be enabled as an output to peripherals outside the SoC by setting a bit through CTRL_MMR registers. This bit only controls the direction of the clock, while the parent is a muxed input from sci-clk [1] which may be a configurable PLL or a master clock from one of the McASP instances. Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62x/clocks.html#clocks-for-board0-device [1] Signed-off-by: Jai Luthra --- drivers/clk/keystone/syscon-clk.c | 45 ++++++++++++++++++++++++++++++++++----- 1 file changed, 40 insertions(+), 5 deletions(-) diff --git a/drivers/clk/keystone/syscon-clk.c b/drivers/clk/keystone/syscon-clk.c index bd5cec0bd12d..d33f74119488 100644 --- a/drivers/clk/keystone/syscon-clk.c +++ b/drivers/clk/keystone/syscon-clk.c @@ -4,10 +4,12 @@ */ #include +#include #include #include #include #include +#include struct ti_syscon_gate_clk_priv { struct clk_hw hw; @@ -61,21 +63,31 @@ static const struct clk_ops ti_syscon_gate_clk_ops = { static struct clk_hw *ti_syscon_gate_clk_register(struct device *dev, struct regmap *regmap, + const char *parent_name, const struct ti_syscon_gate_clk_data *data) { struct ti_syscon_gate_clk_priv *priv; struct clk_init_data init; + char *name = NULL; int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return ERR_PTR(-ENOMEM); - init.name = data->name; init.ops = &ti_syscon_gate_clk_ops; - init.parent_names = NULL; - init.num_parents = 0; - init.flags = 0; + if (parent_name) { + name = kasprintf(GFP_KERNEL, "%s:%s", data->name, parent_name); + init.name = name; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = CLK_SET_RATE_PARENT; + } else { + init.name = data->name; + init.parent_names = NULL; + init.num_parents = 0; + init.flags = 0; + } priv->regmap = regmap; priv->reg = data->offset; @@ -83,6 +95,10 @@ static struct clk_hw priv->hw.init = &init; ret = devm_clk_hw_register(dev, &priv->hw); + + if (name) + kfree(init.name); + if (ret) return ERR_PTR(ret); @@ -94,8 +110,9 @@ static int ti_syscon_gate_clk_probe(struct platform_device *pdev) const struct ti_syscon_gate_clk_data *data, *p; struct clk_hw_onecell_data *hw_data; struct device *dev = &pdev->dev; + int num_clks, num_parents, i; + const char *parent_name; struct regmap *regmap; - int num_clks, i; data = device_get_match_data(dev); if (!data) @@ -110,6 +127,13 @@ static int ti_syscon_gate_clk_probe(struct platform_device *pdev) for (p = data; p->name; p++) num_clks++; + num_parents = of_clk_get_parent_count(dev->of_node); + if (of_device_is_compatible(dev->of_node, "ti,am62-audio-refclk") && + num_parents == 0) { + return dev_err_probe(dev, -EINVAL, + "must specify a parent clock\n"); + } + hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, num_clks), GFP_KERNEL); if (!hw_data) @@ -117,8 +141,10 @@ static int ti_syscon_gate_clk_probe(struct platform_device *pdev) hw_data->num = num_clks; + parent_name = of_clk_get_parent_name(dev->of_node, 0); for (i = 0; i < num_clks; i++) { hw_data->hws[i] = ti_syscon_gate_clk_register(dev, regmap, + parent_name, &data[i]); if (IS_ERR(hw_data->hws[i])) dev_warn(dev, "failed to register %s\n", @@ -166,6 +192,11 @@ static const struct ti_syscon_gate_clk_data am62_clk_data[] = { { /* Sentinel */ }, }; +static const struct ti_syscon_gate_clk_data am62_audio_clk_data[] = { + TI_SYSCON_CLK_GATE("audio_refclk", 0x0, 15), + { /* Sentinel */ }, +}; + static const struct of_device_id ti_syscon_gate_clk_ids[] = { { .compatible = "ti,am654-ehrpwm-tbclk", @@ -179,6 +210,10 @@ static const struct of_device_id ti_syscon_gate_clk_ids[] = { .compatible = "ti,am62-epwm-tbclk", .data = &am62_clk_data, }, + { + .compatible = "ti,am62-audio-refclk", + .data = &am62_audio_clk_data, + }, { } }; MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);