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Tue, 5 Feb 2019 00:17:39 +0000 From: Trent Piepho To: "linux-pci@vger.kernel.org" Subject: [PATCH v2 1/3] dt-bindings: imx6q-pcie: Add description of imx7d pcie phy Thread-Topic: [PATCH v2 1/3] dt-bindings: imx6q-pcie: Add description of imx7d pcie phy Thread-Index: AQHUvOg0yfKeVdvB5EO36YCp85y+3Q== Date: Tue, 5 Feb 2019 00:17:39 +0000 Message-ID: <20190205001721.18639-2-tpiepho@impinj.com> References: <20190205001721.18639-1-tpiepho@impinj.com> In-Reply-To: <20190205001721.18639-1-tpiepho@impinj.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR07CA0078.namprd07.prod.outlook.com (2603:10b6:a03:12b::19) To MWHPR0601MB3708.namprd06.prod.outlook.com (2603:10b6:301:7c::38) authentication-results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.14.4 x-originating-ip: [216.207.205.253] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Richard Zhu , Lucas Stach , Shawn Guo , "linux-arm-kernel@lists.infradead.org" , Trent Piepho Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP There is a separate PHY device with its own registers on imx7d. It's currently unused, but a PCIe erratum on imx7d will require it for the workaround. Signed-off-by: Trent Piepho Acked-by: Lucas Stach --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index d514c1f2365f..f4933c8951bc 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -53,6 +53,7 @@ Additional required properties for imx7d-pcie: - "pciephy" - "apps" - "turnoff" +- fsl,imx7d-pcie-phy: A phandle to an fsl,imx7d-pcie-phy node. Example: @@ -79,3 +80,13 @@ Example: clocks = <&clks 144>, <&clks 206>, <&clks 189>; clock-names = "pcie", "pcie_bus", "pcie_phy"; }; + +* Freescale i.MX7d PCIe PHY + +This is the PHY associated with the IMX7d PCIe controller. It's used by the +PCI-e controller via the fsl,imx7d-pcie-phy phandle. + +Required properties: +- compatible: + - "fsl,imx7d-pcie-phy" +- reg: base address and length of the PCIe PHY controller From patchwork Tue Feb 5 00:17:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trent Piepho X-Patchwork-Id: 10796781 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4813A13A4 for ; Tue, 5 Feb 2019 00:21:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 377052BE1B for ; Tue, 5 Feb 2019 00:21:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B43F2BF06; Tue, 5 Feb 2019 00:21:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BBE1E2BED9 for ; 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Tue, 5 Feb 2019 00:17:40 +0000 From: Trent Piepho To: "linux-pci@vger.kernel.org" Subject: [PATCH v2 2/3] ARM: dts: imx7d: Add node for PCIe PHY Thread-Topic: [PATCH v2 2/3] ARM: dts: imx7d: Add node for PCIe PHY Thread-Index: AQHUvOg03kf45m4W4U2GQOHN/EPVEg== Date: Tue, 5 Feb 2019 00:17:40 +0000 Message-ID: <20190205001721.18639-3-tpiepho@impinj.com> References: <20190205001721.18639-1-tpiepho@impinj.com> In-Reply-To: <20190205001721.18639-1-tpiepho@impinj.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR07CA0078.namprd07.prod.outlook.com (2603:10b6:a03:12b::19) To MWHPR0601MB3708.namprd06.prod.outlook.com (2603:10b6:301:7c::38) authentication-results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.14.4 x-originating-ip: [216.207.205.253] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; MWHPR0601MB3722; 6:QNaE1YBXNNqbDXK13oQdpV/6FiuDRa+e48Cif0Yca/YAYzbOp6BrHZtXMkFR3h6otQpvdBCk7kImYfbfE1/ZOgr7aOnwIFilIW46aeM+haIwbg7jYHAjxRvegGXJmcBLoCJXNtUV+geSqDdGprbMqUk4/R4ALto8HmDDVYiDzR1b46ZMrgtVzbrh1/wqBVbgYxwkoD5Szq6PTiFPe2rOPtkpwyMO4DEvWi2YoVmwWbdo1KPRhoCuqiE0tt14LOLba7k92frw1xdD5yxJed8NQ8OHVeyUj/fLWhrsKvaDXrOtYmYsHNgc2vB7ICL8KAnbN60W3jyGEVqOiMU7pVNOoAfHTG2o9o5fY6UBvvmgmr2cnf00uwkhS+x7MU+8io0uZ8WAL6Iban28aYBt5aHHcUGSTmw976YwjIzzi6z7QOoxQ7Qfl5hqVVjfMkjXgKwS9H1vPGCmilT0XjFnalstlw==; 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DIR:OUT; SFP:1102; SCL:1; SRVR:MWHPR0601MB3722; H:MWHPR0601MB3708.namprd06.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: impinj.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: SodH62utwgCDpxaQrduy3Suu3e49AUGzkW9/p4vg1ki2b7yynrndTg0Vm6GR2uCrvsFRvbAwLZl8lV/x4LYrgiqUfQDUVlnFPFuVJj6DEgQ8cOjBrLVUszRT0RaaaCCff7KBV2f8VxrrIM5d0VvZyh8Nyk+2ZMuvZifjbtq4t+pwwEvSnDerlqBZdVnBfMFasylsmB5vniEziVRaGqjbiOiqbPCP+3pjrrR9N2QV7/XuP/w9M2h/G7gzATUQDVE/JAtiXgqWJRCJURRijcBl5kCuiLGVweCBIjPSPVmhyh0aQO3WTy4IA35haFmhlXQ3exNr1WulJiH6bMwauU9C2JTZItjvg4YoucwmwMrWuDa9fgsho7nhPswVe9FB1LJ7Ff+3fL0Hd7AVD0MSiH7zO0XqBtNgBrIi3UAWAKn103Q= MIME-Version: 1.0 X-OriginatorOrg: impinj.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5381809b-f1fa-4555-d7a1-08d68aff56f7 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Feb 2019 00:17:39.5857 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 6de70f0f-7357-4529-a415-d8cbb7e93e5e X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR0601MB3722 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190204_161746_190931_41F14CF7 X-CRM114-Status: GOOD ( 10.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Richard Zhu , Lucas Stach , Shawn Guo , "linux-arm-kernel@lists.infradead.org" , Trent Piepho Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the PHY as a new node. The PCI-e controller node gains a phandle property that points to it. There isn't yet any code in the kernel that uses this device's registers, but it will be added for a PCIe PLL erratum workaround. Signed-off-by: Trent Piepho --- arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 6b298e388f4b..6eb98e7c568d 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -96,6 +96,14 @@ }; }; +&aips2 { + pcie_phy: pcie-phy@306d0000 { + compatible = "fsl,imx7d-pcie-phy"; + reg = <0x306d0000 0x10000>; + status = "disabled"; + }; +}; + &aips3 { usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; @@ -173,6 +181,7 @@ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>, <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>; reset-names = "pciephy", "apps", "turnoff"; + fsl,imx7d-pcie-phy = <&pcie_phy>; status = "disabled"; }; }; From patchwork Tue Feb 5 00:17:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trent Piepho X-Patchwork-Id: 10796771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0DE313B4 for ; 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bh=Q7RiZACcNA+wyuttLTr7HU4ezOYEzdjsUyq1kCjCgzc=; b=cbdGrco8gY55eSnVmEnAVl/6avBj18RkKr7Y2ZMOunZdwYNWVC+WnlRUZwc2DPCylYcJFZUZezsZKFpBDnTpLeiGcRCYnPosCKuy0CT9X4p9e9nftInlZkplKi2J0aAtWfJrGemPbfBCYwdKiYr7q7RKS3lOOFwoAFQjsXmft4o= Received: from MWHPR0601MB3708.namprd06.prod.outlook.com (10.167.236.38) by MWHPR0601MB3722.namprd06.prod.outlook.com (10.167.236.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1580.16; Tue, 5 Feb 2019 00:17:41 +0000 Received: from MWHPR0601MB3708.namprd06.prod.outlook.com ([fe80::ac0c:a03e:77c7:fa85]) by MWHPR0601MB3708.namprd06.prod.outlook.com ([fe80::ac0c:a03e:77c7:fa85%5]) with mapi id 15.20.1580.019; Tue, 5 Feb 2019 00:17:41 +0000 From: Trent Piepho To: "linux-pci@vger.kernel.org" Subject: [PATCH v2 3/3] PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure Thread-Topic: [PATCH v2 3/3] PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure Thread-Index: AQHUvOg1I9SIwv2NIEC65G+x/YIYYw== Date: Tue, 5 Feb 2019 00:17:41 +0000 Message-ID: <20190205001721.18639-4-tpiepho@impinj.com> References: <20190205001721.18639-1-tpiepho@impinj.com> In-Reply-To: <20190205001721.18639-1-tpiepho@impinj.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR07CA0078.namprd07.prod.outlook.com (2603:10b6:a03:12b::19) To MWHPR0601MB3708.namprd06.prod.outlook.com (2603:10b6:301:7c::38) authentication-results: spf=none (sender IP is ) smtp.mailfrom=tpiepho@impinj.com; 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LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: impinj.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: dZs41GfsuRSAtrtSxR7f+qgOVBlVbxSigREn5qHa7ms12i7H+4LCn0lzhEfm6F6g0xpKVyK0+oWgB0GjnVg5Zqj8KFHaVw4yXM9SQSxig+0M1cU6PKYH87heSYbiH5ZO+Q4hpcVCeRsgsxRmO8clJotPeRgoQhCg4OANEM11YP+S6M+VSOoXLw0VM8Wj7OlfgWol/Z7ICR/lahhcAi9IMY1QImM6ZXOkMfHO6WdAop99sLWoOey1UqrPsm1ELXlIFPl/vrjkKuKQSMld1vtdKtcntbWD2Aazmn/beWBa+FNrkIYFuNFSfZcaI8xII4iMK0jBbe+bJvk7i5qkObeoBFKIobIOXUTtfFhEM1xSLgwuagXM6pcfC+zNhSaNfAYJzMubTEGiWF3GeZcrfuFiBdqRXsbY3NSovQeXVt0yocg= MIME-Version: 1.0 X-OriginatorOrg: impinj.com X-MS-Exchange-CrossTenant-Network-Message-Id: 42d04db9-692d-422d-f194-08d68aff578d X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Feb 2019 00:17:40.5774 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 6de70f0f-7357-4529-a415-d8cbb7e93e5e X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR0601MB3722 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190204_161756_484055_0D041498 X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Richard Zhu , Lucas Stach , Shawn Guo , "linux-arm-kernel@lists.infradead.org" , Trent Piepho Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This implements the workound described in the NXP IMX7d erratum e10728. Initial VCO oscillation may fail under corner conditions such as cold temperature. It causes PCIe PLL to fail to lock in the initialization phase, which results in the PCIe link failing to come up. The workaround is to disable Duty-cycle Corrector (DCC) calibration after G_RST. To do this it is necessary to gain access to the undocumented and currently unused PCIe PHY register bank. A new device tree node of type "fsl,imx7d-pcie-phy" is created for the PHY block and the existing PCIe device uses a phandle named "fsl,imx7d-pcie-phy" to point to it. Signed-off-by: Trent Piepho Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 57 +++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 80f843030e36..06dd6aa927d4 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -61,6 +62,7 @@ struct imx6_pcie { u32 tx_swing_low; int link_gen; struct regulator *vpcie; + void __iomem *phy_base; /* power domain for pcie */ struct device *pd_pcie; @@ -117,6 +119,23 @@ struct imx6_pcie { #define PCIE_PHY_RX_ASIC_OUT 0x100D #define PCIE_PHY_RX_ASIC_OUT_VALID (1 << 0) +/* iMX7 PCIe PHY registers */ +#define PCIE_PHY_CMN_REG4 0x14 +/* These are probably the bits that *aren't* DCC_FB_EN */ +#define PCIE_PHY_CMN_REG4_DCC_FB_EN 0x29 + +#define PCIE_PHY_CMN_REG15 0x54 +#define PCIE_PHY_CMN_REG15_DLY_4 BIT(2) +#define PCIE_PHY_CMN_REG15_PLL_PD BIT(5) +#define PCIE_PHY_CMN_REG15_OVRD_PLL_PD BIT(7) + +#define PCIE_PHY_CMN_REG24 0x90 +#define PCIE_PHY_CMN_REG24_RX_EQ BIT(6) +#define PCIE_PHY_CMN_REG24_RX_EQ_SEL BIT(3) + +#define PCIE_PHY_CMN_REG26 0x98 +#define PCIE_PHY_CMN_REG26_ATT_MODE 0xBC + #define PHY_RX_OVRD_IN_LO 0x1005 #define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3) @@ -490,6 +509,26 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) switch (imx6_pcie->variant) { case IMX7D: reset_control_deassert(imx6_pcie->pciephy_reset); + + /* Workaround for ERR010728, failure of PCI-e PLL VCO to + * oscillate, especially when cold. This turns off "Duty-cycle + * Corrector" and other mysterious undocumented things. + */ + if (likely(imx6_pcie->phy_base)) { + /* De-assert DCC_FB_EN */ + writel(PCIE_PHY_CMN_REG4_DCC_FB_EN, + imx6_pcie->phy_base + PCIE_PHY_CMN_REG4); + /* Assert RX_EQS and RX_EQS_SEL */ + writel(PCIE_PHY_CMN_REG24_RX_EQ_SEL + | PCIE_PHY_CMN_REG24_RX_EQ, + imx6_pcie->phy_base + PCIE_PHY_CMN_REG24); + /* Assert ATT_MODE */ + writel(PCIE_PHY_CMN_REG26_ATT_MODE, + imx6_pcie->phy_base + PCIE_PHY_CMN_REG26); + } else { + dev_warn(dev, "DT lacks imx7d-pcie-phy, unable to apply ERR010728 workaround\n"); + } + imx7d_pcie_wait_for_phy_pll_lock(imx6_pcie); break; case IMX6SX: @@ -919,6 +958,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct dw_pcie *pci; struct imx6_pcie *imx6_pcie; + struct device_node *np; struct resource *dbi_base; struct device_node *node = dev->of_node; int ret; @@ -939,6 +979,23 @@ static int imx6_pcie_probe(struct platform_device *pdev) imx6_pcie->variant = (enum imx6_pcie_variants)of_device_get_match_data(dev); + /* Find the PHY if one is defined, only imx7d uses it */ + np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0); + if (np) { + struct resource res; + + ret = of_address_to_resource(np, 0, &res); + if (ret) { + dev_err(dev, "Unable to map PCIe PHY\n"); + return ret; + } + imx6_pcie->phy_base = devm_ioremap_resource(dev, &res); + if (IS_ERR(imx6_pcie->phy_base)) { + dev_err(dev, "Unable to map PCIe PHY\n"); + return PTR_ERR(imx6_pcie->phy_base); + } + } + dbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); pci->dbi_base = devm_ioremap_resource(dev, dbi_base); if (IS_ERR(pci->dbi_base))