From patchwork Thu Jun 15 20:18:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13281714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D41FAEB64DA for ; Thu, 15 Jun 2023 20:19:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E986A10E539; Thu, 15 Jun 2023 20:19:19 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5EE9D10E536 for ; Thu, 15 Jun 2023 20:19:17 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 9ABC086065; Thu, 15 Jun 2023 22:19:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1686860356; bh=kskVxjT2uIMftorJT4/0zbnO7c8FH5ZfOQ578YyVApM=; h=From:To:Cc:Subject:Date:From; b=uVAG6DpdZxZczP/OBnYkbnzSWdpV28Xw4BZH9QYK5aijGkQVV9ERAJAd+cAWp0Epb uGenU0XZFMVJjUNvJQz9DjUe5Ski8X2pr7Bolqjte2QoojHgSm6e0oE2Y6SzXQF+EF XxQ9dNOwj4UAW23SBJg6pQbX9zhg0ExvDFctgT+GXKPGrzD0XCu2NFd2mX6JRFdMbt PnQQv9BsAGq0OxcLvbYv2Ja7i2PBow92Uf7ezwVmV2iwHfMz9u8IY1XtI10goLTdbp owd3l3v2/GYT9vPc3COJpOPsnp20twhh+kPUgwI+gniRzVTOrfKCU08Z8beMGqAny/ swPeoRtnHcAEg== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/5] drm/bridge: tc358762: Split register programming from pre-enable to enable Date: Thu, 15 Jun 2023 22:18:58 +0200 Message-Id: <20230615201902.566182-1-marex@denx.de> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Neil Armstrong , Robert Foss , Andrzej Hajda , Jonas Karlman , Jernej Skrabec , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move the register programming part, which actually enables the bridge and makes it push data out of its DPI side, into the enable callback. The DSI host like DSIM may not be able to transmit commands in pre_enable, moving the register programming into enable assures it can transmit commands. Signed-off-by: Marek Vasut Reviewed-by: Sam Ravnborg --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Neil Armstrong Cc: Robert Foss Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/bridge/tc358762.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 5641395fd310e..df9703eacab1f 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -162,11 +162,17 @@ static void tc358762_pre_enable(struct drm_bridge *bridge) usleep_range(5000, 10000); } + ctx->pre_enabled = true; +} + +static void tc358762_enable(struct drm_bridge *bridge) +{ + struct tc358762 *ctx = bridge_to_tc358762(bridge); + int ret; + ret = tc358762_init(ctx); if (ret < 0) dev_err(ctx->dev, "error initializing bridge (%d)\n", ret); - - ctx->pre_enabled = true; } static int tc358762_attach(struct drm_bridge *bridge, @@ -181,6 +187,7 @@ static int tc358762_attach(struct drm_bridge *bridge, static const struct drm_bridge_funcs tc358762_bridge_funcs = { .post_disable = tc358762_post_disable, .pre_enable = tc358762_pre_enable, + .enable = tc358762_enable, .attach = tc358762_attach, }; From patchwork Thu Jun 15 20:18:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13281716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCEBBEB64DA for ; Thu, 15 Jun 2023 20:19:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21B7910E53A; Thu, 15 Jun 2023 20:19:24 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3504E10E536 for ; Thu, 15 Jun 2023 20:19:18 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 2C1D986128; Thu, 15 Jun 2023 22:19:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1686860356; bh=/csT2Il7fjHxe5mvF9WyO+HeaLXOG9b34dxkOlTjR0s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FUrJeY8JwUWuPwkNjE0mz1Z5vRif3yQR7NRBVWEGFwZfbF0MzisT9hxCadOEE6Qzp oLrA7wpmCdOwdS4C3u3WcYGFBTqvNmVoa3baDApSPLDRnzSDWZawbXlHasKjEbPFvU DjplJWQhWf3yBukyAB2yUkBGonfCjmhEXjejU2vZ5qiTUrtIkNuL2lCGR37VB81jUa +NYa9StnwohL3/NEcP2hNlzVSSI2041G03FvJJwJrdvxJrrGS3wj4wWhZtEleeTMtM TOAM/gFnVysjR04F4aCsWZk7pw+2Enu+H9Wf1mOyqBn6pDCFSMV3q16wGhLhjVQ1h9 2WJOUsYbPz+IA== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/5] drm/bridge: tc358762: Switch to atomic ops Date: Thu, 15 Jun 2023 22:18:59 +0200 Message-Id: <20230615201902.566182-2-marex@denx.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230615201902.566182-1-marex@denx.de> References: <20230615201902.566182-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Neil Armstrong , Robert Foss , Andrzej Hajda , Jonas Karlman , Jernej Skrabec , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Switch the bridge driver over to atomic ops. No functional change. Signed-off-by: Marek Vasut Reviewed-by: Sam Ravnborg --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Neil Armstrong Cc: Robert Foss Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/bridge/tc358762.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index df9703eacab1f..5e00c08b99540 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -126,7 +126,7 @@ static int tc358762_init(struct tc358762 *ctx) return tc358762_clear_error(ctx); } -static void tc358762_post_disable(struct drm_bridge *bridge) +static void tc358762_post_disable(struct drm_bridge *bridge, struct drm_bridge_state *state) { struct tc358762 *ctx = bridge_to_tc358762(bridge); int ret; @@ -148,7 +148,7 @@ static void tc358762_post_disable(struct drm_bridge *bridge) dev_err(ctx->dev, "error disabling regulators (%d)\n", ret); } -static void tc358762_pre_enable(struct drm_bridge *bridge) +static void tc358762_pre_enable(struct drm_bridge *bridge, struct drm_bridge_state *state) { struct tc358762 *ctx = bridge_to_tc358762(bridge); int ret; @@ -165,7 +165,7 @@ static void tc358762_pre_enable(struct drm_bridge *bridge) ctx->pre_enabled = true; } -static void tc358762_enable(struct drm_bridge *bridge) +static void tc358762_enable(struct drm_bridge *bridge, struct drm_bridge_state *state) { struct tc358762 *ctx = bridge_to_tc358762(bridge); int ret; @@ -185,9 +185,12 @@ static int tc358762_attach(struct drm_bridge *bridge, } static const struct drm_bridge_funcs tc358762_bridge_funcs = { - .post_disable = tc358762_post_disable, - .pre_enable = tc358762_pre_enable, - .enable = tc358762_enable, + .atomic_post_disable = tc358762_post_disable, + .atomic_pre_enable = tc358762_pre_enable, + .atomic_enable = tc358762_enable, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_reset = drm_atomic_helper_bridge_reset, .attach = tc358762_attach, }; From patchwork Thu Jun 15 20:19:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13281715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE2ACEB64DA for ; Thu, 15 Jun 2023 20:19:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9998510E536; Thu, 15 Jun 2023 20:19:23 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id C775710E536 for ; Thu, 15 Jun 2023 20:19:18 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id A834586167; Thu, 15 Jun 2023 22:19:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1686860357; bh=P9iXJviGZ5J3NqHCLPEh5LPn+kpMEUWD9kYTEe3hTgY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GzAOlnvUov4w2dReQzMgGIfofKYb33FwoAoJEZGtA9esMToQZUmL/Bwu/Fo4OOhB0 IFY9E1U1v3xT38s8cotzzsFYXwXFUtoultQFblazEQ1qHWzqwJPK2DnPyUyV+3msbj FgokEPBkHvwiPIlvzbQM34noHUro1jXICbMD46/L7HSzqsv28ppJHqEEonsAjRK/lr 8AC6eSOls0sl7DjnFGEFR/aOQk/DATEFcx8rl1eGHXKop1G2Af1guN22TPkseOsQOz 2JIinrsUHm5bEspArvxWEWjeVTpLLDN+4AWPw+A9nN9Rf5ORzP3KMEggl1OG6oQskb wNghI5MbMd93Q== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH 3/5] drm/bridge: tc358762: Instruct DSI host to generate HSE packets Date: Thu, 15 Jun 2023 22:19:00 +0200 Message-Id: <20230615201902.566182-3-marex@denx.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230615201902.566182-1-marex@denx.de> References: <20230615201902.566182-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Neil Armstrong , Robert Foss , Andrzej Hajda , Jonas Karlman , Jernej Skrabec , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This bridge seems to need the HSE packet, otherwise the image is shifted up and corrupted at the bottom. This makes the bridge work with Samsung DSIM on i.MX8MM and i.MX8MP. Signed-off-by: Marek Vasut Reviewed-by: Sam Ravnborg --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Neil Armstrong Cc: Robert Foss Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/bridge/tc358762.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 5e00c08b99540..77f2ec9de9e59 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -241,7 +241,7 @@ static int tc358762_probe(struct mipi_dsi_device *dsi) dsi->lanes = 1; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | - MIPI_DSI_MODE_LPM; + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO_HSE; ret = tc358762_parse_dt(ctx); if (ret < 0) From patchwork Thu Jun 15 20:19:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13281717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 630FAEB64DB for ; Thu, 15 Jun 2023 20:19:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D2AE10E53B; Thu, 15 Jun 2023 20:19:24 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2787610E536 for ; Thu, 15 Jun 2023 20:19:19 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 38F6D8617C; Thu, 15 Jun 2023 22:19:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1686860357; bh=rVNlQczB4mYuhQJvhfBiAZ3UIaUkZrJMurNSkAapFw0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=yD2+QLMyUsvu2ux0R2cDaG7ffmDqZdA/ziS0D9DcTNlNcm7xcUXiTcKcrLPya0IFL HRkfcuvq1CXAqpist3JvID0EPLjXNebJAi0npacucR/ssE6MLUtyWtAdtfiABb3lzl yx8U30/deVajqRocTfGKSKiezn3blHWeLB2jze7qENgP29j4LRcufZkd+F9/mo3awi WJ88FLNS/+p4tvyoWbl/fp33/wRyXXcLh9n/aGlnogRfj9VjzQErmJfykZIT4J7nFL +KxAmLmy8bi5TDQqlmw5sDR647WUZnTnaMi7J/tqTmRf/Qq6qPrXl4jCIrWB16zVBq u+lN7q2N/patQ== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH 4/5] drm/bridge: tc358762: Guess the meaning of LCDCTRL bits Date: Thu, 15 Jun 2023 22:19:01 +0200 Message-Id: <20230615201902.566182-4-marex@denx.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230615201902.566182-1-marex@denx.de> References: <20230615201902.566182-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Neil Armstrong , Robert Foss , Andrzej Hajda , Jonas Karlman , Jernej Skrabec , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The register content and behavior is very similar to TC358764 VP_CTRL. All the bits except for unknown bit 6 also seem to match, even though the datasheet is just not available. Add a comment and reuse the bit definitions. Signed-off-by: Marek Vasut Reviewed-by: Sam Ravnborg --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Neil Armstrong Cc: Robert Foss Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/bridge/tc358762.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 77f2ec9de9e59..a092e2096074f 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -41,8 +41,17 @@ #define DSI_LANEENABLE 0x0210 /* Enables each lane */ #define DSI_RX_START 1 -/* LCDC/DPI Host Registers */ -#define LCDCTRL 0x0420 +/* LCDC/DPI Host Registers, based on guesswork that this matches TC358764 */ +#define LCDCTRL 0x0420 /* Video Path Control */ +#define LCDCTRL_MSF BIT(0) /* Magic square in RGB666 */ +#define LCDCTRL_VTGEN BIT(4)/* Use chip clock for timing */ +#define LCDCTRL_UNK6 BIT(6) /* Unknown */ +#define LCDCTRL_EVTMODE BIT(5) /* Event mode */ +#define LCDCTRL_RGB888 BIT(8) /* RGB888 mode */ +#define LCDCTRL_HSPOL BIT(17) /* Polarity of HSYNC signal */ +#define LCDCTRL_DEPOL BIT(18) /* Polarity of DE signal */ +#define LCDCTRL_VSPOL BIT(19) /* Polarity of VSYNC signal */ +#define LCDCTRL_VSDELAY(v) (((v) & 0xfff) << 20) /* VSYNC delay */ /* SPI Master Registers */ #define SPICMR 0x0450 @@ -114,7 +123,8 @@ static int tc358762_init(struct tc358762 *ctx) tc358762_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD); tc358762_write(ctx, SPICMR, 0x00); - tc358762_write(ctx, LCDCTRL, 0x00100150); + tc358762_write(ctx, LCDCTRL, LCDCTRL_VSDELAY(1) | LCDCTRL_RGB888 | + LCDCTRL_UNK6 | LCDCTRL_VTGEN); tc358762_write(ctx, SYSCTRL, 0x040f); msleep(100); From patchwork Thu Jun 15 20:19:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13281718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82293EB64D9 for ; Thu, 15 Jun 2023 20:19:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC9AD10E53C; Thu, 15 Jun 2023 20:19:24 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by gabe.freedesktop.org (Postfix) with ESMTPS id C021310E536 for ; Thu, 15 Jun 2023 20:19:19 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id BE1D386180; Thu, 15 Jun 2023 22:19:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1686860358; bh=o6AM8fWj4yCkI3rnUT+PaoaPEAEg3J+vBs+EPGSVwNc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WjYulXmgfugDLOP6zcNcR9g2ieuo4hdYu+/Peuh68r7W88KyJMiivaiyO6iHhIjgu eRcPkxIQWf/9001l8q4Rj5XAqHEMzxf1iZIhx2z/t4/O9TRr6fOpcazR5V41aYV7Uj X3yM374dWNPS9lqQ0XDcKlLzw0A9QCM6kcM23il775q24Dq0sQxOngy+CG5eVAshWz 3i36xAcUHj6/ZR6gx43ZFTFga7aNrw8L5gGGWwXuRwIyfgGpocFs4U04vcm0iV7sTr jVdwofy3iCz1NCvZ10UP60Oy+cvrdYNjR5oSAfI/Y3kSeFbJ63rg1aaBQuGyCt3P3/ VkSfvXZWcE2yQ== From: Marek Vasut To: dri-devel@lists.freedesktop.org Subject: [PATCH 5/5] drm/bridge: tc358762: Handle HS/VS polarity Date: Thu, 15 Jun 2023 22:19:02 +0200 Message-Id: <20230615201902.566182-5-marex@denx.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230615201902.566182-1-marex@denx.de> References: <20230615201902.566182-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Neil Armstrong , Robert Foss , Andrzej Hajda , Jonas Karlman , Jernej Skrabec , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for handling the HS/VS sync signals polarity in the bridge driver, otherwise e.g. DSIM bridge feeds the TC358762 inverted polarity sync signals and the image is shifted to the left, up, and wobbly. Signed-off-by: Marek Vasut Reviewed-by: Sam Ravnborg --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Neil Armstrong Cc: Robert Foss Cc: dri-devel@lists.freedesktop.org --- drivers/gpu/drm/bridge/tc358762.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index a092e2096074f..46198af9eebbf 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -74,6 +74,7 @@ struct tc358762 { struct regulator *regulator; struct drm_bridge *panel_bridge; struct gpio_desc *reset_gpio; + struct drm_display_mode mode; bool pre_enabled; int error; }; @@ -114,6 +115,8 @@ static inline struct tc358762 *bridge_to_tc358762(struct drm_bridge *bridge) static int tc358762_init(struct tc358762 *ctx) { + u32 lcdctrl; + tc358762_write(ctx, DSI_LANEENABLE, LANEENABLE_L0EN | LANEENABLE_CLEN); tc358762_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5); @@ -123,8 +126,18 @@ static int tc358762_init(struct tc358762 *ctx) tc358762_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD); tc358762_write(ctx, SPICMR, 0x00); - tc358762_write(ctx, LCDCTRL, LCDCTRL_VSDELAY(1) | LCDCTRL_RGB888 | - LCDCTRL_UNK6 | LCDCTRL_VTGEN); + + lcdctrl = LCDCTRL_VSDELAY(1) | LCDCTRL_RGB888 | + LCDCTRL_UNK6 | LCDCTRL_VTGEN; + + if (ctx->mode.flags & DRM_MODE_FLAG_NHSYNC) + lcdctrl |= LCDCTRL_HSPOL; + + if (ctx->mode.flags & DRM_MODE_FLAG_NVSYNC) + lcdctrl |= LCDCTRL_VSPOL; + + tc358762_write(ctx, LCDCTRL, lcdctrl); + tc358762_write(ctx, SYSCTRL, 0x040f); msleep(100); @@ -194,6 +207,15 @@ static int tc358762_attach(struct drm_bridge *bridge, bridge, flags); } +static void tc358762_bridge_mode_set(struct drm_bridge *bridge, + const struct drm_display_mode *mode, + const struct drm_display_mode *adj) +{ + struct tc358762 *ctx = bridge_to_tc358762(bridge); + + drm_mode_copy(&ctx->mode, mode); +} + static const struct drm_bridge_funcs tc358762_bridge_funcs = { .atomic_post_disable = tc358762_post_disable, .atomic_pre_enable = tc358762_pre_enable, @@ -202,6 +224,7 @@ static const struct drm_bridge_funcs tc358762_bridge_funcs = { .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, .attach = tc358762_attach, + .mode_set = tc358762_bridge_mode_set, }; static int tc358762_parse_dt(struct tc358762 *ctx)