From patchwork Fri Jun 16 17:00:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 13283048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A944DEB64DA for ; Fri, 16 Jun 2023 17:01:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KyqbfX7qcC9C3Xcw7TWTqQ4JV9Cxez8k04ZX9HCY+EE=; b=mA8nlAeqoaO1J/ dURjv07zNXuKbyzF1u2McXFumcXSpbUFEevBceNlkxCNIdCufp7EXZ1q8oo0bUSPo+riC4HTWlmgG 9hhBjwW8qTXDuLJjBu3ewClnDltnfJzwmT4B6V78onJ5x7//ksdq5rqPaTFswKe/hcj5aENrSURy6 edHJuTTTmsERWPIkPCzNfHdO1l2FFeq4x6cRKH0xzOI431azHbunk3RITBkkYDLunSzXcNiuiqNhg tasBITICwBB9cl/H89DAGgIBo4wIn7+CZre5FNn0q1CYDk877sBQ5bj7KfXfVesOrCw6Mb+cKLNEM VlU9rI0W2Mp0Mj0uqH6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qACoc-001DLj-0T; Fri, 16 Jun 2023 17:00:50 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qACoX-001DHY-0l; Fri, 16 Jun 2023 17:00:46 +0000 Received: from jupiter.universe (dyndsl-091-248-215-052.ewe-ip-backbone.de [91.248.215.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 604026606F85; Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=mUHbgHwI0ryNn4lkHpGJMiFlejZz09YJSeHgaUj4sVs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S1CdmAWzKuFM2OPpy48efHFqKqrkGIb8x97s4ZbEWcBxF8q5+lpT+Hrz3PXf47ERw sBj4/bCLkLcZ8UtHigoDGHI+aqatV8L56UUYix5NOYc9KF81pN6soxP21e1xIizYgT MTJ7l07paZki5dLIjjlsYMQkaG9eZAHZqpI88J6iT66mMjoNcBrBbJXwAzqyIgEljL qDPM6I7IWZw+5HBqDdxspiSHpoVh9Net8+ZcmyykbXUf253Ah06b+0xMFHW7BgOFBP p5fFMCQS/8UKcSogOo5SHKmWL4OvzJUldwxs/f3UtKxLC4GGX3cDQOmgcJWGPUr/4F KJv0MEivPOSMQ== Received: by jupiter.universe (Postfix, from userid 1000) id 10B6F480583; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 1/4] dt-bindings: PCI: dwc: rockchip: Fix interrupt-names issue Date: Fri, 16 Jun 2023 19:00:19 +0200 Message-Id: <20230616170022.76107-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230616_100045_441973_C27F85C1 X-CRM114-Status: GOOD ( 13.06 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The RK356x (and RK3588) have 5 ganged interrupts. For example the "legacy" interrupt combines "inta/intb/intc/intd" with a register providing the details. Currently the binding is not specifying these interrupts resulting in a bunch of errors for all rk356x boards using PCIe. Fix this by specifying the interrupts and add them to the example to prevent regressions. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring --- .../bindings/pci/rockchip-dw-pcie.yaml | 18 ++++++++++++++++++ .../devicetree/bindings/pci/snps,dw-pcie.yaml | 15 ++++++++++++++- 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 24c88942e59e..98e45d2d8dfe 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -56,6 +56,17 @@ properties: - const: pclk - const: aux + interrupts: + maxItems: 5 + + interrupt-names: + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + msi-map: true num-lanes: true @@ -98,6 +109,7 @@ unevaluatedProperties: false examples: - | + #include bus { #address-cells = <2>; @@ -117,6 +129,12 @@ examples: "aclk_dbi", "pclk", "aux"; device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; linux,pci-domain = <2>; max-link-speed = <2>; msi-map = <0x2000 &its 0x2000 0x1000>; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index 1a83f0f65f19..9f605eb297f5 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -193,9 +193,22 @@ properties: oneOf: - description: See native "app" IRQ for details enum: [ intr ] + - description: Combined Legacy A/B/C/D interrupt signal. + const: legacy + - description: Combined System interrupt signal. + const: sys + - description: Combined Power Management interrupt signal. + const: pmc + - description: Combined Message Received interrupt signal. + const: msg + - description: Combined Error interrupt signal. + const: err + allOf: - contains: - const: msi + enum: + - msi + - msg additionalProperties: true From patchwork Fri Jun 16 17:00:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 13283049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F66DEB64D7 for ; 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Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 2/4] dt-bindings: PCI: dwc: rockchip: Add missing legacy-interrupt-controller Date: Fri, 16 Jun 2023 19:00:20 +0200 Message-Id: <20230616170022.76107-3-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230616_100045_468790_4BEC3641 X-CRM114-Status: GOOD ( 11.53 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Rockchip RK356x and RK3588 handle legacy interrupts via a ganged interrupts. The RK356x DT implements this via a sub-node named "legacy-interrupt-controller", just like a couple of other PCIe implementations. This adds proper documentation for this and updates the example to avoid regressions. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring --- .../bindings/pci/rockchip-dw-pcie.yaml | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 98e45d2d8dfe..bf81d306cc80 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -67,6 +67,22 @@ properties: - const: legacy - const: err + legacy-interrupt-controller: + description: Interrupt controller node for handling legacy PCI interrupts. + type: object + properties: + "#address-cells": + const: 0 + + "#interrupt-cells": + const: 1 + + "interrupt-controller": true + + interrupts: + items: + - description: combined legacy interrupt + msi-map: true num-lanes: true @@ -148,6 +164,14 @@ examples: reset-names = "pipe"; #address-cells = <3>; #size-cells = <2>; + + legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; }; }; ... From patchwork Fri Jun 16 17:00:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 13283047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14E69EB64D7 for ; Fri, 16 Jun 2023 17:00:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jFZ5/bZS1/3E0luBpF8Fy/aQEUAd76CopZpFM+Ufwtw=; b=sBsyFPiFA0sqWz BmvPAelOgG3L6w3s/PGEBIwGJXJPSDDhr7OJ3dhOeLRZWljOR5G8hbqVUM0O40nZ7zlLeqEYx2qtP zGQmyAboMvgmZj9/GGKkH++d9D7vrank3toQDVJHb8mNPC1GxVCqSVzclDC2+Fyr1livBwzZIXalH y27waejSGwi/6xqBurEPT4ZXpvJZZJmRE/nrmWJq6wesVQtaMgbU/Wjxj17pmRhLaDHD3cGBjivuj stZDIgUnZLNTH84Sm3n6weAeK/q4z9kyuqFhfTg3OXHcWjI1Vz6Tky43aQj/XVRAM/NAP96XoyuLB C7vg97g0Hy4J4uSvpfiQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qACob-001DLI-2O; Fri, 16 Jun 2023 17:00:49 +0000 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qACoX-001DHT-0m; Fri, 16 Jun 2023 17:00:46 +0000 Received: from jupiter.universe (dyndsl-091-248-215-052.ewe-ip-backbone.de [91.248.215.52]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 5C3ED6606F61; Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=X01oy+ihteZncXuvNTLu0v0W9yQ61BoqL+FIOTAimbo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WjWItqyG+6JtsUQmPKLZ06/+dqMQmlncIFF+Nkc7IP23kC09kxM99c1opbDaSrV8+ Y8/AboL6PR0kAV2/XrwdZt/97XF/WnqxWVJzXP3+4nOUq1oMHZtZ0WC0GzGzDFC3Pp wf5JxqyDKyCky07aT545/1JKhHyhNIIbV1Q6GbJ1nNR70N3VJlKrKszwwT49oYr+ub F8DNTiBQZVp56f4Dx+YMLueaP4cbePxUfoptrxy07mZGAE1I+7SIcMF238l3/p7UUS hbxqZCKJytCBCco+ZtLXypdq54qNpsNHMgh59eyAPXFxhC+uXVll4V2/B5D56F00tg 8yOh3YKQ6UqGA== Received: by jupiter.universe (Postfix, from userid 1000) id 14241480598; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 3/4] dt-bindings: PCI: dwc: rockchip: Update for RK3588 Date: Fri, 16 Jun 2023 19:00:21 +0200 Message-Id: <20230616170022.76107-4-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230616_100045_441967_95ED0F89 X-CRM114-Status: UNSURE ( 9.80 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The PCIe 2.0 controllers on RK3588 need one additional clock, one additional reset line and one for ranges entry. Signed-off-by: Sebastian Reichel Reviewed-by: Rob Herring Reviewed-by: Serge Semin --- .../bindings/pci/rockchip-dw-pcie.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index bf81d306cc80..7897af0ec297 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -41,20 +41,24 @@ properties: - const: config clocks: + minItems: 5 items: - description: AHB clock for PCIe master - description: AHB clock for PCIe slave - description: AHB clock for PCIe dbi - description: APB clock for PCIe - description: Auxiliary clock for PCIe + - description: PIPE clock clock-names: + minItems: 5 items: - const: aclk_mst - const: aclk_slv - const: aclk_dbi - const: pclk - const: aux + - const: pipe interrupts: maxItems: 5 @@ -97,13 +101,19 @@ properties: maxItems: 1 ranges: - maxItems: 2 + minItems: 2 + maxItems: 3 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: - const: pipe + oneOf: + - const: pipe + - items: + - const: pwr + - const: pipe vpcie3v3-supply: true From patchwork Fri Jun 16 17:00:22 2023 Content-Type: text/plain; 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Fri, 16 Jun 2023 18:00:41 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686934841; bh=9mgF9GCwROw6ftx0dsG82gZvHnEiFDB9jVgcEpCCtLw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hkSnKHIN5N2V3Qf8XCSs8gZcfJmWlMdoLvOny4DOPwLr8TRtN56w7iQA+e0h6s6mk L5/Z/7Wl/owHaFypzrKujD+hVA3SgesTG7D+DRBLuoRlIF0+n75XRThCMIf56x7OOM 3EWTP7AnY0iTRqA7gssyzXe/zoir/HB2KLzJNmcwTIHkM11Rwi+e1AvDJVgj52XMsl ZTBRjFjfy2lauZGv5y2QqE5KOVd9ZUKYfxRiAej+I2UlRjH5Lm/HvqQwywwk6YXz81 TFE26xh0SbT8HhbOIQnhoEESSiPa3n7eac+HT4ieiWsIEOjNthQBGt8UiCfbiNHJXU VJvlr0enVimJQ== Received: by jupiter.universe (Postfix, from userid 1000) id 15BA548059A; Fri, 16 Jun 2023 19:00:39 +0200 (CEST) From: Sebastian Reichel To: linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Jingoo Han , Gustavo Pimentel , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Shawn Lin , Simon Xue , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com, Kever Yang Subject: [PATCH v1 4/4] arm64: dts: rockchip: rk3588: add PCIe2 support Date: Fri, 16 Jun 2023 19:00:22 +0200 Message-Id: <20230616170022.76107-5-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230616170022.76107-1-sebastian.reichel@collabora.com> References: <20230616170022.76107-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230616_100045_543260_E78A45B0 X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add all three PCIe2 IP blocks to the RK3588 DT. Note, that RK3588 also has two PCIe3 IP blocks, that will be handled separately. Co-developed-by: Kever Yang Signed-off-by: Kever Yang Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 54 +++++++++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 108 ++++++++++++++++++++++ 2 files changed, 162 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index b9508cea34f1..40fee1367b34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -80,6 +80,60 @@ i2s10_8ch: i2s@fde00000 { status = "disabled"; }; + pcie2x1l0: pcie@fe170000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x20 0x2f>; + clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>, + <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>, + <&cru CLK_PCIE_AUX2>, <&cru CLK_PCIE1L0_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l0_intc 0>, + <0 0 0 2 &pcie2x1l0_intc 1>, + <0 0 0 3 &pcie2x1l0_intc 2>, + <0 0 0 4 &pcie2x1l0_intc 3>; + linux,pci-domain = <2>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x2000 &its0 0x2000 0x1000>; + num-lanes = <1>; + phys = <&combphy1_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf2100000 0x0 0xf2100000 0x0 0x00100000>, + <0x02000000 0x0 0xf2200000 0x0 0xf2200000 0x0 0x00e00000>, + <0x03000000 0x9 0x80000000 0x9 0x80000000 0x0 0x40000000>; + reg = <0xa 0x40800000 0x0 0x00400000>, + <0x0 0xfe170000 0x0 0x00010000>, + <0x0 0xf2000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l0_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac0: ethernet@fe1b0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1b0000 0x0 0x10000>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index a73b17f597af..b5fdc046d8f7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1670,6 +1670,114 @@ qos_vop_m1: qos@fdf82200 { reg = <0x0 0xfdf82200 0x0 0x20>; }; + pcie2x1l1: pcie@fe180000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x30 0x3f>; + clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>, + <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>, + <&cru CLK_PCIE_AUX3>, <&cru CLK_PCIE1L1_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l1_intc 0>, + <0 0 0 2 &pcie2x1l1_intc 1>, + <0 0 0 3 &pcie2x1l1_intc 2>, + <0 0 0 4 &pcie2x1l1_intc 3>; + linux,pci-domain = <3>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x3000 &its0 0x3000 0x1000>; + num-lanes = <1>; + phys = <&combphy2_psu PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf3100000 0x0 0xf3100000 0x0 0x00100000>, + <0x02000000 0x0 0xf3200000 0x0 0xf3200000 0x0 0x00e00000>, + <0x03000000 0x9 0xc0000000 0x9 0xc0000000 0x0 0x40000000>; + reg = <0xa 0x40c00000 0x0 0x00400000>, + <0x0 0xfe180000 0x0 0x00010000>, + <0x0 0xf3000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l1_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + + pcie2x1l2: pcie@fe190000 { + compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x40 0x4f>; + clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>, + <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>, + <&cru CLK_PCIE_AUX4>, <&cru CLK_PCIE1L2_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2x1l2_intc 0>, + <0 0 0 2 &pcie2x1l2_intc 1>, + <0 0 0 3 &pcie2x1l2_intc 2>, + <0 0 0 4 &pcie2x1l2_intc 3>; + linux,pci-domain = <4>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x4000 &its0 0x4000 0x1000>; + num-lanes = <1>; + phys = <&combphy0_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, + <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>, + <0x03000000 0xa 0x00000000 0xa 0x00000000 0x0 0x40000000>; + reg = <0xa 0x41000000 0x0 0x00400000>, + <0x0 0xfe190000 0x0 0x00010000>, + <0x0 0xf4000000 0x0 0x00100000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>; + reset-names = "pwr", "pipe"; + status = "disabled"; + + pcie2x1l2_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + gmac1: ethernet@fe1c0000 { compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe1c0000 0x0 0x10000>;