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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id f20-20020a7bcd14000000b003f7f2a1484csm4192394wmj.5.2023.06.21.00.22.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jun 2023 00:22:37 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Sunil V L , Song Shuai , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH v2 1/3] Documentation: arm: Add bootargs to the table of added DT parameters Date: Wed, 21 Jun 2023 09:22:32 +0200 Message-Id: <20230621072234.9900-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230621_002240_636485_FF2DA62D X-CRM114-Status: GOOD ( 11.26 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The bootargs node is also added by the EFI stub in the function update_fdt(), so add it to the table. Signed-off-by: Alexandre Ghiti --- Documentation/arm/uefi.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/arm/uefi.rst b/Documentation/arm/uefi.rst index baebe688a006..2b7ad9bd7cd2 100644 --- a/Documentation/arm/uefi.rst +++ b/Documentation/arm/uefi.rst @@ -50,7 +50,7 @@ The stub populates the FDT /chosen node with (and the kernel scans for) the following parameters: ========================== ====== =========================================== -Name Size Description +Name Type Description ========================== ====== =========================================== linux,uefi-system-table 64-bit Physical address of the UEFI System Table. @@ -67,4 +67,6 @@ linux,uefi-mmap-desc-ver 32-bit Version of the mmap descriptor format. kaslr-seed 64-bit Entropy used to randomize the kernel image base address location. + +bootargs String Kernel command line ========================== ====== =========================================== From patchwork Wed Jun 21 07:22:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 13286791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED0E1EB64D8 for ; Wed, 21 Jun 2023 07:23:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WoUPbS7QHgoyc4046Q5gyMs8mcrzOFypGggBLhTgU9o=; b=2XdXTAdBGvo9/B XPqnSewqk2UaTwfLCtzPlS25gOPIaxCicAefiKCpkosbLkQe75OaZl2BUVrA+bwsOFPx5WFn72lFU 3q3oMDEEwTGO+AsZ5CWJFFBW4oVPe5Ch/Ta2k4lgqG/RD3FQ/61mhit8fsDQnPEvKS7uLw2xag62v axJiDU44HD35lzlpGMe3dAXnKjQDE71X84zt1VNEB/1gx/Jy/UkXBjMTj6NJcZOx/zdQRfpTqTUXH KsCRHIX8T5KBMU+L9kBKOculOhKy9u11OaTwZLwleEC2sBVVsf6+DHgGCecHPA1pB6SK0h3kh93TC WurdMURRzzIVy9KB7qdg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qBsBt-00DXS1-1i; Wed, 21 Jun 2023 07:23:45 +0000 Received: from mail-lj1-x229.google.com ([2a00:1450:4864:20::229]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qBsBp-00DXQu-2Y for linux-riscv@lists.infradead.org; Wed, 21 Jun 2023 07:23:43 +0000 Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2b466066950so65844881fa.2 for ; Wed, 21 Jun 2023 00:23:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1687332219; x=1689924219; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fnyPv31F45M86yIwQlrstisnBOJBnjKhbMY/p4sY5eQ=; b=TkxKBo7sMoQa4xUtWuRyOqCmHSAjSK367jN6AcivxMcwqtrB5/gzzKn/3Y5GqVWVcC 8NMHMnfsvaknpg5hsp2Uscs6lOsAnllhjNg02zlZS45MwTBLnnkxfAWC/4tBKZwxylLw LkmzOPZJbiI8QFlFBTiQ4eLmdxE2uk6at4VzdpCszFCainBdMy593PRvsaIPllAtej2J R/utAyYl5jqm/neqDdpM9Z7YsZbU8H+s9B5kSwtygOSGsd3Lk23QeP/anYPI1RoZCwaP gA6x4uxaRML+a9JjIF/ObP0l3b25iMyOos3kHatnPm3Q6Wb/tMjldYg++m0uvdq1Pyjy dFNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687332219; x=1689924219; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fnyPv31F45M86yIwQlrstisnBOJBnjKhbMY/p4sY5eQ=; b=IztS44keIGCtjEANmO77OSfpxrtRMvVj4XjF/tqTnAlDrrU84yvLPPjLjuJUQWVRF5 JvAYn+duqM6LwfiOwiS38OSKkBXc1+g1VGvAD+Fb2F8GImuSOrz4vEGtr9v1XqaH8fmo KiQNqKOFVX1JRx1PdZV4GEhhjsqLCT4HIzEgZNI+Iucv+jKzkM/idyrQ1UCkonbN0wC4 opd8teR1kSRHcwsJz5ZSBy6mX04jgIYprRV4uqUaNlWhrlBHK6P5fcEeCHdXXMdvm5Dw obLgwrDxDMWqShxCKy/hQwSl4n7AcNgutpXGLZ1/eVg6zGR0VU0fi1Rr2+fB8ZPrWgOV 64dA== X-Gm-Message-State: AC+VfDxRhHhQIS5u7wN1AjJNNij37C2y+xHm4oqxYKpic2rga60TsmBm SDEKTpKTzfE4XwD8k6zsRpuDjA== X-Google-Smtp-Source: ACHHUZ4ktJQFbQTy5b/f+f/cZlI6DpTuq17vWwL2p9To2CXZny22UfxVa3nA1ii4j/jIDMF73Tb+eQ== X-Received: by 2002:a2e:87cd:0:b0:2b4:7965:41aa with SMTP id v13-20020a2e87cd000000b002b4796541aamr4898385ljj.31.1687332219110; Wed, 21 Jun 2023 00:23:39 -0700 (PDT) Received: from localhost.localdomain (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id l5-20020a1ced05000000b003f70a7b4537sm15214394wmh.36.2023.06.21.00.23.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jun 2023 00:23:38 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Sunil V L , Song Shuai , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= Subject: [PATCH v2 2/3] Documentation: riscv: Add early boot document Date: Wed, 21 Jun 2023 09:22:33 +0200 Message-Id: <20230621072234.9900-2-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230621072234.9900-1-alexghiti@rivosinc.com> References: <20230621072234.9900-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230621_002341_830123_5BB02CFC X-CRM114-Status: GOOD ( 33.70 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This document describes the constraints and requirements of the early boot process in a RISC-V kernel. Signed-off-by: Alexandre Ghiti Reviewed-by: Björn Töpel Reviewed-by: Conor Dooley Reviewed-by: Sunil V L Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Reviewed-by: Andrew Jones --- Documentation/riscv/boot-image-header.rst | 3 - Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ Documentation/riscv/index.rst | 1 + 3 files changed, 171 insertions(+), 3 deletions(-) create mode 100644 Documentation/riscv/boot.rst diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst index d7752533865f..a4a45310c4c4 100644 --- a/Documentation/riscv/boot-image-header.rst +++ b/Documentation/riscv/boot-image-header.rst @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux This document only describes the boot image header details for RISC-V Linux. -TODO: - Write a complete booting guide. - The following 64-byte header is present in decompressed Linux kernel image:: u32 code0; /* Executable code */ diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst new file mode 100644 index 000000000000..019ee818686d --- /dev/null +++ b/Documentation/riscv/boot.rst @@ -0,0 +1,170 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============================================== +RISC-V Kernel Boot Requirements and Constraints +=============================================== + +:Author: Alexandre Ghiti +:Date: 23 May 2023 + +This document describes what the RISC-V kernel expects from bootloaders and +firmware, but also the constraints that any developer must have in mind when +touching the early boot process. For the purposes of this document, the +'early boot process' refers to any code that runs before the final virtual +mapping is set up. + +Pre-kernel Requirements and Constraints +======================================= + +The RISC-V kernel expects the following of bootloaders and platform firmware: + +Register state +-------------- + +The RISC-V kernel expects: + + * `$a0` to contain the hartid of the current core. + * `$a1` to contain the address of the devicetree in memory. + +CSR state +--------- + +The RISC-V kernel expects: + + * `$satp = 0`: the MMU, if present, must be disabled. + +Reserved memory for resident firmware +------------------------------------- + +The RISC-V kernel must not map any resident memory, or memory protected with +PMPs, in the direct mapping, so the firmware must correctly mark those regions +as per the devicetree specification and/or the UEFI specification. + +Kernel location +--------------- + +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the +kernel if that's not the case. + +Hardware description +-------------------- + +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. + +The devicetree is either passed directly to the kernel from the previous stage +using the `$a1` register, or when booting with UEFI, it can be passed using the +EFI configuration table. + +The ACPI tables are passed to the kernel using the EFI configuration table. In +this case, a tiny devicetree is still created by the EFI stub. Please refer to +"EFI stub and devicetree" tree section below for details about this devicetree. + +Kernel entrance +--------------- + +On SMP systems, there are 2 methods to enter the kernel: + +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart + wins a lottery and executes the early boot code while the other harts are + parked waiting for the initialization to finish. This method is mostly used to + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. +- `Ordered booting`: the firmware releases only one hart that will execute the + initialization phase and then will start all other harts using the SBI HSM + extension. The ordered booting method is the preferred booting method for + booting the RISC-V kernel because it can support cpu hotplug and kexec. + +UEFI +---- + +UEFI memory map +~~~~~~~~~~~~~~~ + +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to +populate the system memory. + +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree +node and abide by the devicetree specification to convert the attributes of +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree +specification v0.4-rc1). + +RISCV_EFI_BOOT_PROTOCOL +~~~~~~~~~~~~~~~~~~~~~~~ + +When booting with UEFI, the EFI stub requires the boot hartid in order to pass +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using +one of the following methods: + +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). +- `boot-hartid` devicetree subnode (**deprecated**). + +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree +based approach is deprecated now. + +Early Boot Requirements and Constraints +======================================= + +The RISC-V kernel's early boot process operates under the following constraints: + +EFI stub and devicetree +----------------------- + +When booting with UEFI, the devicetree is supplemented (or created) by the EFI +stub with the same parameters as arm64 which are described at the paragraph +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. + +Virtual mapping installation +---------------------------- + +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: + +1. :c:func:`setup_vm` installs a temporary kernel mapping in + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the + kernel text/data are mapped at this point. When establishing this mapping, no + allocation can be done (since the system memory is not known yet), so + :c:var:`early_pg_dir` page table is statically allocated (using only one + table for each level). + +2. :c:func:`setup_vm_final` creates the final kernel mapping in + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory + to create the linear mapping. When establishing this mapping, the kernel + can allocate memory but cannot access it directly (since the direct mapping + is not present yet), so it uses temporary mappings in the fixmap region to + be able to access the newly allocated page table levels. + +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly +convert direct mapping addresses to physical addresses, they need to know the +start of the DRAM. This happens after step 1, right before step 2 installs the +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). +Any usage of those macros before the final virtual mapping is installed must +be carefully examined. + +Device-tree mapping via fixmap +------------------------------ + +The RISC-V kernel uses the fixmap region to map the devicetree because the +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is +initialized with virtual addresses established by :c:func:`setup_vm` and used +with the mapping established by :c:func:`setup_vm_final`. + +Pre-MMU execution +----------------- + +A few pieces of code need to run before even the first virtual mapping is +established. These are the installation of the first virtual mapping itself, +patching of early alternatives and the early parsing of the kernel command line. +That code must be very carefully compiled as: + +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since + otherwise, any access to a global symbol would go through the GOT which is + only relocated virtually. +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid + any relocations to happen before the MMU is setup. +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and + others). + +As using a symbol from a different compilation unit requires this unit to be +compiled with those flags, we advise, as much as possible, not to use external +symbols. diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst index 175a91db0200..1f66062def6d 100644 --- a/Documentation/riscv/index.rst +++ b/Documentation/riscv/index.rst @@ -5,6 +5,7 @@ RISC-V architecture .. toctree:: :maxdepth: 1 + boot boot-image-header vm-layout hwprobe From patchwork Wed Jun 21 07:22:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Ghiti X-Patchwork-Id: 13286792 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 304DBEB64D7 for ; Wed, 21 Jun 2023 07:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=++kXoMHzVvMpkrZHbd7NgMk2gRE0oFDOq0Dps6XezDY=; b=pMdMM1fQCqYCQn NUqEUXhDyg2TrdnxUfgozWxUnE6/fdWp80pjZpOBvc1panNMm8EJX3/R1/71+hhPXDpyZ91TPd1XI W7jxwhUjnyCdoEaFFOwsSjtxzDYDsnnjZACq7G1YX2CbdlHbHp19EK/oemhC03r6AQIgHUI6ePZSg i64eOOlEd9icM6ZuPROnA/kd3xltlxuonTzDbakq3SvgbstMOQl/nsSA1egQ+yMkfMkJ0sDzJ+r7T UE6ROjPiIwo1aSNaisnjwNQAOkblHSiyxuVPA6uAhiXN064IogWNr/t4KFZxC6/qSSo8CSFYcro8k xl+akZ6rUuM+GBjCNegQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qBsCq-00DXaR-24; Wed, 21 Jun 2023 07:24:44 +0000 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qBsCo-00DXYz-0R for linux-riscv@lists.infradead.org; Wed, 21 Jun 2023 07:24:43 +0000 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-3f9b258f3d8so25149115e9.1 for ; Wed, 21 Jun 2023 00:24:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1687332280; x=1689924280; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YQDRIqOL25lhh2vW3phUacbtXDC/Hgmm9aSu83e6n78=; b=x1xZiuScOCs29m4m9pPxoAs5kRoFSS8kxXOiTaBfJ84sHlZ9664m08lrFjOAnyDA4r GluBnz5W9XdgDQlJieE05espwRJ5BGtnyYHjFfqLuhWKNHyQE1V2OdOEs4WGtJhkdYyn E+6c9H8DAwTdQPWh30EDyF57rZuBbWHtfrXwoSV4LKYvcueXWpyMmAdPQmF0MEGZYr5e 9YckhhDptG8R6YxttjX08SH+x19OGMv610eFAoRiuDeCaW0qu+1iANLvc61fDTNQPY6e JNNWraib49EaorsHJkrKw0gA+RDawGSsyjhtJJxTtvJtamcBuDPdHPuURmVMCHTQR8jW oPmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687332280; x=1689924280; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YQDRIqOL25lhh2vW3phUacbtXDC/Hgmm9aSu83e6n78=; b=fC5U1p9nJ7t4QIgWRl168rTRKmk57BNhInZLXNycaflIjTyXzrR4o7PQjw3FT3ebdR UZxlgSeTHgdKoI003t/k/dMwxPfgL9iOucEgT35tJROYB/6U/Fmy/oE2q466xCl0dRWQ RAV3r8oULTt4HFt4g1QRIcY4/1QqhKzwnhgqpgoQhUBQI+1UZy5/1kDQZvnr1LTi7qej f29zjW4IG5hS9kIEiHqxeckryJD0Lb1Kjixphtsq1Zm3YGvg0AucIHAkoT67bsM6PGZe me3gVBY2gHX2p22qooRF8iOTafyunwKWgIBgRkxDXYNCIry9mf3pCGaGmlFi+EMCOsxY QMjg== X-Gm-Message-State: AC+VfDwPZKSUHaNnvsCaEGb5ITXmiMxR09941rpe3198xzO6PaIR7K1z 5Rhz5JYxF+/GEocQvQkn+6ktag== X-Google-Smtp-Source: ACHHUZ4dJReKgFWz4Rz1T/e3oc9QKQiJxhIA69ZtlRzSniyGxM7KjXFjlMVaX3q3cDTgs0tucWV0Iw== X-Received: by 2002:a05:600c:ad2:b0:3f9:bb86:bdd3 with SMTP id c18-20020a05600c0ad200b003f9bb86bdd3mr1606118wmr.7.1687332280108; Wed, 21 Jun 2023 00:24:40 -0700 (PDT) Received: from localhost.localdomain (amontpellier-656-1-456-62.w92-145.abo.wanadoo.fr. [92.145.124.62]) by smtp.gmail.com with ESMTPSA id u15-20020a05600c210f00b003f18b942338sm4181118wml.3.2023.06.21.00.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jun 2023 00:24:39 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Sunil V L , Song Shuai , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Alexandre Ghiti , Atish Patra Subject: [PATCH v2 3/3] Documentation: riscv: Update boot image header since EFI stub is supported Date: Wed, 21 Jun 2023 09:22:34 +0200 Message-Id: <20230621072234.9900-3-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230621072234.9900-1-alexghiti@rivosinc.com> References: <20230621072234.9900-1-alexghiti@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230621_002442_172160_02A78831 X-CRM114-Status: GOOD ( 14.70 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The EFI stub is supported on RISC-V so update the documentation that explains how the boot image header was reused to support it. Signed-off-by: Alexandre Ghiti Reviewed-by: Atish Patra Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- Documentation/riscv/boot-image-header.rst | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst index a4a45310c4c4..df2ffc173e80 100644 --- a/Documentation/riscv/boot-image-header.rst +++ b/Documentation/riscv/boot-image-header.rst @@ -28,11 +28,11 @@ header in future. Notes ===== -- This header can also be reused to support EFI stub for RISC-V in future. EFI - specification needs PE/COFF image header in the beginning of the kernel image - in order to load it as an EFI application. In order to support EFI stub, - code0 should be replaced with "MZ" magic string and res3(at offset 0x3c) should - point to the rest of the PE/COFF header. +- This header is also reused to support EFI stub for RISC-V. EFI specification + needs PE/COFF image header in the beginning of the kernel image in order to + load it as an EFI application. In order to support EFI stub, code0 is replaced + with "MZ" magic string and res3(at offset 0x3c) points to the rest of the + PE/COFF header. - version field indicate header version number