From patchwork Wed Jun 28 12:34:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3BF6C001B0 for ; Wed, 28 Jun 2023 12:38:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231922AbjF1Mij (ORCPT ); Wed, 28 Jun 2023 08:38:39 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]:21442 "EHLO mx0a-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231583AbjF1Mg6 (ORCPT ); Wed, 28 Jun 2023 08:36:58 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35S5hCU6026329; Wed, 28 Jun 2023 12:35:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=JSeJz6vmPXLz33wUlydFQ74f+iZyLf0EKLfg0q3PF5E=; b=H27ML2s7GPpH7Ph8f7sdf1Yd6lB1Pqx+7YrDbHpoL4SUpBBctm+zujZgaDsTbHxQgGit FpZJR3iPG8uYZYx0erRreuLM2vBw4wSTEnPxuVMS81OY9gaajGSmVMTKF2k5CBf6BkgD qKVwBUy7J1Xo9XIt9gKWO5EtfjYBXxKdabDp5T557BJpfigOeitrBGvH3fKUWf6dVoTS prSTeJL/VxS1JAv1bRnUMzp/sTFI+VB9/XmFGVeh49bPykWoAhtbgfMHzwaqxQknRaJ8 Ac7sdbe1NUgASHjGKUAuP165aVL7Ql0K7jGcxTUhSXW5y7auYilnJSLxd9QG8g4A6xW2 pQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgextgwv3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:21 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZKKx029062 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:20 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:14 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 01/21] docs: qcom: Add qualcomm minidump guide Date: Wed, 28 Jun 2023 18:04:28 +0530 Message-ID: <1687955688-20809-2-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: hAb0oc_PLuXPEomLl0jYT4OvLrOJPJmz X-Proofpoint-GUID: hAb0oc_PLuXPEomLl0jYT4OvLrOJPJmz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the qualcomm minidump guide for the users which tries to cover the dependency and the way to test and collect minidump on Qualcomm supported platforms. Signed-off-by: Mukesh Ojha --- Documentation/admin-guide/index.rst | 1 + Documentation/admin-guide/qcom_minidump.rst | 293 ++++++++++++++++++++++++++++ 2 files changed, 294 insertions(+) create mode 100644 Documentation/admin-guide/qcom_minidump.rst diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst index 43ea35613dfc..251d070486c2 100644 --- a/Documentation/admin-guide/index.rst +++ b/Documentation/admin-guide/index.rst @@ -120,6 +120,7 @@ configure specific aspects of kernel behavior to your liking. perf-security pm/index pnp + qcom_minidump rapidio ras rtc diff --git a/Documentation/admin-guide/qcom_minidump.rst b/Documentation/admin-guide/qcom_minidump.rst new file mode 100644 index 000000000000..a3a8cfee4555 --- /dev/null +++ b/Documentation/admin-guide/qcom_minidump.rst @@ -0,0 +1,293 @@ +Qualcomm Minidump Feature +========================= + +Introduction +------------ + +Minidump is a best effort mechanism to collect useful and predefined +data for first level of debugging on end user devices running on +Qualcomm SoCs. It is built on the premise that System on Chip (SoC) +or subsystem part of SoC crashes, due to a range of hardware and +software bugs. Hence, the ability to collect accurate data is only +a best-effort. The data collected could be invalid or corrupted, data +collection itself could fail, and so on. + +Qualcomm devices in engineering mode provides a mechanism for generating +full system RAM dumps for post-mortem debugging. But in some cases it's +however not feasible to capture the entire content of RAM. The minidump +mechanism provides the means for selecting region should be included in +the ramdump. + +:: + + +-----------------------------------------------+ + | DDR +-------------+ | + | | SS0-ToC| | + | +----------------+ +----------------+ | | + | |Shared memory | | SS1-ToC| | | + | |(SMEM) | | | | | + | | | +-->|--------+ | | | + | |G-ToC | | | SS-ToC \ | | | + | |+-------------+ | | | +-----------+ | | | + | ||-------------| | | | |-----------| | | | + | || SS0-ToC | | | +-|<|SS1 region1| | | | + | ||-------------| | | | | |-----------| | | | + | || SS1-ToC |-|>+ | | |SS1 region2| | | | + | ||-------------| | | | |-----------| | | | + | || SS2-ToC | | | | | ... | | | | + | ||-------------| | | | |-----------| | | | + | || ... | | |-|<|SS1 regionN| | | | + | ||-------------| | | | |-----------| | | | + | || SSn-ToC | | | | +-----------+ | | | + | |+-------------+ | | | | | | + | | | | |----------------| | | + | | | +>| regionN | | | + | | | | |----------------| | | + | +----------------+ | | | | | + | | |----------------| | | + | +>| region1 | | | + | |----------------| | | + | | | | | + | |----------------|-+ | + | | region5 | | + | |----------------| | + | | | | + | Region information +----------------+ | + | +---------------+ | + | |region name | | + | |---------------| | + | |region address | | + | |---------------| | + | |region size | | + | +---------------+ | + +-----------------------------------------------+ + G-ToC: Global table of contents + SS-ToC: Subsystem table of contents + SS0-SSn: Subsystem numbered from 0 to n + +It depends on targets how the underlying hardware taking care of the +implementation part for minidump like above diagram is for shared +memory and it is possible that this could be implemented via memory +mapped regions but the general idea remain same. + +In this document, SMEM will be used as the backend implementation of +minidump. + +SMEM as backend +---------------- + +The core of minidump feature is part of Qualcomm's boot firmware code. +It initializes shared memory (SMEM), which is a part of DDR and +allocates a small section of it to minidump table, i.e. also called +global table of contents (G-ToC). Each subsystem (APSS, ADSP, ...) has +its own table of segments to be included in the minidump, all +references from a descriptor in SMEM (G-ToC). Each segment/region has +some details like name, physical address and its size etc. and it +could be anywhere scattered in the DDR. + +Minidump kernel driver concept +------------------------------ +:: + + Minidump Client-1 Client-2 Client-5 Client-n + | | | | + | | ... | ... | + | | | | + | | | | + | | | | + | | | | + | | | | + | | | | + | +---+--------------+----+ | + +-----------+ qcom_minidump(core) +--------+ + | | + +------+-----+------+---+ + | | | + | | | + +---------------+ | +--------------------+ + | | | + | | | + | | | + v v v + +-------------------+ +-------------------+ +------------------+ + |qcom_minidump_smem | |qcom_minidump_mmio | | qcom_minidump_rm | + | | | | | | + +-------------------+ +-------------------+ +------------------+ + Shared memory Memory mapped IO Resource manager + (backend) (backend) (backend) + + +Kernel implementation of minidump driver is divided into two parts one is, +the core implementation called frontend driver ``qcom_minidump.c`` and this +is the driver will be exposing the API for clients and the other part is, +backend driver and its depends whether it is based on SMEM, MMIO or some +other way corressponding driver will be hooking itself up with the core +driver to get itself working. As of now, at a time one and only one backend +can be attached to the front-end either it is HOST or a guest VM. + +Qualcomm minidump kernel driver adds the capability to add Linux region +to be dumped as part of RAM dump collection. At the moment, shared memory +driver creates platform device for minidump driver and give a means to +APSS minidump to initialize itself on probe. + +This driver provides ``qcom_minidump_region_register`` and +``qcom_minidump_region_unregister`` API's to register and unregister +APSS minidump region. It also gives a mechanism to update physical/virtual +address for the client whose addresses keeps on changing, e.g., current stack +address of task keeps on changing on context switch for each core. So these +clients can update their addresses with ``qcom_minidump_update_region`` +API. + +The driver also supports registration for the clients who came before +minidump driver was initialized. It maintains pending list of clients +who came before minidump and once minidump is initialized it registers +them in one go. + +To simplify post-mortem debugging, driver creates and maintain an ELF +header as first region that gets updated each time a new region gets +registered. + +The solution supports extracting the RAM dump/minidump produced either +over USB or stored to an attached storage device. + +Dependency of minidump kernel driver +------------------------------------ + +It is to note that whole of minidump depends on Qualcomm boot +firmware whether it supports minidump or not. So, if the minidump +SMEM ID is present in shared memory, it indicates that minidump +is supported from boot firmware and it is possible to dump Linux +(APSS) region as part of minidump collection. + +How a kernel client driver can register region with minidump +------------------------------------------------------------ + +Client driver can use ``qcom_minidump_region_register`` API's to +register and ``qcom_minidump_region_unregister`` to unregister +their region from minidump driver. + +Client needs to fill their region by filling ``qcom_minidump_region`` +structure object which consists of the region name, region's +virtual and physical address and its size. + +Below is one sample client driver snippet which tries to allocate +a region from kernel heap of certain size and it writes a certain +known pattern (that can help in verification after collection +that we got the exact pattern, what we wrote) and registers it with +minidump. + + .. code-block:: c + + #include + [...] + + + [... inside a function ...] + struct qcom_minidump_region region; + + [...] + + client_mem_region = kzalloc(region_size, GFP_KERNEL); + if (!client_mem_region) + return -ENOMEM; + + [... Just write a pattern ...] + memset(client_mem_region, 0xAB, region_size); + + [... Fill up the region object ...] + strlcpy(region.name, "REGION_A", sizeof(region.name)); + region.virt_addr = client_mem_region; + region.phys_addr = virt_to_phys(client_mem_region); + region.size = region_size; + + ret = qcom_minidump_region_register(®ion); + if (ret < 0) { + pr_err("failed to add region in minidump: err: %d\n", ret); + return ret; + } + + [...] + + +Test +---- + +Existing Qualcomm devices already supports entire RAM dump (also called +full dump) by writing appropriate value to Qualcomm's top control and +status register (tcsr) in ``driver/firmware/qcom_scm.c`` . + +SCM device Tree bindings required to support download mode +For example (sm8450) :: + + / { + + [...] + + firmware { + scm: scm { + compatible = "qcom,scm-sm8450", "qcom,scm"; + [... tcsr register ... ] + qcom,dload-mode = <&tcsr 0x13000>; + + [...] + }; + }; + + [...] + + soc: soc@0 { + + [...] + + tcsr: syscon@1fc0000 { + compatible = "qcom,sm8450-tcsr", "syscon"; + reg = <0x0 0x1fc0000 0x0 0x30000>; + }; + + [...] + }; + [...] + + }; + +User of minidump can pass ``qcom_scm.download_mode="mini"`` to kernel +commandline to set the current download mode to minidump. +Similarly, ``"full"`` is passed to set the download mode to full dump +where entire RAM dump will be collected while setting it ``"full,mini"`` +will collect minidump along with fulldump. + +Writing to sysfs node can also be used to set the mode to minidump:: + + echo "mini" > /sys/module/qcom_scm/parameter/download_mode + +Once the download mode is set, any kind of crash will make the device collect +respective dump as per set download mode. + +Dump collection +--------------- + +The solution supports extracting the minidump produced either over USB or +stored to an attached storage device. + +By default, dumps are downloaded via USB to the attached x86_64 machine +running PCAT (Qualcomm tool) software. Upon download, we will see +a set of binary blobs starting with name ``md_*`` in PCAT configured directory +in x86_64 machine, so for above example from the client it will be +``md_REGION_A.BIN``. This binary blob depends on region content to determine +whether it needs external parser support to get the content of the region, +so for simple plain ASCII text we don't need any parsing and the content +can be seen just opening the binary file. + +To collect the dump to attached storage type, one needs to write appropriate +value to IMEM register, in that case dumps are collected in rawdump +partition on the target device itself. + +One needs to read the entire rawdump partition and pull out content to +save it onto the attached x86_64 machine over USB. Later, this rawdump +can be passed to another tool (``dexter.exe`` [Qualcomm tool]) which converts +this into the similar binary blobs which we have got it when download type +was set to USB, i.e. a set of registered regions as blobs and their name +starts with ``md_*``. + +Replacing the ``dexter.exe`` with some open source tool can be added as future +scope of this document. From patchwork Wed Jun 28 12:34:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E76A9EB64DD for ; Wed, 28 Jun 2023 12:36:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231409AbjF1MgK (ORCPT ); Wed, 28 Jun 2023 08:36:10 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:30942 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231303AbjF1MgA (ORCPT ); Wed, 28 Jun 2023 08:36:00 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SBBj0W032212; Wed, 28 Jun 2023 12:35:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=z/38/L7Qb4rY0gn24IqUDEH0xFQsfWB9pSUqCcrV3P8=; b=HNt/zEUQKPRanF5fARYX0Inv7LCG2imfF6HYWksc/Eli2gqIe2VjIiOwyMrLlCPlZq19 l7bZCVuDQIuguhcfQV4LBj2QX6OqqTet7/YZqtdc9aRZ4ZfFrnMzqqGdEOOe0454ugB3 2gHE8oIBdGiJ06ixILlRJyde0MVBVa/Wno6UPBe81pLh74ci9+r1ej5jdcEDUxdB/e+m D9e6DFlPygSCp1mGmaDrpB+oe0G5Nr265ncA/pUoLUCtmh0Dhq1lbmGQSHVzMV6xCzWK g1PFLDK/ezpJc9LCowsl1GwG81f0kMZS0Wwb2aDUM5/GqYYYjdeDIWHLrTdPBU6stiFJ gw== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgetpgw4j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:28 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZRr3025624 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:27 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:20 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 02/21] kallsyms: Export kallsyms_lookup_name Date: Wed, 28 Jun 2023 18:04:29 +0530 Message-ID: <1687955688-20809-3-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: cdOZ3jlYYRrz3hYIl8DadVmQZGPwRH6s X-Proofpoint-GUID: cdOZ3jlYYRrz3hYIl8DadVmQZGPwRH6s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Module like minidump providing debugging support will need to get the symbol information from the core kernel e.g to get the linux_banner, kernel section addresses bss, data, ro etc. commit 0bd476e6c671 ("kallsyms: unexport kallsyms_lookup_name() and kallsyms_on_each_symbol()") unexports kallsyms_lookup_name due to lack of in-tree user of the symbol. Now, that minidump will one of its user, export it. Signed-off-by: Mukesh Ojha --- kernel/kallsyms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/kallsyms.c b/kernel/kallsyms.c index 77747391f49b..34a074f58736 100644 --- a/kernel/kallsyms.c +++ b/kernel/kallsyms.c @@ -283,7 +283,7 @@ unsigned long kallsyms_lookup_name(const char *name) return module_kallsyms_lookup_name(name); } - +EXPORT_SYMBOL_GPL(kallsyms_lookup_name); /* * Iterate over all symbols in vmlinux. For symbols from modules use * module_kallsyms_on_each_symbol instead. From patchwork Wed Jun 28 12:34:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AE9EEB64DD for ; Wed, 28 Jun 2023 12:38:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232225AbjF1Mh7 (ORCPT ); Wed, 28 Jun 2023 08:37:59 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:2428 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231856AbjF1Mgk (ORCPT ); Wed, 28 Jun 2023 08:36:40 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35S7R01Z029236; Wed, 28 Jun 2023 12:35:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=QmPTvnuCX9nTTcTKJzsrAxvtP/T8wK3/aBYs6dPtSDI=; b=Ierbl0LvulKXCI+Dz6XQC3UdYbrYlrZS0tR4q0MBlUktdtEqvx2n6tXi379tRuiLGqQs ZlaHvQ8KGcrwc9sKDX9vrqc3MJN54GOaLSY3C7LMcZXvXRzqaZXLNbz74Ee9VL5qdgLY fGdje59auLxBoEFaZtssqR9Xj/Hzylj0k3N3HmoVWxwc4xP7oIrDs6tUctq78RRSPk1d EGqL1ioVGw9FGMYiBSiS+x5KixChWZUJAE/z8cczyVTd8JN/oQG+8euPwE3BIsjTej88 aXihprM1c18RE9J0k5Cl9RW5yOVD63DMK4V5ne5GoWuQlijZ/WjUOGb7Re05LtyA0O0S DA== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgbfss8d0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:36 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZZpe029190 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:35 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:27 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 03/21] soc: qcom: Add qcom_minidump_smem module Date: Wed, 28 Jun 2023 18:04:30 +0530 Message-ID: <1687955688-20809-4-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8vbZ3mHqD4PnjLNlGLMFmmrv47sJ7uZj X-Proofpoint-ORIG-GUID: 8vbZ3mHqD4PnjLNlGLMFmmrv47sJ7uZj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 mlxscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add qcom_minidump_smem module in a preparation to remove smem based minidump specific code from driver/remoteproc/qcom_common.c and provide needed exported API, this abstract minidump specific data layout from qualcomm's remoteproc driver. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 8 ++ drivers/soc/qcom/qcom_minidump_smem.c | 147 ++++++++++++++++++++++++++++++++++ include/soc/qcom/qcom_minidump.h | 24 ++++++ 3 files changed, 179 insertions(+) create mode 100644 drivers/soc/qcom/qcom_minidump_smem.c create mode 100644 include/soc/qcom/qcom_minidump.h diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index a491718f8064..982310b5a1cb 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -279,4 +279,12 @@ config QCOM_INLINE_CRYPTO_ENGINE tristate select QCOM_SCM +config QCOM_MINIDUMP_SMEM + tristate "QCOM Minidump SMEM (as backend) Support" + depends on ARCH_QCOM + depends on QCOM_SMEM + help + Enablement of core minidump feature is controlled from boot firmware + side, and this config allow linux to query minidump segments associated + with the remote processor and check its validity. endmenu diff --git a/drivers/soc/qcom/qcom_minidump_smem.c b/drivers/soc/qcom/qcom_minidump_smem.c new file mode 100644 index 000000000000..b588833ea26e --- /dev/null +++ b/drivers/soc/qcom/qcom_minidump_smem.c @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include +#include +#include +#include +#include + +#define MAX_NUM_OF_SS 10 +#define MAX_REGION_NAME_LENGTH 16 +#define SBL_MINIDUMP_SMEM_ID 602 +#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) + +/** + * struct minidump_region - Minidump region + * @name : Name of the region to be dumped + * @seq_num: : Use to differentiate regions with same name. + * @valid : This entry to be dumped (if set to 1) + * @address : Physical address of region to be dumped + * @size : Size of the region + */ +struct minidump_region { + char name[MAX_REGION_NAME_LENGTH]; + __le32 seq_num; + __le32 valid; + __le64 address; + __le64 size; +}; + +/** + * struct minidump_subsystem - Subsystem's SMEM Table of content + * @status : Subsystem toc init status + * @enabled : if set to 1, this region would be copied during coredump + * @encryption_status: Encryption status for this subsystem + * @encryption_required : Decides to encrypt the subsystem regions or not + * @region_count : Number of regions added in this subsystem toc + * @regions_baseptr : regions base pointer of the subsystem + */ +struct minidump_subsystem { + __le32 status; + __le32 enabled; + __le32 encryption_status; + __le32 encryption_required; + __le32 region_count; + __le64 regions_baseptr; +}; + +/** + * struct minidump_global_toc - Global Table of Content + * @status : Global Minidump init status + * @md_revision : Minidump revision + * @enabled : Minidump enable status + * @subsystems : Array of subsystems toc + */ +struct minidump_global_toc { + __le32 status; + __le32 md_revision; + __le32 enabled; + struct minidump_subsystem subsystems[MAX_NUM_OF_SS]; +}; + +/** + * qcom_ss_md_mapped_base() - For getting subsystem iomapped base segment address + * for given minidump index. + * + * @minidump_id: Subsystem minidump index. + * @seg_cnt: Segment count for a given minidump index + * + * Return: On success, it returns iomapped base segment address, otherwise NULL on error. + */ +void *qcom_ss_md_mapped_base(unsigned int minidump_id, int *seg_cnt) +{ + struct minidump_global_toc *toc; + struct minidump_subsystem *subsystem; + + /* + * Get global minidump ToC and check if global table + * pointer exists and init is set. + */ + toc = qcom_smem_get(QCOM_SMEM_HOST_ANY, SBL_MINIDUMP_SMEM_ID, NULL); + if (IS_ERR(toc) || !toc->status) + return NULL; + + /* Get subsystem table of contents using the minidump id */ + subsystem = &toc->subsystems[minidump_id]; + + /** + * Collect minidump if SS ToC is valid and segment table + * is initialized in memory and encryption status is set. + */ + if (subsystem->regions_baseptr == 0 || + le32_to_cpu(subsystem->status) != 1 || + le32_to_cpu(subsystem->enabled) != MINIDUMP_SS_ENABLED || + le32_to_cpu(subsystem->encryption_status) != MINIDUMP_SS_ENCR_DONE) + return NULL; + + *seg_cnt = le32_to_cpu(subsystem->region_count); + + return ioremap((unsigned long)le64_to_cpu(subsystem->regions_baseptr), + *seg_cnt * sizeof(struct minidump_region)); +} +EXPORT_SYMBOL_GPL(qcom_ss_md_mapped_base); + +/** + * qcom_ss_valid_segment_info() - Checks segment sanity and gets it's details + * + * @ptr: Segment IO-mapped base address. + * @i: Segment index. + * @name: Segment name. + * @da: Segment physical address. + * @size: Segment size. + * + * Return: It returns 0 on success and 1 if the segment is invalid and negative + * value on error. + */ +int qcom_ss_valid_segment_info(void *ptr, int i, char **name, dma_addr_t *da, size_t *size) +{ + struct minidump_region __iomem *tmp; + struct minidump_region region; + + if (!ptr) + return -EINVAL; + + tmp = ptr; + memcpy_fromio(®ion, tmp + i, sizeof(region)); + + /* If it is not valid region, skip it */ + if (le32_to_cpu(region.valid) != MINIDUMP_REGION_VALID) + return 1; + + *name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); + if (!*name) + return -ENOMEM; + + *da = le64_to_cpu(region.address); + *size = le64_to_cpu(region.size); + + return 0; +} +EXPORT_SYMBOL_GPL(qcom_ss_valid_segment_info); + +MODULE_DESCRIPTION("Qualcomm Minidump SMEM as backend driver"); +MODULE_LICENSE("GPL"); diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h new file mode 100644 index 000000000000..d7747c27fd45 --- /dev/null +++ b/include/soc/qcom/qcom_minidump.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _QCOM_MINIDUMP_H_ +#define _QCOM_MINIDUMP_H_ + +#if IS_ENABLED(CONFIG_QCOM_MINIDUMP_SMEM) +void *qcom_ss_md_mapped_base(unsigned int minidump_id, int *seg_cnt); +int qcom_ss_valid_segment_info(void *ptr, int i, char **name, + dma_addr_t *da, size_t *size); +#else +static inline void *qcom_ss_md_mapped_base(unsigned int minidump_id, int *seg_cnt) +{ + return NULL; +} +static inline int qcom_ss_valid_segment_info(void *ptr, int i, char **name, + dma_addr_t *da, size_t *size) +{ + return -EINVAL; +} +#endif /* CONFIG_QCOM_MINIDUMP_SMEM */ +#endif /* _QCOM_MINIDUMP_H_ */ From patchwork Wed Jun 28 12:34:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 562B0EB64DC for ; Wed, 28 Jun 2023 12:36:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231424AbjF1Mgp (ORCPT ); Wed, 28 Jun 2023 08:36:45 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:48294 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231481AbjF1MgT (ORCPT ); Wed, 28 Jun 2023 08:36:19 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SCT5mO017762; Wed, 28 Jun 2023 12:35:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=reR/OBRi++6hTO4s+OJ86kHXDpuVnRYQwHnvTltWSGo=; b=gXtjStU5Py+hhGwOiJX2l5jfJutoviW8q3ypLVL8KiD0BeqWKcmOKf/+PjhEuHhs9CP9 M1k5mpzb/bGJ1IMMGS7c8clnhLKEabxwIwZH681FNrXvFG2cTkKs5NcoXRODdPGnlXid 4wnICb3Rwal3JkNr/61DVS+i58mOWONlZY2FB2YJ5caH498lK+vWB3iNRX8QPw3yl2g5 +JqLWWJknJTSnN+6FfrwO4lFpwCvh35TpNOCBfyTDAp0c7d8Y7tpaCPNkQ3Cg7ymCp0/ 6Ochk5Jyn0lqnVZ1AMZ3axQaTPaDo64iRn1MxrwFQdwm7H26ee56hjyjWsSQXWDLPGlp cg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rfrdtbq7k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:43 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZgl5023662 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:42 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:35 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 04/21] soc: qcom: Add Qualcomm APSS minidump (frontend) feature support Date: Wed, 28 Jun 2023 18:04:31 +0530 Message-ID: <1687955688-20809-5-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: oTb39OZ0yM19lZfwqLm3QZKACOst7Nyu X-Proofpoint-GUID: oTb39OZ0yM19lZfwqLm3QZKACOst7Nyu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 bulkscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Minidump is a best effort mechanism to collect useful and predefined data for first level of debugging on end user devices running on Qualcomm SoCs. It is built on the premise that System on Chip (SoC) or subsystem part of SoC crashes, due to a range of hardware and software bugs. Hence, the ability to collect accurate data is only a best-effort. The data collected could be invalid or corrupted, data collection itself could fail, and so on. Qualcomm devices in engineering mode provides a mechanism for generating full system ramdumps for post mortem debugging. But in some cases it's however not feasible to capture the entire content of RAM. The minidump mechanism provides the means for selecting region should be included in the ramdump. The solution supports extracting the ramdump/minidump produced either over USB or stored to an attached storage device. Minidump kernel driver implementation is divided into two parts for simplicity, one is minidump core which can also be called minidump frontend(As API gets exported from this driver for registration with backend) and the other part is minidump backend i.e, where the underlying implementation of minidump will be there. There could be different way how the backend is implemented like Shared memory, Memory mapped IO or Resource manager based where the guest region information is passed to hypervisor via hypercalls. Minidump Client-1 Client-2 Client-5 Client-n | | | | | | ... | ... | | | | | | | | | | | | | | | | | | | | | | | | | | +---+--------------+----+ | +-----------+ qcom_minidump(core) +--------+ | | +------+-----+------+---+ | | | | | | +---------------+ | +--------------------+ | | | | | | | | | v v v +-------------------+ +-------------------+ +------------------+ |qcom_minidump_smem | |qcom_minidump_mmio | | qcom_minidump_rm | | | | | | | +-------------------+ +-------------------+ +------------------+ Shared memory Memory mapped IO Resource manager (backend) (backend) (backend) Here, we will be giving all analogy of backend with SMEM as it is the only implemented backend at present but general idea remains the same. The core of minidump feature is part of Qualcomm's boot firmware code. It initializes shared memory (SMEM), which is a part of DDR and allocates a small section of it to minidump table i.e also called global table of content (G-ToC). Each subsystem (APSS, ADSP, ...) has their own table of segments to be included in the minidump, all references from a descriptor in SMEM (G-ToC). Each segment/region has some details like name, physical address and it's size etc. and it could be anywhere scattered in the DDR. qcom_minidump(core or frontend) driver adds the capability to add APSS region to be dumped as part of ram dump collection. It provides appropriate symbol register/unregister client regions. To simplify post mortem debugging, it creates and maintain an ELF header as first region that gets updated upon registration of a new region. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 15 + drivers/soc/qcom/Makefile | 2 + drivers/soc/qcom/qcom_minidump.c | 456 ++++++++++++++++++++++++++++++ drivers/soc/qcom/qcom_minidump_internal.h | 75 +++++ include/soc/qcom/qcom_minidump.h | 35 +++ 5 files changed, 583 insertions(+) create mode 100644 drivers/soc/qcom/qcom_minidump.c create mode 100644 drivers/soc/qcom/qcom_minidump_internal.h diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 982310b5a1cb..874ee8c3efe0 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -279,6 +279,21 @@ config QCOM_INLINE_CRYPTO_ENGINE tristate select QCOM_SCM +config QCOM_MINIDUMP + tristate "QCOM Minidump APSS Core Infrastructure" + depends on ARCH_QCOM + help + This config allow linux core infrastructure for APSS minidump for + underlying backend(smem etc.) which can hook themselves to this and + work as one unit. So, this config should be selected in combination + with its backend. + + After this Linux clients driver can register their internal data + structures and debug messages as part of the apss minidump region + and when the SoC is crashed, and these selective regions will be + dumped instead of the entire DDR. This saves significant amount + of time and/or storage space. + config QCOM_MINIDUMP_SMEM tristate "QCOM Minidump SMEM (as backend) Support" depends on ARCH_QCOM diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 89b775512bef..737d868757ac 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -34,3 +34,5 @@ obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o qcom_ice-objs += ice.o obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += qcom_ice.o +obj-$(CONFIG_QCOM_MINIDUMP) += qcom_minidump.o +obj-$(CONFIG_QCOM_MINIDUMP_SMEM) += qcom_minidump_smem.o diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c new file mode 100644 index 000000000000..7744e57843ab --- /dev/null +++ b/drivers/soc/qcom/qcom_minidump.c @@ -0,0 +1,456 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include + +#include "qcom_minidump_internal.h" + +/* + * In some of the Old Qualcomm devices, boot firmware statically allocates 300 + * as total number of supported region (including all co-processors) in + * minidump table out of which linux was using 201. In future, this limitation + * from boot firmware might get removed by allocating the region dynamically. + * So, keep it compatible with older devices, we can keep the current limit for + * Linux to 201. + */ +#define MAX_NUM_ENTRIES 201 +#define MAX_STRTBL_SIZE (MAX_NUM_ENTRIES * MAX_REGION_NAME_LENGTH) + +/* + * md_lock protects "md" during calls to qcom_minidump_backend_register(), + * qcom_minidump_backend_unregister(). + */ +static DEFINE_MUTEX(md_lock); + +/* Only one front end will be attached to one back-end */ +static struct minidump *md; +static char *md_backend; + +static struct elf_shdr *elf_shdr_entry_addr(struct elfhdr *ehdr, int idx) +{ + struct elf_shdr *eshdr = (struct elf_shdr *)((size_t)ehdr + ehdr->e_shoff); + + return &eshdr[idx]; +} + +static struct elf_phdr *elf_phdr_entry_addr(struct elfhdr *ehdr, int idx) +{ + struct elf_phdr *ephdr = (struct elf_phdr *)((size_t)ehdr + ehdr->e_phoff); + + return &ephdr[idx]; +} + +static char *elf_str_table_start(struct elfhdr *ehdr) +{ + struct elf_shdr *eshdr; + + if (ehdr->e_shstrndx == SHN_UNDEF) + return NULL; + + eshdr = elf_shdr_entry_addr(ehdr, ehdr->e_shstrndx); + return (char *)ehdr + eshdr->sh_offset; +} + +static char *elf_lookup_string(struct elfhdr *ehdr, int offset) +{ + char *strtab = elf_str_table_start(ehdr); + + if (!strtab || (md->elf.strtable_idx < offset)) + return NULL; + + return strtab + offset; +} + +static unsigned int append_str_to_strtable(struct minidump *md, const char *name) +{ + char *strtab = elf_str_table_start(md->elf.ehdr); + unsigned int old_idx = md->elf.strtable_idx; + unsigned int ret; + + if (!strtab || !name) + return 0; + + ret = old_idx; + old_idx += strscpy((strtab + old_idx), name, MAX_REGION_NAME_LENGTH); + md->elf.strtable_idx = old_idx + 1; + + return ret; +} + +static int qcom_minidump_clear_header(const struct qcom_minidump_region *region) +{ + struct elfhdr *ehdr = md->elf.ehdr; + struct elf_shdr *shdr; + struct elf_shdr *tmp_shdr; + struct elf_phdr *phdr; + struct elf_phdr *tmp_phdr; + unsigned int phidx; + unsigned int shidx; + unsigned int len; + unsigned int i; + char *shname; + + for (i = 0; i < ehdr->e_phnum; i++) { + phdr = elf_phdr_entry_addr(ehdr, i); + if (phdr->p_paddr == region->phys_addr && + phdr->p_memsz == region->size) + break; + } + + if (i == ehdr->e_phnum) { + dev_err(md->dev, "Cannot find program header entry in elf\n"); + return -EINVAL; + } + + phidx = i; + for (i = 0; i < ehdr->e_shnum; i++) { + shdr = elf_shdr_entry_addr(ehdr, i); + shname = elf_lookup_string(ehdr, shdr->sh_name); + if (shname && !strcmp(shname, region->name) && + shdr->sh_addr == (elf_addr_t)region->virt_addr && + shdr->sh_size == region->size) + break; + } + + if (i == ehdr->e_shnum) { + dev_err(md->dev, "Cannot find section header entry in elf\n"); + return -EINVAL; + } + + shidx = i; + if (shdr->sh_offset != phdr->p_offset) { + dev_err(md->dev, "Invalid entry details for region: %s\n", region->name); + return -EINVAL; + } + + /* Clear name in string table */ + len = strlen(shname) + 1; + memmove(shname, shname + len, md->elf.strtable_idx - shdr->sh_name - len); + md->elf.strtable_idx -= len; + + /* Clear program header */ + tmp_phdr = elf_phdr_entry_addr(ehdr, phidx); + for (i = phidx; i < ehdr->e_phnum - 1; i++) { + tmp_phdr = elf_phdr_entry_addr(ehdr, i + 1); + phdr = elf_phdr_entry_addr(ehdr, i); + memcpy(phdr, tmp_phdr, sizeof(struct elf_phdr)); + phdr->p_offset = phdr->p_offset - region->size; + } + memset(tmp_phdr, 0, sizeof(struct elf_phdr)); + ehdr->e_phnum--; + + /* Clear section header */ + tmp_shdr = elf_shdr_entry_addr(ehdr, shidx); + for (i = shidx; i < ehdr->e_shnum - 1; i++) { + tmp_shdr = elf_shdr_entry_addr(ehdr, i + 1); + shdr = elf_shdr_entry_addr(ehdr, i); + memcpy(shdr, tmp_shdr, sizeof(struct elf_shdr)); + shdr->sh_offset -= region->size; + shdr->sh_name -= len; + } + + memset(tmp_shdr, 0, sizeof(struct elf_shdr)); + ehdr->e_shnum--; + md->elf.elf_offset -= region->size; + + return 0; +} + +static void qcom_md_update_elf_header(const struct qcom_minidump_region *region) +{ + struct elfhdr *ehdr = md->elf.ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + + shdr = elf_shdr_entry_addr(ehdr, ehdr->e_shnum++); + phdr = elf_phdr_entry_addr(ehdr, ehdr->e_phnum++); + + shdr->sh_type = SHT_PROGBITS; + shdr->sh_name = append_str_to_strtable(md, region->name); + shdr->sh_addr = (elf_addr_t)region->virt_addr; + shdr->sh_size = region->size; + shdr->sh_flags = SHF_WRITE; + shdr->sh_offset = md->elf.elf_offset; + shdr->sh_entsize = 0; + + phdr->p_type = PT_LOAD; + phdr->p_offset = md->elf.elf_offset; + phdr->p_vaddr = (elf_addr_t)region->virt_addr; + phdr->p_paddr = region->phys_addr; + phdr->p_filesz = phdr->p_memsz = region->size; + phdr->p_flags = PF_R | PF_W; + md->elf.elf_offset += shdr->sh_size; +} + +static bool qcom_minidump_valid_region(const struct qcom_minidump_region *region) +{ + return region && + strnlen(region->name, MAX_NAME_LENGTH) < MAX_NAME_LENGTH && + region->virt_addr && + region->size && + IS_ALIGNED(region->size, 4); +} + +/** + * qcom_minidump_region_register() - Register region in APSS Minidump table. + * @region: minidump region. + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_minidump_region_register(const struct qcom_minidump_region *region) +{ + int ret; + + if (!qcom_minidump_valid_region(region)) + return -EINVAL; + + mutex_lock(&md_lock); + if (!md) { + mutex_unlock(&md_lock); + pr_err("No backend registered yet, try again.."); + return -EPROBE_DEFER; + } + + ret = md->ops->md_region_register(md, region); + if (ret) + goto unlock; + + qcom_md_update_elf_header(region); +unlock: + mutex_unlock(&md_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_minidump_region_register); + +/** + * qcom_minidump_region_unregister() - Unregister region from APSS Minidump table. + * @region: minidump region. + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_minidump_region_unregister(const struct qcom_minidump_region *region) +{ + int ret; + + if (!qcom_minidump_valid_region(region)) + return -EINVAL; + + mutex_lock(&md_lock); + if (!md) { + mutex_unlock(&md_lock); + pr_err("No backend registered yet, try again.."); + return -EPROBE_DEFER; + } + + ret = md->ops->md_region_unregister(md, region); + if (ret) + goto unlock; + + ret = qcom_minidump_clear_header(region); +unlock: + mutex_unlock(&md_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_minidump_region_unregister); + +static int qcom_minidump_add_elf_header(struct minidump *md_data) +{ + struct qcom_minidump_region elfregion; + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + unsigned int elfh_size; + unsigned int strtbl_off; + unsigned int phdr_off; + char *linux_banner; + unsigned int banner_len; + char *banner; + + linux_banner = (char *)kallsyms_lookup_name("linux_banner"); + banner_len = strlen(linux_banner); + /* + * Header buffer contains: + * ELF header, (MAX_NUM_ENTRIES + 4) of Section and Program ELF headers, + * where, 4 additional entries, one for empty header, one for string table + * one for minidump table and one for linux banner. + * + * Linux banner is stored in minidump to aid post mortem tools to determine + * the kernel version. + */ + elfh_size = sizeof(*ehdr); + elfh_size += MAX_STRTBL_SIZE; + elfh_size += banner_len + 1; + elfh_size += ((sizeof(*shdr) + sizeof(*phdr)) * (MAX_NUM_ENTRIES + 4)); + elfh_size = ALIGN(elfh_size, 4); + + md_data->elf.ehdr = devm_kzalloc(md_data->dev, elfh_size, GFP_KERNEL); + if (!md_data->elf.ehdr) + return -ENOMEM; + + ehdr = md_data->elf.ehdr; + /* Assign Section/Program headers offset */ + md_data->elf.shdr = shdr = (struct elf_shdr *)(ehdr + 1); + md_data->elf.phdr = phdr = (struct elf_phdr *)(shdr + MAX_NUM_ENTRIES); + phdr_off = sizeof(*ehdr) + (sizeof(*shdr) * MAX_NUM_ENTRIES); + + memcpy(ehdr->e_ident, ELFMAG, SELFMAG); + ehdr->e_ident[EI_CLASS] = ELF_CLASS; + ehdr->e_ident[EI_DATA] = ELF_DATA; + ehdr->e_ident[EI_VERSION] = EV_CURRENT; + ehdr->e_ident[EI_OSABI] = ELF_OSABI; + ehdr->e_type = ET_CORE; + ehdr->e_machine = ELF_ARCH; + ehdr->e_version = EV_CURRENT; + ehdr->e_ehsize = sizeof(*ehdr); + ehdr->e_phoff = phdr_off; + ehdr->e_phentsize = sizeof(*phdr); + ehdr->e_shoff = sizeof(*ehdr); + ehdr->e_shentsize = sizeof(*shdr); + ehdr->e_shstrndx = 1; + + md_data->elf.elf_offset = elfh_size; + /* + * The zeroth index of the section header is reserved and is rarely used. + * Set the section header as null (SHN_UNDEF) and move to the next one. + * 2nd Section is String table. + */ + md_data->elf.strtable_idx = 1; + strtbl_off = sizeof(*ehdr) + ((sizeof(*phdr) + sizeof(*shdr)) * MAX_NUM_ENTRIES); + shdr++; + shdr->sh_type = SHT_STRTAB; + shdr->sh_offset = (elf_addr_t)strtbl_off; + shdr->sh_size = MAX_STRTBL_SIZE; + shdr->sh_entsize = 0; + shdr->sh_flags = 0; + shdr->sh_name = append_str_to_strtable(md_data, "STR_TBL"); + shdr++; + + /* 3rd Section is Linux banner */ + banner = (char *)ehdr + strtbl_off + MAX_STRTBL_SIZE; + memcpy(banner, linux_banner, banner_len); + + shdr->sh_type = SHT_PROGBITS; + shdr->sh_offset = (elf_addr_t)(strtbl_off + MAX_STRTBL_SIZE); + shdr->sh_size = banner_len + 1; + shdr->sh_addr = (elf_addr_t)linux_banner; + shdr->sh_entsize = 0; + shdr->sh_flags = SHF_WRITE; + shdr->sh_name = append_str_to_strtable(md_data, "linux_banner"); + + phdr->p_type = PT_LOAD; + phdr->p_offset = (elf_addr_t)(strtbl_off + MAX_STRTBL_SIZE); + phdr->p_vaddr = (elf_addr_t)linux_banner; + phdr->p_paddr = virt_to_phys(linux_banner); + phdr->p_filesz = phdr->p_memsz = banner_len + 1; + phdr->p_flags = PF_R | PF_W; + + /* + * Above are some prdefined sections/program header used + * for debug, update their count here. + */ + ehdr->e_phnum = 1; + ehdr->e_shnum = 3; + + /* Register ELF header as first region */ + strscpy(elfregion.name, "KELF_HEADER", sizeof(elfregion.name)); + elfregion.virt_addr = md_data->elf.ehdr; + elfregion.phys_addr = virt_to_phys(md_data->elf.ehdr); + elfregion.size = elfh_size; + + return md_data->ops->md_region_register(md_data, &elfregion); +} + +/** + * qcom_minidump_backend_register() - Register backend minidump device. + * @md_data: minidump backend driver data + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_minidump_backend_register(struct minidump *md_data) +{ + int ret; + + if (!md_data->name || !md_data->dev || + !md_data->ops || + !md_data->ops->md_table_init || + !md_data->ops->md_region_register || + !md_data->ops->md_region_unregister || + !md_data->ops->md_table_exit) { + pr_warn("backend '%s' must fill/implement necessary fields\n", md->name); + return -EINVAL; + } + + if (md_backend && strcmp(md_backend, md_data->name)) { + pr_warn("backend '%s' already in use: ignoring '%s'\n", + md_backend, md_data->name); + return -EBUSY; + } + + mutex_lock(&md_lock); + if (md) { + dev_warn(md->dev, "backend '%s' already loaded: ignoring '%s'\n", + md->name, md_data->name); + ret = -EBUSY; + goto unlock; + } + + if (!md_data->max_region_limit || md_data->max_region_limit > MAX_NUM_ENTRIES) + md_data->max_region_limit = MAX_NUM_ENTRIES; + + ret = md_data->ops->md_table_init(md_data); + if (ret) { + dev_err(md_data->dev, "minidump backend initialization failed: %d\n", ret); + goto unlock; + } + + /* First entry would be ELF header */ + ret = qcom_minidump_add_elf_header(md_data); + if (ret) { + dev_err(md_data->dev, "Failed to add elf header: %d\n", ret); + md_data->ops->md_table_exit(md_data); + goto unlock; + } + + md = md_data; + md_backend = kstrdup(md->name, GFP_KERNEL); + dev_info(md->dev, "Registered minidump backend : %s\n", md->name); + +unlock: + mutex_unlock(&md_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_minidump_backend_register); + +/** + * qcom_minidump_backend_unregister() - Unregister backend minidump device. + * @md_data: minidump backend driver data + */ +void qcom_minidump_backend_unregister(struct minidump *md_data) +{ + mutex_lock(&md_lock); + /* Only one backend can be registered at a time. */ + if (WARN_ON(md_data != md)) + goto unlock; + + dev_info(md_data->dev, "Unregistered %s as minidump backend\n", md_data->name); + md_data->ops->md_table_exit(md_data); + kfree(md_backend); + md_backend = NULL; + md = NULL; +unlock: + mutex_unlock(&md_lock); +} +EXPORT_SYMBOL_GPL(qcom_minidump_backend_unregister); + +MODULE_DESCRIPTION("Qualcomm minidump core"); +MODULE_LICENSE("GPL"); diff --git a/drivers/soc/qcom/qcom_minidump_internal.h b/drivers/soc/qcom/qcom_minidump_internal.h new file mode 100644 index 000000000000..9031b1b0a046 --- /dev/null +++ b/drivers/soc/qcom/qcom_minidump_internal.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _QCOM_MINIDUMP_INTERNAL_H_ +#define _QCOM_MINIDUMP_INTERNAL_H_ + +#include +#include + +#define MAX_REGION_NAME_LENGTH 16 + +struct minidump; +/** + * struct minidump_ops - APSS Minidump operation structure, each underlying + * backend need to add their hooks to it. + * + * @md_table_init: Get the hold of APSS minidump table for the backend + * and initialize it with details. + * @md_table_exit: Clean up the stuff populated while md_table_init() + * @md_region_register: Callback to register the region at the backend. + * @md_region_unregister: Callback to unregister the region at the backend. + */ +struct minidump_ops { + int (*md_table_init)(struct minidump *md); + int (*md_table_exit)(struct minidump *md); + int (*md_region_register)(struct minidump *md, + const struct qcom_minidump_region *region); + int (*md_region_unregister)(struct minidump *md, + const struct qcom_minidump_region *region); +}; + +/** + * struct minidump_elfhdr - Minidump table elf header + * @ehdr: elf main header + * @shdr: Section header + * @phdr: Program header + * @elf_offset: Section offset in elf + * @strtable_idx: String table current index position + */ +struct minidump_elfhdr { + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + size_t elf_offset; + size_t strtable_idx; +}; + +/** + * struct minidump - Qualcomm minidump core information + * @name : Minidump backend name + * @ops : set of callback need to be implemented + * @elf : Minidump elf header + * @dev : Minidump backend device + * @max_num_limit : Maximum number of region limit + * @apss_data : Backend driver's private data pointer + */ +struct minidump { + const char *name; + struct minidump_ops *ops; + struct minidump_elfhdr elf; + struct device *dev; + unsigned int max_region_limit; + void *apss_data; +}; + +#if IS_ENABLED(CONFIG_QCOM_MINIDUMP) +int qcom_minidump_backend_register(struct minidump *md); +void qcom_minidump_backend_unregister(struct minidump *md); +#else +int qcom_minidump_backend_register(struct minidump *md) { return 0; } +void qcom_minidump_backend_unregister(struct minidump *md) {} +#endif /* CONFIG_QCOM_MINIDUMP */ +#endif /* _QCOM_MINIDUMP_INTERNAL_H_ */ diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h index d7747c27fd45..d0bebc3daac5 100644 --- a/include/soc/qcom/qcom_minidump.h +++ b/include/soc/qcom/qcom_minidump.h @@ -1,11 +1,46 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* + * This file contains data structure which should be used by the + * APSS minidump clients. + * * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef _QCOM_MINIDUMP_H_ #define _QCOM_MINIDUMP_H_ +#define MAX_NAME_LENGTH 12 +/** + * struct qcom_minidump_region - APSS Minidump region information + * + * @name: Entry name, Minidump will dump binary with this name. + * @virt_addr: Virtual address of the entry. + * @phys_addr: Physical address of the entry to dump. + * @size: Number of byte to dump from @address location, + * and it should be 4 byte aligned. + */ +struct qcom_minidump_region { + char name[MAX_NAME_LENGTH]; + void *virt_addr; + phys_addr_t phys_addr; + size_t size; +}; + +#if IS_ENABLED(CONFIG_QCOM_MINIDUMP) +int qcom_minidump_region_register(const struct qcom_minidump_region *region); +int qcom_minidump_region_unregister(const struct qcom_minidump_region *region); +#else +static inline int qcom_minidump_region_register(const struct qcom_minidump_region *region) +{ + /* Return quietly, if minidump is not enabled */ + return 0; +} +static inline int qcom_minidump_region_unregister(const struct qcom_minidump_region *region) +{ + return 0; +} +#endif /* CONFIG_QCOM_MINIDUMP */ + #if IS_ENABLED(CONFIG_QCOM_MINIDUMP_SMEM) void *qcom_ss_md_mapped_base(unsigned int minidump_id, int *seg_cnt); int qcom_ss_valid_segment_info(void *ptr, int i, char **name, From patchwork Wed Jun 28 12:34:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CDACC001B0 for ; Wed, 28 Jun 2023 12:36:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231443AbjF1Mgk (ORCPT ); Wed, 28 Jun 2023 08:36:40 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:44466 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231361AbjF1MgO (ORCPT ); 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Wed, 28 Jun 2023 12:35:50 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZnc5023752 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:49 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:42 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 05/21] soc: qcom: Add linux minidump smem backend driver support Date: Wed, 28 Jun 2023 18:04:32 +0530 Message-ID: <1687955688-20809-6-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: kVGVTzD2a7UtHGXgP73bXyhZaBJfOJMh X-Proofpoint-GUID: kVGVTzD2a7UtHGXgP73bXyhZaBJfOJMh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 spamscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 mlxscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add shared memory based minidump backend driver and hook it with minidump core (qcom_minidump) by registering SMEM as backend device. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 8 +- drivers/soc/qcom/qcom_minidump_smem.c | 231 +++++++++++++++++++++++++++++++++- drivers/soc/qcom/smem.c | 9 ++ 3 files changed, 240 insertions(+), 8 deletions(-) diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 874ee8c3efe0..1834213fd652 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -298,8 +298,12 @@ config QCOM_MINIDUMP_SMEM tristate "QCOM Minidump SMEM (as backend) Support" depends on ARCH_QCOM depends on QCOM_SMEM + select QCOM_MINIDUMP help Enablement of core minidump feature is controlled from boot firmware - side, and this config allow linux to query minidump segments associated - with the remote processor and check its validity. + side, and this config allow linux to query and manages minidump + table for remote processors as well as APSS. + + This config should be enabled if the low level minidump is implemented + as part of SMEM. endmenu diff --git a/drivers/soc/qcom/qcom_minidump_smem.c b/drivers/soc/qcom/qcom_minidump_smem.c index b588833ea26e..bdc75aa2f518 100644 --- a/drivers/soc/qcom/qcom_minidump_smem.c +++ b/drivers/soc/qcom/qcom_minidump_smem.c @@ -2,18 +2,34 @@ /* * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include +#include +#include +#include #include #include -#include +#include +#include #include -#include + +#include "qcom_minidump_internal.h" #define MAX_NUM_OF_SS 10 -#define MAX_REGION_NAME_LENGTH 16 #define SBL_MINIDUMP_SMEM_ID 602 -#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) -#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) -#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) + +#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_REGION_INVALID ('I' << 24 | 'N' << 16 | 'V' << 8 | 'A' << 0) +#define MINIDUMP_REGION_INIT ('I' << 24 | 'N' << 16 | 'I' << 8 | 'T' << 0) +#define MINIDUMP_REGION_NOINIT 0 + +#define MINIDUMP_SS_ENCR_REQ (0 << 24 | 'Y' << 16 | 'E' << 8 | 'S' << 0) +#define MINIDUMP_SS_ENCR_NOTREQ (0 << 24 | 0 << 16 | 'N' << 8 | 'R' << 0) +#define MINIDUMP_SS_ENCR_START ('S' << 24 | 'T' << 16 | 'R' << 8 | 'T' << 0) +#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) + +#define MINIDUMP_APSS_DESC 0 /** * struct minidump_region - Minidump region @@ -64,6 +80,16 @@ struct minidump_global_toc { }; /** + * struct minidump_ss_data - Minidump subsystem private data + * @md_ss_toc : Application Subsystem TOC pointer + * @md_regions : Application Subsystem region base pointer + */ +struct minidump_ss_data { + struct minidump_subsystem *md_ss_toc; + struct minidump_region *md_regions; +}; + +/** * qcom_ss_md_mapped_base() - For getting subsystem iomapped base segment address * for given minidump index. * @@ -143,5 +169,198 @@ int qcom_ss_valid_segment_info(void *ptr, int i, char **name, dma_addr_t *da, si } EXPORT_SYMBOL_GPL(qcom_ss_valid_segment_info); +static int smem_md_get_region_index(struct minidump_ss_data *mdss_data, + const struct qcom_minidump_region *region) +{ + struct minidump_subsystem *mdss_toc = mdss_data->md_ss_toc; + struct minidump_region *mdr; + unsigned int i; + unsigned int count; + + count = le32_to_cpu(mdss_toc->region_count); + for (i = 0; i < count; i++) { + mdr = &mdss_data->md_regions[i]; + if (!strcmp(mdr->name, region->name)) + return i; + } + + return -ENOENT; +} + +static void smem_md_add_region(struct minidump_ss_data *mdss_data, + const struct qcom_minidump_region *region) +{ + struct minidump_subsystem *mdss_toc = mdss_data->md_ss_toc; + struct minidump_region *mdr; + unsigned int region_cnt; + + region_cnt = le32_to_cpu(mdss_toc->region_count); + mdr = &mdss_data->md_regions[region_cnt]; + strscpy(mdr->name, region->name, sizeof(mdr->name)); + mdr->address = cpu_to_le64(region->phys_addr); + mdr->size = cpu_to_le64(region->size); + mdr->valid = cpu_to_le32(MINIDUMP_REGION_VALID); + region_cnt++; + mdss_toc->region_count = cpu_to_le32(region_cnt); +} + +static int smem_md_region_register(struct minidump *md, + const struct qcom_minidump_region *region) +{ + struct minidump_ss_data *mdss_data = md->apss_data; + struct minidump_subsystem *mdss_toc = mdss_data->md_ss_toc; + unsigned int num_region; + int ret; + + ret = smem_md_get_region_index(mdss_data, region); + if (ret >= 0) { + dev_info(md->dev, "%s region is already registered\n", region->name); + return -EEXIST; + } + + /* Check if there is a room for a new entry */ + num_region = le32_to_cpu(mdss_toc->region_count); + if (num_region >= md->max_region_limit) { + dev_err(md->dev, "maximum region limit %u reached\n", num_region); + return -ENOSPC; + } + + smem_md_add_region(mdss_data, region); + + return 0; +} + +static int smem_md_region_unregister(struct minidump *md, + const struct qcom_minidump_region *region) +{ + struct minidump_ss_data *mdss_data = md->apss_data; + struct minidump_subsystem *mdss_toc = mdss_data->md_ss_toc; + struct minidump_region *mdr; + unsigned int region_cnt; + unsigned int idx; + int ret; + + ret = smem_md_get_region_index(mdss_data, region); + if (ret < 0) { + dev_err(md->dev, "%s region is not present\n", region->name); + return ret; + } + + idx = ret; + mdr = &mdss_data->md_regions[0]; + region_cnt = le32_to_cpu(mdss_toc->region_count); + /* + * Left shift all the regions exist after this removed region + * index by 1 to fill the gap and zero out the last region + * present at the end. + */ + memmove(&mdr[idx], &mdr[idx + 1], + (region_cnt - idx - 1) * sizeof(struct minidump_region)); + memset(&mdr[region_cnt - 1], 0, sizeof(struct minidump_region)); + region_cnt--; + mdss_toc->region_count = cpu_to_le32(region_cnt); + + return 0; +} + +static int smem_md_table_init(struct minidump *md) +{ + struct minidump_global_toc *mdgtoc; + struct minidump_ss_data *mdss_data; + struct minidump_subsystem *mdss_toc; + size_t size; + int ret; + + mdgtoc = qcom_smem_get(QCOM_SMEM_HOST_ANY, SBL_MINIDUMP_SMEM_ID, &size); + if (IS_ERR(mdgtoc)) { + ret = PTR_ERR(mdgtoc); + dev_err(md->dev, "Couldn't find minidump smem item: %d\n", ret); + return ret; + } + + if (size < sizeof(mdgtoc) || !mdgtoc->status) { + ret = -EINVAL; + dev_err(md->dev, "minidump table is not initialized: %d\n", ret); + return ret; + } + + mdss_data = devm_kzalloc(md->dev, sizeof(*mdss_data), GFP_KERNEL); + if (!mdss_data) + return -ENOMEM; + + mdss_data->md_ss_toc = &mdgtoc->subsystems[MINIDUMP_APSS_DESC]; + mdss_data->md_regions = devm_kcalloc(md->dev, md->max_region_limit, + sizeof(struct minidump_region), GFP_KERNEL); + if (!mdss_data->md_regions) + return -ENOMEM; + + mdss_toc = mdss_data->md_ss_toc; + mdss_toc->regions_baseptr = cpu_to_le64(virt_to_phys(mdss_data->md_regions)); + mdss_toc->enabled = cpu_to_le32(MINIDUMP_SS_ENABLED); + mdss_toc->status = cpu_to_le32(1); + mdss_toc->region_count = cpu_to_le32(0); + + /* Tell bootloader not to encrypt the regions of this subsystem */ + mdss_toc->encryption_status = cpu_to_le32(MINIDUMP_SS_ENCR_DONE); + mdss_toc->encryption_required = cpu_to_le32(MINIDUMP_SS_ENCR_NOTREQ); + md->apss_data = mdss_data; + + return 0; +} + +static int smem_md_table_exit(struct minidump *md) +{ + struct minidump_ss_data *mdss_data; + + mdss_data = md->apss_data; + memset(mdss_data->md_ss_toc, + cpu_to_le32(0), sizeof(struct minidump_subsystem)); + + return 0; +} + +static struct minidump_ops smem_md_ops = { + .md_table_init = smem_md_table_init, + .md_table_exit = smem_md_table_exit, + .md_region_register = smem_md_region_register, + .md_region_unregister = smem_md_region_unregister, +}; + +static int qcom_minidump_smem_probe(struct platform_device *pdev) +{ + struct minidump *md; + + md = devm_kzalloc(&pdev->dev, sizeof(*md), GFP_KERNEL); + if (!md) + return -ENOMEM; + + md->dev = &pdev->dev; + md->ops = &smem_md_ops; + md->name = "smem"; + platform_set_drvdata(pdev, md); + + return qcom_minidump_backend_register(md); +} + +static int qcom_minidump_smem_remove(struct platform_device *pdev) +{ + struct minidump *md = platform_get_drvdata(pdev); + + qcom_minidump_backend_unregister(md); + + return 0; +} + +static struct platform_driver qcom_minidump_smem_driver = { + .probe = qcom_minidump_smem_probe, + .remove = qcom_minidump_smem_remove, + .driver = { + .name = "qcom-minidump-smem", + }, +}; + +module_platform_driver(qcom_minidump_smem_driver); + MODULE_DESCRIPTION("Qualcomm Minidump SMEM as backend driver"); MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:qcom-minidump-smem"); diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c index 6be7ea93c78c..af582aa7f9a3 100644 --- a/drivers/soc/qcom/smem.c +++ b/drivers/soc/qcom/smem.c @@ -269,6 +269,7 @@ struct smem_region { * @partitions: list of partitions of current processor/host * @item_count: max accepted item number * @socinfo: platform device pointer + * @minidump: minidump platform device pointer * @num_regions: number of @regions * @regions: list of the memory regions defining the shared memory */ @@ -279,6 +280,7 @@ struct qcom_smem { u32 item_count; struct platform_device *socinfo; + struct platform_device *minidump; struct smem_ptable *ptable; struct smem_partition global_partition; struct smem_partition partitions[SMEM_HOST_COUNT]; @@ -1151,11 +1153,18 @@ static int qcom_smem_probe(struct platform_device *pdev) if (IS_ERR(smem->socinfo)) dev_dbg(&pdev->dev, "failed to register socinfo device\n"); + smem->minidump = platform_device_register_data(&pdev->dev, "qcom-minidump-smem", + PLATFORM_DEVID_NONE, NULL, + 0); + if (IS_ERR(smem->minidump)) + dev_dbg(&pdev->dev, "failed to register minidump device\n"); + return 0; } static int qcom_smem_remove(struct platform_device *pdev) { + platform_device_unregister(__smem->minidump); platform_device_unregister(__smem->socinfo); hwspin_lock_free(__smem->hwlock); From patchwork Wed Jun 28 12:34:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C806AC001DB for ; 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Wed, 28 Jun 2023 12:35:57 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCZuhK029721 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:35:56 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:49 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 06/21] soc: qcom: minidump: Add pending region registration support Date: Wed, 28 Jun 2023 18:04:33 +0530 Message-ID: <1687955688-20809-7-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: n2xHEv_GvbGRgwFkrml1q7DhTpJMKIKO X-Proofpoint-ORIG-GUID: n2xHEv_GvbGRgwFkrml1q7DhTpJMKIKO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Pending regions are those apss minidump regions which came for registration before minidump was initialized or ready to do register the region. We can add regions to pending region list and register them from apss minidump driver probe in one go. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_minidump.c | 87 ++++++++++++++++++++++++++++--- drivers/soc/qcom/qcom_minidump_internal.h | 20 +++++++ 2 files changed, 99 insertions(+), 8 deletions(-) diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c index 7744e57843ab..cfdb63cc29d6 100644 --- a/drivers/soc/qcom/qcom_minidump.c +++ b/drivers/soc/qcom/qcom_minidump.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,10 @@ static DEFINE_MUTEX(md_lock); /* Only one front end will be attached to one back-end */ static struct minidump *md; static char *md_backend; +static struct minidump_plist md_plist = { + .plist = LIST_HEAD_INIT(md_plist.plist), + .pregion_cnt = 0, +}; static struct elf_shdr *elf_shdr_entry_addr(struct elfhdr *ehdr, int idx) { @@ -201,6 +206,26 @@ static bool qcom_minidump_valid_region(const struct qcom_minidump_region *region IS_ALIGNED(region->size, 4); } +static struct minidump_pregion * +check_if_pending_region_exist(const struct qcom_minidump_region *region) +{ + struct minidump_pregion *md_pregion; + struct minidump_pregion *tmp; + bool found = false; + + list_for_each_entry_safe(md_pregion, tmp, &md_plist.plist, list) { + struct qcom_minidump_region *md_region; + + md_region = &md_pregion->region; + if (!strcmp(md_region->name, region->name)) { + found = true; + break; + } + } + + return found ? md_pregion : NULL; +} + /** * qcom_minidump_region_register() - Register region in APSS Minidump table. * @region: minidump region. @@ -209,16 +234,40 @@ static bool qcom_minidump_valid_region(const struct qcom_minidump_region *region */ int qcom_minidump_region_register(const struct qcom_minidump_region *region) { - int ret; + struct minidump_pregion *md_pregion; + int ret = 0; if (!qcom_minidump_valid_region(region)) return -EINVAL; mutex_lock(&md_lock); if (!md) { - mutex_unlock(&md_lock); - pr_err("No backend registered yet, try again.."); - return -EPROBE_DEFER; + if (md_plist.pregion_cnt >= MAX_NUM_ENTRIES - 1) { + pr_err("maximum region limit %u reached\n", md_plist.pregion_cnt); + ret = -ENOSPC; + goto unlock; + } + + md_pregion = check_if_pending_region_exist(region); + if (md_pregion) { + pr_info("%s region is already exist\n", region->name); + ret = -EEXIST; + goto unlock; + } + /* + * Maintain a list of client regions which came before + * minidump driver was ready and once it is ready, + * register them in one go from minidump probe function. + */ + md_pregion = kzalloc(sizeof(*md_pregion), GFP_KERNEL); + if (!md_pregion) { + ret = -ENOMEM; + goto unlock; + } + md_pregion->region = *region; + list_add_tail(&md_pregion->list, &md_plist.plist); + md_plist.pregion_cnt++; + goto unlock; } ret = md->ops->md_region_register(md, region); @@ -240,16 +289,22 @@ EXPORT_SYMBOL_GPL(qcom_minidump_region_register); */ int qcom_minidump_region_unregister(const struct qcom_minidump_region *region) { - int ret; + struct minidump_pregion *md_pregion; + int ret = 0; if (!qcom_minidump_valid_region(region)) return -EINVAL; mutex_lock(&md_lock); if (!md) { - mutex_unlock(&md_lock); - pr_err("No backend registered yet, try again.."); - return -EPROBE_DEFER; + md_pregion = check_if_pending_region_exist(region); + if (!md_pregion) + goto unlock; + + list_del(&md_pregion->list); + kfree(md_pregion); + md_plist.pregion_cnt--; + goto unlock; } ret = md->ops->md_region_unregister(md, region); @@ -378,6 +433,8 @@ static int qcom_minidump_add_elf_header(struct minidump *md_data) */ int qcom_minidump_backend_register(struct minidump *md_data) { + struct minidump_pregion *md_pregion; + struct minidump_pregion *tmp; int ret; if (!md_data->name || !md_data->dev || @@ -425,6 +482,20 @@ int qcom_minidump_backend_register(struct minidump *md_data) md_backend = kstrdup(md->name, GFP_KERNEL); dev_info(md->dev, "Registered minidump backend : %s\n", md->name); + list_for_each_entry_safe(md_pregion, tmp, &md_plist.plist, list) { + struct qcom_minidump_region *region; + + region = &md_pregion->region; + ret = md->ops->md_region_register(md, region); + if (ret) + goto unlock; + + qcom_md_update_elf_header(region); + list_del(&md_pregion->list); + kfree(md_pregion); + md_plist.pregion_cnt--; + } + unlock: mutex_unlock(&md_lock); return ret; diff --git a/drivers/soc/qcom/qcom_minidump_internal.h b/drivers/soc/qcom/qcom_minidump_internal.h index 9031b1b0a046..6993e3be10c2 100644 --- a/drivers/soc/qcom/qcom_minidump_internal.h +++ b/drivers/soc/qcom/qcom_minidump_internal.h @@ -65,6 +65,26 @@ struct minidump { void *apss_data; }; +/** + * struct minidump_pregion - Minidump pending region + * @list : Pending region list pointer + * @region : APSS minidump client region + */ +struct minidump_pregion { + struct list_head list; + struct qcom_minidump_region region; +}; + +/** + * struct minidump_plist - Minidump pending region list + * @plist : List of pending region to be registered + * @pregion_cnt : Count of the pending region to be registered + */ +struct minidump_plist { + struct list_head plist; + int pregion_cnt; +}; + #if IS_ENABLED(CONFIG_QCOM_MINIDUMP) int qcom_minidump_backend_register(struct minidump *md); void qcom_minidump_backend_unregister(struct minidump *md); From patchwork Wed Jun 28 12:34:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05343EB64DC for ; Wed, 28 Jun 2023 12:37:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232125AbjF1Mhs (ORCPT ); Wed, 28 Jun 2023 08:37:48 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:62976 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231267AbjF1Mgg (ORCPT ); Wed, 28 Jun 2023 08:36:36 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35S7R01b029236; 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Wed, 28 Jun 2023 12:36:03 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:35:56 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 07/21] soc: qcom: minidump: Add update region support Date: Wed, 28 Jun 2023 18:04:34 +0530 Message-ID: <1687955688-20809-8-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pJ9iiLd8x4SKlSEio83461EBkiGyS2qz X-Proofpoint-ORIG-GUID: pJ9iiLd8x4SKlSEio83461EBkiGyS2qz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 mlxscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support to update client's region physical/virtual addresses, which is useful for dynamic loadable modules, dynamic address changing clients like if we want to collect current stack information for each core and the current stack is changing on each sched_switch event, So here virtual/physical address of the current stack is changing. So, to cover such use cases add the update region support in minidump driver and the corresponding smem backend support. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_minidump.c | 55 +++++++++++++++++++++++++++++++ drivers/soc/qcom/qcom_minidump_internal.h | 3 ++ drivers/soc/qcom/qcom_minidump_smem.c | 21 ++++++++++++ include/soc/qcom/qcom_minidump.h | 5 +++ 4 files changed, 84 insertions(+) diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c index cfdb63cc29d6..37d6ceb4d85c 100644 --- a/drivers/soc/qcom/qcom_minidump.c +++ b/drivers/soc/qcom/qcom_minidump.c @@ -318,6 +318,61 @@ int qcom_minidump_region_unregister(const struct qcom_minidump_region *region) } EXPORT_SYMBOL_GPL(qcom_minidump_region_unregister); +/** + * qcom_minidump_update_region() - Update region information with new physical + * address and virtual address for already registered region e.g, current task + * stack for a core keeps on changing on each context switch, there it needs to + * change registered region with new updated addresses. + * + * @region: Should be already registered minidump region. + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_minidump_update_region(const struct qcom_minidump_region *region) +{ + struct minidump_pregion *md_pregion; + struct qcom_minidump_region *tmp; + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + int idx; + int ret = 0; + + if (!qcom_minidump_valid_region(region)) + return -EINVAL; + + mutex_lock(&md_lock); + if (!md) { + md_pregion = check_if_pending_region_exist(region); + if (!md_pregion) { + ret = -ENOENT; + goto unlock; + } + tmp = &md_pregion->region; + tmp->phys_addr = region->phys_addr; + tmp->virt_addr = region->virt_addr; + goto unlock; + } + + ret = md->ops->md_update_region(md, &idx, region); + if (ret) + goto unlock; + + /* Skip predefined shdr/phdr header entry at the start */ + ehdr = md->elf.ehdr; + shdr = elf_shdr_entry_addr(ehdr, idx + 4); + phdr = elf_phdr_entry_addr(ehdr, idx + 1); + + shdr->sh_addr = (elf_addr_t)region->virt_addr; + phdr->p_vaddr = (elf_addr_t)region->virt_addr; + phdr->p_paddr = region->phys_addr; + +unlock: + mutex_unlock(&md_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_minidump_update_region); + static int qcom_minidump_add_elf_header(struct minidump *md_data) { struct qcom_minidump_region elfregion; diff --git a/drivers/soc/qcom/qcom_minidump_internal.h b/drivers/soc/qcom/qcom_minidump_internal.h index 6993e3be10c2..dc1e76c1f063 100644 --- a/drivers/soc/qcom/qcom_minidump_internal.h +++ b/drivers/soc/qcom/qcom_minidump_internal.h @@ -21,6 +21,7 @@ struct minidump; * @md_table_exit: Clean up the stuff populated while md_table_init() * @md_region_register: Callback to register the region at the backend. * @md_region_unregister: Callback to unregister the region at the backend. + * @md_update_region: Callback to update address of already registered regions. */ struct minidump_ops { int (*md_table_init)(struct minidump *md); @@ -29,6 +30,8 @@ struct minidump_ops { const struct qcom_minidump_region *region); int (*md_region_unregister)(struct minidump *md, const struct qcom_minidump_region *region); + int (*md_update_region)(struct minidump *md, int *idx, + const struct qcom_minidump_region *region); }; /** diff --git a/drivers/soc/qcom/qcom_minidump_smem.c b/drivers/soc/qcom/qcom_minidump_smem.c index bdc75aa2f518..9d4021a5e4c8 100644 --- a/drivers/soc/qcom/qcom_minidump_smem.c +++ b/drivers/soc/qcom/qcom_minidump_smem.c @@ -263,6 +263,26 @@ static int smem_md_region_unregister(struct minidump *md, return 0; } +static int smem_md_update_region(struct minidump *md, int *idx, + const struct qcom_minidump_region *region) +{ + struct minidump_ss_data *mdss_data = md->apss_data; + struct minidump_region *mdr; + int ret; + + ret = smem_md_get_region_index(mdss_data, region); + if (ret < 0) { + dev_err(md->dev, "%s region is not present\n", region->name); + return ret; + } + + *idx = ret; + mdr = &mdss_data->md_regions[*idx]; + mdr->address = cpu_to_le64(region->phys_addr); + + return 0; +} + static int smem_md_table_init(struct minidump *md) { struct minidump_global_toc *mdgtoc; @@ -324,6 +344,7 @@ static struct minidump_ops smem_md_ops = { .md_table_exit = smem_md_table_exit, .md_region_register = smem_md_region_register, .md_region_unregister = smem_md_region_unregister, + .md_update_region = smem_md_update_region, }; static int qcom_minidump_smem_probe(struct platform_device *pdev) diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h index d0bebc3daac5..a86b0313698f 100644 --- a/include/soc/qcom/qcom_minidump.h +++ b/include/soc/qcom/qcom_minidump.h @@ -29,6 +29,7 @@ struct qcom_minidump_region { #if IS_ENABLED(CONFIG_QCOM_MINIDUMP) int qcom_minidump_region_register(const struct qcom_minidump_region *region); int qcom_minidump_region_unregister(const struct qcom_minidump_region *region); +int qcom_minidump_update_region(const struct qcom_minidump_region *region); #else static inline int qcom_minidump_region_register(const struct qcom_minidump_region *region) { @@ -39,6 +40,10 @@ static inline int qcom_minidump_region_unregister(const struct qcom_minidump_reg { return 0; } +static inline int qcom_minidump_update_region(const struct qcom_minidump_region *region) +{ + return 0; +} #endif /* CONFIG_QCOM_MINIDUMP */ #if IS_ENABLED(CONFIG_QCOM_MINIDUMP_SMEM) From patchwork Wed Jun 28 12:34:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7FC7EB64DD for ; Wed, 28 Jun 2023 12:37:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232155AbjF1Mhu (ORCPT ); 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Wed, 28 Jun 2023 12:36:10 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCa9Mb024209 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:09 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:03 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 08/21] dt-bindings: reserved-memory: Add qcom,ramoops binding Date: Wed, 28 Jun 2023 18:04:35 +0530 Message-ID: <1687955688-20809-9-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lMrIh8eaOsYycp--0WBftOdLtQt8YtVb X-Proofpoint-ORIG-GUID: lMrIh8eaOsYycp--0WBftOdLtQt8YtVb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm ramoops minidump logger provide a means of storing the ramoops data to some dynamically reserved memory instead of traditionally implemented ramoops where the region should be statically fixed ram region. Its device tree binding would be exactly same as ramoops device tree binding and is going to contain traditional ramoops frontend data and this content will be collected via Qualcomm minidump infrastructure provided from the boot firmware. Signed-off-by: Mukesh Ojha --- .../devicetree/bindings/soc/qcom/qcom,ramoops.yaml | 126 +++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,ramoops.yaml diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,ramoops.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,ramoops.yaml new file mode 100644 index 000000000000..b1fdcf3f8ad4 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,ramoops.yaml @@ -0,0 +1,126 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/qcom,ramoops.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Ramoops minidump logger + +description: | + Qualcomm ramoops minidump logger provide a means of storing the ramoops + data to some dynamically reserved memory instead of traditionally + implemented ramoops where the region should be statically fixed ram + region. Because of its similarity with ramoops it will also have same + set of property what ramoops have it in its schema and is going to + contain traditional ramoops frontend data and this region will be + collected via Qualcomm minidump infrastructure provided from the + boot firmware. + +maintainers: + - Mukesh Ojha + +properties: + compatible: + items: + - enum: + - qcom,sm8450-ramoops + - const: qcom,ramoops + + memory-region: + maxItems: 1 + description: handle to memory reservation for qcom,ramoops region. + + ecc-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: enables ECC support and specifies ECC buffer size in bytes + default: 0 # no ECC + + record-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: maximum size in bytes of each kmsg dump + default: 0 + + console-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: size in bytes of log buffer reserved for kernel messages + default: 0 + + ftrace-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: size in bytes of log buffer reserved for function tracing and profiling + default: 0 + + pmsg-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: size in bytes of log buffer reserved for userspace messages + default: 0 + + mem-type: + $ref: /schemas/types.yaml#/definitions/uint32 + description: if present, sets the type of mapping is to be used to map the reserved region. + default: 0 + oneOf: + - const: 0 + description: write-combined + - const: 1 + description: unbuffered + - const: 2 + description: cached + + max-reason: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 2 # log oopses and panics + maximum: 0x7fffffff + description: | + If present, sets maximum type of kmsg dump reasons to store. + This can be set to INT_MAX to store all kmsg dumps. + See include/linux/kmsg_dump.h KMSG_DUMP_* for other kmsg dump reason values. + Setting this to 0 (KMSG_DUMP_UNDEF), means the reason filtering will be + controlled by the printk.always_kmsg_dump boot param. + If unset, it will be 2 (KMSG_DUMP_OOPS), otherwise 5 (KMSG_DUMP_MAX). + + flags: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: | + If present, pass ramoops behavioral flags + (see include/linux/pstore_ram.h RAMOOPS_FLAG_* for flag values). + + no-dump-oops: + deprecated: true + type: boolean + description: | + Use max_reason instead. If present, and max_reason is not specified, + it is equivalent to max_reason = 1 (KMSG_DUMP_PANIC). + + unbuffered: + deprecated: true + type: boolean + description: | + Use mem_type instead. If present, and mem_type is not specified, + it is equivalent to mem_type = 1 and uses unbuffered mappings to map + the reserved region (defaults to buffered mappings mem_type = 0). + If both are specified -- "mem_type" overrides "unbuffered". + +unevaluatedProperties: false + +required: + - compatible + - memory-region + +anyOf: + - required: [record-size] + - required: [console-size] + - required: [ftrace-size] + - required: [pmsg-size] + +examples: + - | + + qcom_ramoops { + compatible = "qcom,sm8450-ramoops", "qcom,ramoops"; + memory-region = <&qcom_ramoops_region>; + console-size = <0x8000>; /* 32kB */ + record-size = <0x400>; /* 1kB */ + ecc-size = <16>; + }; From patchwork Wed Jun 28 12:34:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B543C00528 for ; Wed, 28 Jun 2023 12:37:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232173AbjF1Mhv (ORCPT ); Wed, 28 Jun 2023 08:37:51 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:63716 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231821AbjF1Mgg (ORCPT ); Wed, 28 Jun 2023 08:36:36 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SB2tG3012176; Wed, 28 Jun 2023 12:36:18 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=P2QBL+7zGMKDj1s/OV57kLVSn1SCcUja5763zLo1cZM=; b=d9tPUeWHLHRKTfxZHWo6EMSVNoJA21gzQQKvkikc5/i8hxvN0fk38LK8oZLeX7bOovnD OwRtaDyoVhj0OSEIwjk4naLKtRaI+LpwjySwbcRkItMc/cLOB2ihwZUQW2vGhOip3hAe 9cS15yWyV00EiH5mtq1fbz8PGF2uFr9nMDyA6RyV2VkLH52ysfnYHCeAJzmiKpIpgPe1 DKGM1tOiKhZPo4/Cx+9Zue7I0ElwpGI5C3vsKFiWiPAmmz1IxNf9/0lLfX8tO+kZf19o RtoTE3uE5YDuc0N8Y1eEDmXeE2yH7rDp3mo6iknjgYp9fgSSgC9XTCPnWf2BjE0XQH90 mA== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgetpgw5s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:17 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCaGEs024716 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:16 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:10 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 09/21] pstore/ram : Export ramoops_parse_dt() symbol Date: Wed, 28 Jun 2023 18:04:36 +0530 Message-ID: <1687955688-20809-10-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ZoEjWss5MTUTidHK6qRrwbz1QzIG9cbn X-Proofpoint-GUID: ZoEjWss5MTUTidHK6qRrwbz1QzIG9cbn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It is possible if some driver do not want ramoops region to be static instead it sets up the mem_address and mem_size and use everything what this driver has to offer. To offer this convenience export ramoops_parse_dt() function. Signed-off-by: Mukesh Ojha --- fs/pstore/ram.c | 26 ++++++++++++++++++-------- include/linux/pstore_ram.h | 2 ++ 2 files changed, 20 insertions(+), 8 deletions(-) diff --git a/fs/pstore/ram.c b/fs/pstore/ram.c index ade66dbe5f39..6bb66d044bef 100644 --- a/fs/pstore/ram.c +++ b/fs/pstore/ram.c @@ -638,7 +638,7 @@ static int ramoops_parse_dt_u32(struct platform_device *pdev, return 0; } -static int ramoops_parse_dt(struct platform_device *pdev, +int ramoops_parse_dt(struct platform_device *pdev, struct ramoops_platform_data *pdata) { struct device_node *of_node = pdev->dev.of_node; @@ -649,15 +649,24 @@ static int ramoops_parse_dt(struct platform_device *pdev, dev_dbg(&pdev->dev, "using Device Tree\n"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, - "failed to locate DT /reserved-memory resource\n"); - return -EINVAL; + /* + * It is possible if some driver do not want ramoops + * region to be static instead it sets up the mem_address + * and mem_size and use everything what this driver has + * to offer. + */ + if (!pdata->mem_address && !pdata->mem_size) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, + "failed to locate DT /reserved-memory resource\n"); + return -EINVAL; + } + + pdata->mem_size = resource_size(res); + pdata->mem_address = res->start; } - pdata->mem_size = resource_size(res); - pdata->mem_address = res->start; /* * Setting "unbuffered" is deprecated and will be ignored if * "mem_type" is also specified. @@ -713,6 +722,7 @@ static int ramoops_parse_dt(struct platform_device *pdev, return 0; } +EXPORT_SYMBOL_GPL(ramoops_parse_dt); static int ramoops_probe(struct platform_device *pdev) { diff --git a/include/linux/pstore_ram.h b/include/linux/pstore_ram.h index 9d65ff94e216..55df4e631a25 100644 --- a/include/linux/pstore_ram.h +++ b/include/linux/pstore_ram.h @@ -8,6 +8,7 @@ #ifndef __LINUX_PSTORE_RAM_H__ #define __LINUX_PSTORE_RAM_H__ +#include #include struct persistent_ram_ecc_info { @@ -39,4 +40,5 @@ struct ramoops_platform_data { struct persistent_ram_ecc_info ecc_info; }; +int ramoops_parse_dt(struct platform_device *, struct ramoops_platform_data *); #endif From patchwork Wed Jun 28 12:34:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5A1FC001B0 for ; Wed, 28 Jun 2023 12:39:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231989AbjF1MjQ (ORCPT ); Wed, 28 Jun 2023 08:39:16 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]:35612 "EHLO mx0a-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231993AbjF1MhN (ORCPT ); Wed, 28 Jun 2023 08:37:13 -0400 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SBBFbJ018314; Wed, 28 Jun 2023 12:36:24 GMT DKIM-Signature: v=1; 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Wed, 28 Jun 2023 12:36:23 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:16 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 10/21] soc: qcom: Add qcom's pstore minidump driver support Date: Wed, 28 Jun 2023 18:04:37 +0530 Message-ID: <1687955688-20809-11-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: o27mVxlRyUT0vrSiZbVQV3GHBpbdK86u X-Proofpoint-ORIG-GUID: o27mVxlRyUT0vrSiZbVQV3GHBpbdK86u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 clxscore=1015 suspectscore=0 bulkscore=0 malwarescore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This driver was inspired from the fact pstore ram region should be fixed and boot firmware need to have awarness about this region, so that it will be persistent across boot. But, there are many QCOM SoC which does not support warm boot from hardware but they have minidump support from the software, and for them, there is no need of this pstore ram region to be fixed, but at the same time have interest in the pstore frontends data. So, this driver get the dynamic reserved region from the ram and register the ramoops platform device. +---------+ +---------+ +--------+ +---------+ | console | | pmsg | | ftrace | | dmesg | +---------+ +---------+ +--------+ +---------+ | | | | | | | | +------------------------------------------+ | \ / +----------------+ (1) |pstore frontends| +----------------+ | \ / +------------------- + (2) | pstore backend(ram)| +--------------------+ | \ / +--------------------+ (3) |qcom_pstore_minidump| +--------------------+ | \ / +---------------+ (4) | qcom_minidump | +---------------+ This driver will route all the pstore front data to the stored in qcom pstore reserved region and the reason of showing an arrow from (3) to (4) as qcom_pstore_minidump driver will register all the available frontends region with qcom minidump driver in upcoming patch. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 12 +++++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qcom_pstore_minidump.c | 85 +++++++++++++++++++++++++++++++++ 3 files changed, 98 insertions(+) create mode 100644 drivers/soc/qcom/qcom_pstore_minidump.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 1834213fd652..fbf08e30feda 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -306,4 +306,16 @@ config QCOM_MINIDUMP_SMEM This config should be enabled if the low level minidump is implemented as part of SMEM. + +config QCOM_PSTORE_MINIDUMP + tristate "Pstore support for QCOM Minidump" + depends on ARCH_QCOM + depends on PSTORE_RAM + depends on QCOM_MINIDUMP + help + Enablement of this driver ensures that ramoops region can be anywhere + reserved in ram instead of being fixed address which needs boot firmware + awareness. So, this driver creates plaform device and registers available + frontend region with the Qualcomm's minidump driver. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 737d868757ac..1ab59c1b364d 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -36,3 +36,4 @@ qcom_ice-objs += ice.o obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += qcom_ice.o obj-$(CONFIG_QCOM_MINIDUMP) += qcom_minidump.o obj-$(CONFIG_QCOM_MINIDUMP_SMEM) += qcom_minidump_smem.o +obj-$(CONFIG_QCOM_PSTORE_MINIDUMP) += qcom_pstore_minidump.o diff --git a/drivers/soc/qcom/qcom_pstore_minidump.c b/drivers/soc/qcom/qcom_pstore_minidump.c new file mode 100644 index 000000000000..b07cd10340df --- /dev/null +++ b/drivers/soc/qcom/qcom_pstore_minidump.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include + +struct qcom_ramoops_dd { + struct ramoops_platform_data qcom_ramoops_pdata; + struct platform_device *ramoops_pdev; +}; + +static int qcom_ramoops_probe(struct platform_device *pdev) +{ + struct device_node *of_node = pdev->dev.of_node; + struct qcom_ramoops_dd *qcom_rdd; + struct ramoops_platform_data *pdata; + struct reserved_mem *rmem; + struct device_node *node; + long ret; + + node = of_parse_phandle(of_node, "memory-region", 0); + if (!node) + return -ENODEV; + + rmem = of_reserved_mem_lookup(node); + of_node_put(node); + if (!rmem) { + dev_err(&pdev->dev, "failed to locate DT /reserved-memory resource\n"); + return -EINVAL; + } + + qcom_rdd = devm_kzalloc(&pdev->dev, sizeof(*qcom_rdd), GFP_KERNEL); + if (!qcom_rdd) + return -ENOMEM; + + pdata = &qcom_rdd->qcom_ramoops_pdata; + pdata->mem_size = rmem->size; + pdata->mem_address = rmem->base; + ramoops_parse_dt(pdev, pdata); + + qcom_rdd->ramoops_pdev = platform_device_register_data(NULL, "ramoops", -1, + pdata, sizeof(*pdata)); + if (IS_ERR(qcom_rdd->ramoops_pdev)) { + ret = PTR_ERR(qcom_rdd->ramoops_pdev); + dev_err(&pdev->dev, "could not create platform device: %ld\n", ret); + qcom_rdd->ramoops_pdev = NULL; + } + platform_set_drvdata(pdev, qcom_rdd); + + return ret; +} + +static void qcom_ramoops_remove(struct platform_device *pdev) +{ + struct qcom_ramoops_dd *qcom_rdd = platform_get_drvdata(pdev); + + platform_device_unregister(qcom_rdd->ramoops_pdev); + qcom_rdd->ramoops_pdev = NULL; +} + +static const struct of_device_id qcom_ramoops_of_match[] = { + { .compatible = "qcom,ramoops"}, + {} +}; +MODULE_DEVICE_TABLE(of, qcom_ramoops_of_match); + +static struct platform_driver qcom_ramoops_drv = { + .driver = { + .name = "qcom,ramoops", + .of_match_table = qcom_ramoops_of_match, + }, + .probe = qcom_ramoops_probe, + .remove_new = qcom_ramoops_remove, +}; + +module_platform_driver(qcom_ramoops_drv); + +MODULE_DESCRIPTION("Qualcomm ramoops minidump driver"); +MODULE_LICENSE("GPL"); From patchwork Wed Jun 28 12:34:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27F35EB64DC for ; Wed, 28 Jun 2023 12:38:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231937AbjF1Mio (ORCPT ); Wed, 28 Jun 2023 08:38:44 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]:25678 "EHLO mx0a-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231946AbjF1MhC (ORCPT ); Wed, 28 Jun 2023 08:37:02 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SCOe3T014964; Wed, 28 Jun 2023 12:36:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; 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Wed, 28 Jun 2023 12:36:30 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:23 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 11/21] soc: qcom: Register pstore frontend region with minidump Date: Wed, 28 Jun 2023 18:04:38 +0530 Message-ID: <1687955688-20809-12-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: x6ZlZc7YHcNUisVbetG2IdTSFdzK1QbR X-Proofpoint-ORIG-GUID: x6ZlZc7YHcNUisVbetG2IdTSFdzK1QbR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 adultscore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since qcom_pstore_minidump driver creates platform device for qualcomm devices, so it knows the physical addresses of the frontend region now. Let's register the regions with qcom_minidump driver. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_pstore_minidump.c | 131 +++++++++++++++++++++++++++++++- 1 file changed, 128 insertions(+), 3 deletions(-) diff --git a/drivers/soc/qcom/qcom_pstore_minidump.c b/drivers/soc/qcom/qcom_pstore_minidump.c index b07cd10340df..f17384dd2d72 100644 --- a/drivers/soc/qcom/qcom_pstore_minidump.c +++ b/drivers/soc/qcom/qcom_pstore_minidump.c @@ -9,12 +9,120 @@ #include #include #include +#include struct qcom_ramoops_dd { struct ramoops_platform_data qcom_ramoops_pdata; struct platform_device *ramoops_pdev; + struct device *dev; + struct qcom_minidump_region **dmesg_region; + struct qcom_minidump_region *console_region; + struct qcom_minidump_region *pmsg_region; + struct qcom_minidump_region **ftrace_region; + unsigned int max_dump_cnt; + unsigned int max_ftrace_cnt; }; +static int qcom_ramoops_md_region_register(struct device *dev, struct qcom_minidump_region **zone, + const char *name, phys_addr_t phys_addr, + unsigned long size) +{ + struct qcom_minidump_region *md_region; + int ret; + + if (!size) + return 0; + + md_region = devm_kzalloc(dev, sizeof(*md_region), GFP_KERNEL); + if (!md_region) + return -ENOMEM; + + strscpy(md_region->name, name, sizeof(md_region->name)); + md_region->phys_addr = phys_addr; + md_region->virt_addr = phys_to_virt(phys_addr); + md_region->size = size; + *zone = md_region; + ret = qcom_minidump_region_register(md_region); + if (ret) + dev_err(dev, "failed to add %s in minidump: err: %d\n", name, ret); + + return ret; +} + +static int qcom_ramoops_minidump_register(struct qcom_ramoops_dd *qcom_rdd) +{ + struct ramoops_platform_data *pdata = &qcom_rdd->qcom_ramoops_pdata; + char name[MAX_NAME_LENGTH]; + size_t zone_sz; + phys_addr_t phys_addr; + int ret = 0; + int i; + + phys_addr = pdata->mem_address; + for (i = 0; i < qcom_rdd->max_dump_cnt; i++) { + scnprintf(name, sizeof(name), "KDMSG%d", i); + ret = qcom_ramoops_md_region_register(qcom_rdd->dev, + &qcom_rdd->dmesg_region[i], name, phys_addr, + pdata->record_size); + if (ret) + return ret; + + phys_addr += pdata->record_size; + } + + ret = qcom_ramoops_md_region_register(qcom_rdd->dev, + &qcom_rdd->console_region, "KCONSOLE", phys_addr, + pdata->console_size); + if (ret) + return ret; + + phys_addr += pdata->console_size; + + ret = qcom_ramoops_md_region_register(qcom_rdd->dev, + &qcom_rdd->pmsg_region, "KPMSG", phys_addr, + pdata->pmsg_size); + if (ret) + return ret; + + phys_addr += pdata->pmsg_size; + + zone_sz = pdata->ftrace_size / qcom_rdd->max_ftrace_cnt; + for (i = 0; i < qcom_rdd->max_ftrace_cnt; i++) { + ret = qcom_ramoops_md_region_register(qcom_rdd->dev, + &qcom_rdd->ftrace_region[i], "KFTRACE", phys_addr, + zone_sz); + if (ret) + return ret; + + phys_addr += zone_sz; + } + + return ret; +} + +static void qcom_ramoops_minidump_unregister(struct qcom_ramoops_dd *qcom_rdd) +{ + struct ramoops_platform_data *pdata; + int i; + + pdata = &qcom_rdd->qcom_ramoops_pdata; + if (pdata->record_size) { + for (i = 0; i < qcom_rdd->max_dump_cnt; i++) + qcom_minidump_region_unregister(qcom_rdd->dmesg_region[i]); + } + + if (pdata->console_size) + qcom_minidump_region_unregister(qcom_rdd->console_region); + + if (pdata->pmsg_size) + qcom_minidump_region_unregister(qcom_rdd->pmsg_region); + + if (pdata->ftrace_size) { + for (i = 0; i < qcom_rdd->max_ftrace_cnt; i++) + qcom_minidump_region_unregister(qcom_rdd->ftrace_region[i]); + } +} + static int qcom_ramoops_probe(struct platform_device *pdev) { struct device_node *of_node = pdev->dev.of_node; @@ -22,6 +130,7 @@ static int qcom_ramoops_probe(struct platform_device *pdev) struct ramoops_platform_data *pdata; struct reserved_mem *rmem; struct device_node *node; + size_t dump_mem_sz; long ret; node = of_parse_phandle(of_node, "memory-region", 0); @@ -39,27 +148,43 @@ static int qcom_ramoops_probe(struct platform_device *pdev) if (!qcom_rdd) return -ENOMEM; + qcom_rdd->dev = &pdev->dev; pdata = &qcom_rdd->qcom_ramoops_pdata; pdata->mem_size = rmem->size; pdata->mem_address = rmem->base; - ramoops_parse_dt(pdev, pdata); - + ret = ramoops_parse_dt(pdev, pdata); + if (ret < 0) + return ret; + + dump_mem_sz = pdata->mem_size - pdata->console_size - pdata->ftrace_size + - pdata->pmsg_size; + if (!dump_mem_sz || !pdata->record_size) + qcom_rdd->max_dump_cnt = 0; + else + qcom_rdd->max_dump_cnt = dump_mem_sz / pdata->record_size; + + qcom_rdd->max_ftrace_cnt = (pdata->flags & RAMOOPS_FLAG_FTRACE_PER_CPU) + ? nr_cpu_ids + : 1; qcom_rdd->ramoops_pdev = platform_device_register_data(NULL, "ramoops", -1, pdata, sizeof(*pdata)); if (IS_ERR(qcom_rdd->ramoops_pdev)) { ret = PTR_ERR(qcom_rdd->ramoops_pdev); dev_err(&pdev->dev, "could not create platform device: %ld\n", ret); qcom_rdd->ramoops_pdev = NULL; + return ret; } + platform_set_drvdata(pdev, qcom_rdd); - return ret; + return qcom_ramoops_minidump_register(qcom_rdd); } static void qcom_ramoops_remove(struct platform_device *pdev) { struct qcom_ramoops_dd *qcom_rdd = platform_get_drvdata(pdev); + qcom_ramoops_minidump_unregister(qcom_rdd); platform_device_unregister(qcom_rdd->ramoops_pdev); qcom_rdd->ramoops_pdev = NULL; } From patchwork Wed Jun 28 12:34:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBF5AC001E0 for ; Wed, 28 Jun 2023 12:38:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232444AbjF1Mil (ORCPT ); Wed, 28 Jun 2023 08:38:41 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:19726 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231920AbjF1Mg5 (ORCPT ); Wed, 28 Jun 2023 08:36:57 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35S6A6Mp009106; Wed, 28 Jun 2023 12:36:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=djE97bwYNjcxAluIW2+Cfgiqlpbzj4NG+dPedZwtHls=; b=ZkqpxLSH9zR99JHx/OcyvykWqTnmoepPGhrHscWSAH3MpiJDNeYbGbmpyKbIULzsDvyd iMHPWOX0HXTt02oNetLKgrcmEPkuY3dnjKnEECKhcOoaHmJc80noGp9EXrrcUL3/6KFP o/lbMeGYZx6MmELU2UbIcjjgWtTvq1LR5YIUYG3epD6TuRpSfSHgBeEDtpgTjLvwi3wu hnhOu7IMXR+9t7wrwthveErQVZ+rv4BCveiBe3WAx7vz31PsiT2NpYXXeC1KuvZI/Gm9 HT1bMY0fKig8EfaeL4Q1orQ5kKYXEOBUQ1B7xhMpFlEDncMZm5IGd9Gx0XzEXfu9F/Jg IQ== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgemk0x78-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:38 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCab3x026965 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:37 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:30 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 12/21] remoteproc: qcom: Expand MD_* as MINIDUMP_* Date: Wed, 28 Jun 2023 18:04:39 +0530 Message-ID: <1687955688-20809-13-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: I06AKbz5qS12S7u74FTJu05S2HG2AFk- X-Proofpoint-ORIG-GUID: I06AKbz5qS12S7u74FTJu05S2HG2AFk- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Expand MD_* as MINIDUMP_* which makes more sense than the abbreviation. Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_common.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index a0d4238492e9..805e525df3b5 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -29,9 +29,9 @@ #define MAX_NUM_OF_SS 10 #define MAX_REGION_NAME_LENGTH 16 #define SBL_MINIDUMP_SMEM_ID 602 -#define MD_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) -#define MD_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) -#define MD_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) +#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) /** * struct minidump_region - Minidump region @@ -125,7 +125,7 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy for (i = 0; i < seg_cnt; i++) { memcpy_fromio(®ion, ptr + i, sizeof(region)); - if (le32_to_cpu(region.valid) == MD_REGION_VALID) { + if (le32_to_cpu(region.valid) == MINIDUMP_REGION_VALID) { name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); if (!name) { iounmap(ptr); @@ -168,8 +168,8 @@ void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, */ if (subsystem->regions_baseptr == 0 || le32_to_cpu(subsystem->status) != 1 || - le32_to_cpu(subsystem->enabled) != MD_SS_ENABLED || - le32_to_cpu(subsystem->encryption_status) != MD_SS_ENCR_DONE) { + le32_to_cpu(subsystem->enabled) != MINIDUMP_SS_ENABLED || + le32_to_cpu(subsystem->encryption_status) != MINIDUMP_SS_ENCR_DONE) { dev_err(&rproc->dev, "Minidump not ready, skipping\n"); return; } From patchwork Wed Jun 28 12:34:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1D72C001B0 for ; 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Wed, 28 Jun 2023 12:36:45 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCaiuY008625 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:44 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:37 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 13/21] remoterproc: qcom: refactor to leverage exported minidump symbol Date: Wed, 28 Jun 2023 18:04:40 +0530 Message-ID: <1687955688-20809-14-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: c0s6xSyHVbDjNhTuabGX7nTgJRy1rqii X-Proofpoint-GUID: c0s6xSyHVbDjNhTuabGX7nTgJRy1rqii X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org There is no need remoteproc code(driver/remoteproc/qcom_common.c) to know about minidump data structure layout instead it should better use the minidump exported symbol to get the required information. Refactor the qcom_minidump() function and remove the minidump related data structure from driver/remoteproc/qcom_common.c . Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_common.c | 142 +++++++-------------------------------- 1 file changed, 25 insertions(+), 117 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index 805e525df3b5..24e8b692cd2c 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "remoteproc_internal.h" #include "qcom_common.h" @@ -26,61 +27,6 @@ #define to_smd_subdev(d) container_of(d, struct qcom_rproc_subdev, subdev) #define to_ssr_subdev(d) container_of(d, struct qcom_rproc_ssr, subdev) -#define MAX_NUM_OF_SS 10 -#define MAX_REGION_NAME_LENGTH 16 -#define SBL_MINIDUMP_SMEM_ID 602 -#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) -#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) -#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) - -/** - * struct minidump_region - Minidump region - * @name : Name of the region to be dumped - * @seq_num: : Use to differentiate regions with same name. - * @valid : This entry to be dumped (if set to 1) - * @address : Physical address of region to be dumped - * @size : Size of the region - */ -struct minidump_region { - char name[MAX_REGION_NAME_LENGTH]; - __le32 seq_num; - __le32 valid; - __le64 address; - __le64 size; -}; - -/** - * struct minidump_subsystem - Subsystem's SMEM Table of content - * @status : Subsystem toc init status - * @enabled : if set to 1, this region would be copied during coredump - * @encryption_status: Encryption status for this subsystem - * @encryption_required : Decides to encrypt the subsystem regions or not - * @region_count : Number of regions added in this subsystem toc - * @regions_baseptr : regions base pointer of the subsystem - */ -struct minidump_subsystem { - __le32 status; - __le32 enabled; - __le32 encryption_status; - __le32 encryption_required; - __le32 region_count; - __le64 regions_baseptr; -}; - -/** - * struct minidump_global_toc - Global Table of Content - * @status : Global Minidump init status - * @md_revision : Minidump revision - * @enabled : Minidump enable status - * @subsystems : Array of subsystems toc - */ -struct minidump_global_toc { - __le32 status; - __le32 md_revision; - __le32 enabled; - struct minidump_subsystem subsystems[MAX_NUM_OF_SS]; -}; - struct qcom_ssr_subsystem { const char *name; struct srcu_notifier_head notifier_list; @@ -101,85 +47,47 @@ static void qcom_minidump_cleanup(struct rproc *rproc) } } -static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsystem *subsystem, - void (*rproc_dumpfn_t)(struct rproc *rproc, struct rproc_dump_segment *segment, - void *dest, size_t offset, size_t size)) +void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, + void (*rproc_dumpfn_t)(struct rproc *rproc, + struct rproc_dump_segment *segment, void *dest, size_t offset, + size_t size)) { - struct minidump_region __iomem *ptr; - struct minidump_region region; - int seg_cnt, i; dma_addr_t da; size_t size; + int seg_cnt; char *name; + void *ptr; + int ret; + int i; if (WARN_ON(!list_empty(&rproc->dump_segments))) { dev_err(&rproc->dev, "dump segment list already populated\n"); - return -EUCLEAN; + return; } - seg_cnt = le32_to_cpu(subsystem->region_count); - ptr = ioremap((unsigned long)le64_to_cpu(subsystem->regions_baseptr), - seg_cnt * sizeof(struct minidump_region)); + ptr = qcom_ss_md_mapped_base(minidump_id, &seg_cnt); if (!ptr) - return -EFAULT; + return; for (i = 0; i < seg_cnt; i++) { - memcpy_fromio(®ion, ptr + i, sizeof(region)); - if (le32_to_cpu(region.valid) == MINIDUMP_REGION_VALID) { - name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); - if (!name) { - iounmap(ptr); - return -ENOMEM; - } - da = le64_to_cpu(region.address); - size = le64_to_cpu(region.size); - rproc_coredump_add_custom_segment(rproc, da, size, rproc_dumpfn_t, name); + ret = qcom_ss_valid_segment_info(ptr, i, &name, &da, &size); + if (ret < 0) { + iounmap(ptr); + dev_err(&rproc->dev, + "Failed with error: %d while adding minidump entries\n", + ret); + goto clean_minidump; } - } - - iounmap(ptr); - return 0; -} - -void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, - void (*rproc_dumpfn_t)(struct rproc *rproc, - struct rproc_dump_segment *segment, void *dest, size_t offset, - size_t size)) -{ - int ret; - struct minidump_subsystem *subsystem; - struct minidump_global_toc *toc; - - /* Get Global minidump ToC*/ - toc = qcom_smem_get(QCOM_SMEM_HOST_ANY, SBL_MINIDUMP_SMEM_ID, NULL); - - /* check if global table pointer exists and init is set */ - if (IS_ERR(toc) || !toc->status) { - dev_err(&rproc->dev, "Minidump TOC not found in SMEM\n"); - return; - } - /* Get subsystem table of contents using the minidump id */ - subsystem = &toc->subsystems[minidump_id]; - - /** - * Collect minidump if SS ToC is valid and segment table - * is initialized in memory and encryption status is set. - */ - if (subsystem->regions_baseptr == 0 || - le32_to_cpu(subsystem->status) != 1 || - le32_to_cpu(subsystem->enabled) != MINIDUMP_SS_ENABLED || - le32_to_cpu(subsystem->encryption_status) != MINIDUMP_SS_ENCR_DONE) { - dev_err(&rproc->dev, "Minidump not ready, skipping\n"); - return; + /* if it is a valid segment */ + if (!ret) + rproc_coredump_add_custom_segment(rproc, da, size, + rproc_dumpfn_t, name); } - ret = qcom_add_minidump_segments(rproc, subsystem, rproc_dumpfn_t); - if (ret) { - dev_err(&rproc->dev, "Failed with error: %d while adding minidump entries\n", ret); - goto clean_minidump; - } + iounmap(ptr); rproc_coredump_using_sections(rproc); + clean_minidump: qcom_minidump_cleanup(rproc); } From patchwork Wed Jun 28 12:34:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1336C001DB for ; Wed, 28 Jun 2023 12:39:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232636AbjF1MjR (ORCPT ); Wed, 28 Jun 2023 08:39:17 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:35192 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232001AbjF1MhP (ORCPT ); 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Wed, 28 Jun 2023 12:36:52 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCapLE025340 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:51 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:44 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 14/21] MAINTAINERS: Add entry for minidump driver related support Date: Wed, 28 Jun 2023 18:04:41 +0530 Message-ID: <1687955688-20809-15-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: K4JMMEe9pinGGLQoI6BjoAoext74H8Hs X-Proofpoint-ORIG-GUID: K4JMMEe9pinGGLQoI6BjoAoext74H8Hs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 mlxlogscore=977 impostorscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the entries for all the files added as a part qualcomm minidump driver support. Signed-off-by: Mukesh Ojha --- MAINTAINERS | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a82795114ad4..8cbbe3e662e5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17551,6 +17551,14 @@ S: Maintained F: Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml F: drivers/regulator/vqmmc-ipq4019-regulator.c +QUALCOMM MINIDUMP DRIVER +M: Mukesh Ojha +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: Documentation/admin-guide/qcom_minidump.rst +F: drivers/soc/qcom/qcom_minidump.c +F: drivers/soc/qcom/qcom_minidump_smem.c + QUALCOMM NAND CONTROLLER DRIVER M: Manivannan Sadhasivam L: linux-mtd@lists.infradead.org @@ -17559,6 +17567,13 @@ S: Maintained F: Documentation/devicetree/bindings/mtd/qcom,nandc.yaml F: drivers/mtd/nand/raw/qcom_nandc.c +QUALCOMM PSTORE MINIDUMP DRIVER +M: Mukesh Ojha +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: drivers/soc/qcom/qcom_pstore_minidump.c +F: Documentation/devicetree/bindings/soc/qcom/qcom,ramoops.yaml + QUALCOMM RMNET DRIVER M: Subash Abhinov Kasiviswanathan M: Sean Tranchetti From patchwork Wed Jun 28 12:34:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82131EB64D7 for ; Wed, 28 Jun 2023 12:39:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232718AbjF1Mjl (ORCPT ); Wed, 28 Jun 2023 08:39:41 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:36182 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232018AbjF1MhR (ORCPT ); Wed, 28 Jun 2023 08:37:17 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SAcRSt000997; Wed, 28 Jun 2023 12:37:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=KAy0dDEQPIdnGKN2nXiyLNVCeTxTN4ebpmPagwN0fjI=; b=Qmny8C65ILTdFtje80edUb4ALz7tmy+1V7WUUrlanuDn/LU20D4TToNpxUda+gt0AtjM hB9iLQnTPoh7ssh42ylbSBIuoo8ILwKtbzbW0mYt6qh9B6tvt1Pze++RJIXg1NKsIibC YeAUpuQovhKni126GpJg+I4+DDwz/2Swjg75oTkk17X4TnHkesge6gdXyIzymVVvWV82 MVZubNDX5uc/GwsncZp1iUfzv+1paOY2JUF2EiSZHzMmCceshPcvaahvjIKn/cJEt78J PzKgZVySf211qc0e+X87BigDutJ0nT178pAt9mvprLqZvR4lp94ujoYGCq1rjAQdI/uW Rg== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgetpgw6x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:59 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCawgB001666 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:36:58 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:51 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 15/21] arm64: defconfig: Enable Qualcomm Minidump related drivers Date: Wed, 28 Jun 2023 18:04:42 +0530 Message-ID: <1687955688-20809-16-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: pwVBtz3NNSnWi7-Xb-Wr7yb4JUxjTDLQ X-Proofpoint-GUID: pwVBtz3NNSnWi7-Xb-Wr7yb4JUxjTDLQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 mlxlogscore=863 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable QCOM_MINIDUMP_SMEM backend driver which automatically selects QCOM_MINIDUMP core for its functionality to work. While at it, also enable clients of minidump driver which is QCOM_PSTORE_MINIDUMP that uses PSTORE_RAM and PSTORE_CONSOLE to capture console logs into minidump. Signed-off-by: Mukesh Ojha --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a24609e14d50..9a47c9ec0391 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1250,6 +1250,8 @@ CONFIG_QCOM_STATS=m CONFIG_QCOM_WCNSS_CTRL=m CONFIG_QCOM_APR=m CONFIG_QCOM_ICC_BWMON=m +CONFIG_QCOM_MINIDUMP_SMEM=m +CONFIG_QCOM_PSTORE_MINIDUMP=m CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77951=y @@ -1445,6 +1447,8 @@ CONFIG_HUGETLBFS=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y CONFIG_SQUASHFS=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_RAM=y CONFIG_NFS_FS=y CONFIG_NFS_V4=y CONFIG_NFS_V4_1=y From patchwork Wed Jun 28 12:34:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 272B2C001B0 for ; Wed, 28 Jun 2023 12:39:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232767AbjF1Mjp (ORCPT ); Wed, 28 Jun 2023 08:39:45 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:41794 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231190AbjF1MhY (ORCPT ); Wed, 28 Jun 2023 08:37:24 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SCQhnK017176; Wed, 28 Jun 2023 12:37:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=U9YcbtW13rSnb+eJW5/EwukE3syszirXrljsJPnuYiE=; b=pTs2+cqG0aIGf0MxNi1esLfl19T+FW5ol56Sidi7p3jNWkzG5slIz76M7qMVtJD91Ka9 9cW1s6dxmdzP9Hz1yYSkaRP2RKFy9p2kIhTDtyWwyus4KEPl4Y41ca+0hH0X28pZUTJz 2j4t47eCkxz3i1Lq+VCqs001YT40EMpHgkIsNt1cpzlZOEWbkS2l9VoiSYhdAAmlC83G /ptf7z8ZaCAw9XzQOomrECa4i/vYhtkYZDt1bxis9qunSiQZHO0Db5/fZZtwf67SV0M2 nI0gdplNGGn58zdtxQUkC2+4R5fSwNHlnwzfvG7Q1OJnrXmFW+4pdxB4EYylAJsMdgxK iw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgemk0x7w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:06 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCb5Yl001788 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:05 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:36:59 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 16/21] arm64: dts: qcom: sm8450: Add Qualcomm ramoops minidump node Date: Wed, 28 Jun 2023 18:04:43 +0530 Message-ID: <1687955688-20809-17-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Xxc5kBzwneapvXCcAtwYDi2X0zb4Fq1n X-Proofpoint-ORIG-GUID: Xxc5kBzwneapvXCcAtwYDi2X0zb4Fq1n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 mlxlogscore=975 impostorscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This enable dynamic reserve memory for Qualcomm ramoops device, which will be used to save ramoops frontend data and this region gets dumped on crash via Qualcomm's minidump infrastructure. qcom_pstore_minidump is the associated driver for this node. Signed-off-by: Mukesh Ojha --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d59ea8ee7111..0b1dedee606b 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -390,6 +390,12 @@ }; }; + ramoops-minidump { + compatible = "qcom,sm8450-ramoops", "qcom,ramoops"; + console-size = <0x200000>; + memory-region = <&qcom_ramoops>; + }; + reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -623,6 +629,12 @@ reg = <0x0 0xed900000 0x0 0x3b00000>; no-map; }; + + qcom_ramoops: ramoops { + alloc-ranges = <0x0 0x00000000 0xffffffff 0xffffffff>; + size = <0x0 0x200000>; + no-map; + }; }; smp2p-adsp { From patchwork Wed Jun 28 12:34:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B9B7EB64DA for ; Wed, 28 Jun 2023 12:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232758AbjF1Mjo (ORCPT ); Wed, 28 Jun 2023 08:39:44 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:50678 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232100AbjF1Mhd (ORCPT ); Wed, 28 Jun 2023 08:37:33 -0400 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SCQcpx013316; Wed, 28 Jun 2023 12:37:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=voO1wmpy58Dpce/ayyfsuuOHNRZFLt28O+ScPtTvxDU=; b=U2rtcJ/ZAL/atIwFCGFN28JlUInAruvSQINjwU6cgKCnlNO/TkrNkoGv+VKQcpOHJJfv RILmfmti9Y7TjfEhmV70HaMrg+QOa7IRDDccOX3afk/MT7sPAnw5oRy0HkqAjuOtxR9A 5V24edg0RnlO7sWp/tmsackW0JgVYNklXdBW6amoEjHu1mYv2U0YCWY2z4OPGSr3s2/x PQJOJFehWkWJEnUI3PiObxYO0z2qDeyGyUsOU/DppVptiEsOfz3KR7o79xZ9TlZBP3d5 lPZr3eEFRpW0vFpcVmZvxeof+dWcgTM3WjDKG2Uw0slxAtBtu+s+O1HAsWXRaF+FNTP1 Hg== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rfrdtbqa0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:13 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCbCFL002061 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:12 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:37:05 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 17/21] firmware: qcom_scm: provide a read-modify-write function Date: Wed, 28 Jun 2023 18:04:44 +0530 Message-ID: <1687955688-20809-18-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: vfaykQFcelw4SH3fZYkfHb4aTKdaVkU3 X-Proofpoint-GUID: vfaykQFcelw4SH3fZYkfHb4aTKdaVkU3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 suspectscore=0 phishscore=0 mlxlogscore=797 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 bulkscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It was realized by Srinivas K. that there is a need of read-modify-write scm exported function so that it can be used by multiple clients. Let's introduce qcom_scm_io_update_field() which masks out the bits and write the passed value to that bit-offset. Subsequent patch will use this function. Suggested-by: Srinivas Kandagatla Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 15 +++++++++++++++ include/linux/firmware/qcom/qcom_scm.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index fde33acd46b7..104d86e49b97 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -407,6 +407,21 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val) +{ + unsigned int old, new; + int ret; + + ret = qcom_scm_io_readl(addr, &old); + if (ret) + return ret; + + new = (old & ~mask) | (val & mask); + + return qcom_scm_io_writel(addr, new); +} +EXPORT_SYMBOL(qcom_scm_io_update_field); + static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) { struct qcom_scm_desc desc = { diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index 250ea4efb7cb..ca41e4eb33ad 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, + unsigned int val); extern bool qcom_scm_restore_sec_cfg_available(void); extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); From patchwork Wed Jun 28 12:34:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E62BEB64DC for ; Wed, 28 Jun 2023 12:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232744AbjF1Mjn (ORCPT ); Wed, 28 Jun 2023 08:39:43 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]:52800 "EHLO mx0b-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231706AbjF1Mhg (ORCPT ); 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Wed, 28 Jun 2023 12:37:20 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCbJPk028450 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:19 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:37:12 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 18/21] pinctrl: qcom: Use qcom_scm_io_update_field() Date: Wed, 28 Jun 2023 18:04:45 +0530 Message-ID: <1687955688-20809-19-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: LkvDYJLcaIHW74S5BXOR2kSeIJcmyq30 X-Proofpoint-GUID: LkvDYJLcaIHW74S5BXOR2kSeIJcmyq30 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 mlxlogscore=903 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use qcom_scm_io_update_field() exported function introduced in last commit. Acked-by: Linus Walleij Signed-off-by: Mukesh Ojha --- drivers/pinctrl/qcom/pinctrl-msm.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index c5f52d4f7781..f31b54bf98e4 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1041,6 +1041,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) const struct msm_pingroup *g; unsigned long flags; bool was_enabled; + u32 mask; u32 val; if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) { @@ -1075,23 +1076,20 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) * With intr_target_use_scm interrupts are routed to * application cpu using scm calls. */ + mask = (GENMASK(2, 0) << g->intr_target_bit); if (pctrl->intr_target_use_scm) { u32 addr = pctrl->phys_base[0] + g->intr_target_reg; int ret; - qcom_scm_io_readl(addr, &val); - - val &= ~(7 << g->intr_target_bit); - val |= g->intr_target_kpss_val << g->intr_target_bit; - - ret = qcom_scm_io_writel(addr, val); + val = g->intr_target_kpss_val << g->intr_target_bit; + ret = qcom_scm_io_update_field(addr, mask, val); if (ret) dev_err(pctrl->dev, "Failed routing %lu interrupt to Apps proc", d->hwirq); } else { val = msm_readl_intr_target(pctrl, g); - val &= ~(7 << g->intr_target_bit); + val &= ~mask; val |= g->intr_target_kpss_val << g->intr_target_bit; msm_writel_intr_target(val, pctrl, g); } From patchwork Wed Jun 28 12:34:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6412FEB64DA for ; Wed, 28 Jun 2023 12:41:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232330AbjF1Mk4 (ORCPT ); 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Wed, 28 Jun 2023 12:37:27 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCbQ4m028510 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:26 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:37:19 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 19/21] firmware: scm: Modify only the download bits in TCSR register Date: Wed, 28 Jun 2023 18:04:46 +0530 Message-ID: <1687955688-20809-20-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: rZep0ltKHpRUsYbklWWZe3bUwLAa3_a2 X-Proofpoint-ORIG-GUID: rZep0ltKHpRUsYbklWWZe3bUwLAa3_a2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Co-developed-by: Poovendhan Selvaraj Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 104d86e49b97..a9ff77d16c42 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -30,6 +30,11 @@ module_param(download_mode, bool, 0); #define SCM_HAS_IFACE_CLK BIT(1) #define SCM_HAS_BUS_CLK BIT(2) +#define QCOM_DOWNLOAD_FULLDUMP 0x1 +#define QCOM_DOWNLOAD_NODUMP 0x0 +#define QCOM_DOWNLOAD_MODE_SHIFT 4 +#define QCOM_DOWNLOAD_MODE_MASK 0x30 + struct qcom_scm { struct device *dev; struct clk *core_clk; @@ -440,6 +445,7 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) static void qcom_scm_set_download_mode(bool enable) { bool avail; + int val; int ret = 0; avail = __qcom_scm_is_call_available(__scm->dev, @@ -448,8 +454,10 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + val = (enable ? QCOM_DOWNLOAD_FULLDUMP : QCOM_DOWNLOAD_NODUMP); + val <<= QCOM_DOWNLOAD_MODE_SHIFT; + ret = qcom_scm_io_update_field(__scm->dload_mode_addr, + QCOM_DOWNLOAD_MODE_MASK, val); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); From patchwork Wed Jun 28 12:34:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13295746 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14757EB64DD for ; Wed, 28 Jun 2023 12:42:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231985AbjF1Mm0 (ORCPT ); Wed, 28 Jun 2023 08:42:26 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]:11634 "EHLO mx0a-0031df01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231438AbjF1Mhv (ORCPT ); Wed, 28 Jun 2023 08:37:51 -0400 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35SAa7u7019129; Wed, 28 Jun 2023 12:37:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=Zb5MG63sitiRZUFxf3RKRHRma4JBHpqb+Ln3d7Df/+Q=; b=he10HfoLj32bTbZrJwY0IkLb1AoEt296ldCUgICu4zCNK5ATFwDEstqDNyUBqz0efI7v 3rnQPFKnpS/NB8+Atpe9fug72RIurCJXeF+PEh8h+WrwZ2jVRNc1lZyTcO+e78cyjNTS h4wIlCCjUvlVwsKAD2X1lyCOzrh7b+0UAcRwAm18BuCa4Cg4TLaSAtZWFqYPYIYU8wzn CZq37iT/s0ivVAD44jzaM2lebY61TjLUzikfpnJmiwJ+/s6pIFcN9NZprBsbOHUi9/nQ 8N0n+jhgUjIm6zptFfiSLbmT8jCZWxRUnTwMs5NzWd2FSibETeVxBPYbfqQ5RRSecd/S og== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3rgaxcs965-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:33 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 35SCbX1w026581 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Jun 2023 12:37:33 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:37:26 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 20/21] firmware: qcom_scm: Refactor code to support multiple download mode Date: Wed, 28 Jun 2023 18:04:47 +0530 Message-ID: <1687955688-20809-21-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: q1lv3eXeAZRz6UjnO61zGTQIqWaUPuiL X-Proofpoint-ORIG-GUID: q1lv3eXeAZRz6UjnO61zGTQIqWaUPuiL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 adultscore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently on Qualcomm SoC, download_mode is enabled if CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is selected. Refactor the code such that it supports multiple download modes and drop CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT config instead, give interface to set the download mode from module parameter. Signed-off-by: Mukesh Ojha --- drivers/firmware/Kconfig | 11 --------- drivers/firmware/qcom_scm.c | 56 +++++++++++++++++++++++++++++++++++++++------ 2 files changed, 49 insertions(+), 18 deletions(-) diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index b59e3041fd62..ff7e9f330559 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -215,17 +215,6 @@ config MTK_ADSP_IPC config QCOM_SCM tristate -config QCOM_SCM_DOWNLOAD_MODE_DEFAULT - bool "Qualcomm download mode enabled by default" - depends on QCOM_SCM - help - A device with "download mode" enabled will upon an unexpected - warm-restart enter a special debug mode that allows the user to - "download" memory content over USB for offline postmortem analysis. - The feature can be enabled/disabled on the kernel command line. - - Say Y here to enable "download mode" by default. - config SYSFB bool select BOOT_VESA_SUPPORT diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index a9ff77d16c42..946cb0f76a17 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -18,13 +18,13 @@ #include #include #include +#include #include #include #include "qcom_scm.h" -static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT); -module_param(download_mode, bool, 0); +static u32 download_mode; #define SCM_HAS_CORE_CLK BIT(0) #define SCM_HAS_IFACE_CLK BIT(1) @@ -82,6 +82,11 @@ static const char * const qcom_scm_convention_names[] = { [SMC_CONVENTION_LEGACY] = "smc legacy", }; +static const char * const download_mode_name[] = { + [QCOM_DOWNLOAD_NODUMP] = "off", + [QCOM_DOWNLOAD_FULLDUMP] = "full", +}; + static struct qcom_scm *__scm; static int qcom_scm_clk_enable(void) @@ -442,8 +447,9 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) return qcom_scm_call_atomic(__scm->dev, &desc, NULL); } -static void qcom_scm_set_download_mode(bool enable) +static void qcom_scm_set_download_mode(u32 download_mode) { + bool enable = !!download_mode; bool avail; int val; int ret = 0; @@ -454,7 +460,7 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - val = (enable ? QCOM_DOWNLOAD_FULLDUMP : QCOM_DOWNLOAD_NODUMP); + val = download_mode; val <<= QCOM_DOWNLOAD_MODE_SHIFT; ret = qcom_scm_io_update_field(__scm->dload_mode_addr, QCOM_DOWNLOAD_MODE_MASK, val); @@ -1425,6 +1431,42 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data) return IRQ_HANDLED; } +static int get_download_mode(char *buffer, const struct kernel_param *kp) +{ + if (download_mode >= ARRAY_SIZE(download_mode_name)) + return sysfs_emit(buffer, "unknown mode\n"); + + return sysfs_emit(buffer, "%s\n", download_mode_name[download_mode]); +} + +static int set_download_mode(const char *val, const struct kernel_param *kp) +{ + u32 old = download_mode; + int ret; + + ret = sysfs_match_string(download_mode_name, val); + if (ret < 0) { + download_mode = old; + pr_err("qcom_scm: unknown download mode: %s\n", val); + return -EINVAL; + } + + download_mode = ret; + if (__scm) + qcom_scm_set_download_mode(download_mode); + + return 0; +} + +static const struct kernel_param_ops download_mode_param_ops = { + .get = get_download_mode, + .set = set_download_mode, +}; + +module_param_cb(download_mode, &download_mode_param_ops, NULL, 0644); +MODULE_PARM_DESC(download_mode, + "download mode: off/full are acceptable values"); + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; @@ -1518,12 +1560,12 @@ static int qcom_scm_probe(struct platform_device *pdev) __get_convention(); /* - * If requested enable "download mode", from this point on warmboot + * If "download mode" is requested, from this point on warmboot * will cause the boot stages to enter download mode, unless * disabled below by a clean shutdown/reboot. */ if (download_mode) - qcom_scm_set_download_mode(true); + qcom_scm_set_download_mode(download_mode); return 0; } @@ -1531,7 +1573,7 @@ static int qcom_scm_probe(struct platform_device *pdev) static void qcom_scm_shutdown(struct platform_device *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ - qcom_scm_set_download_mode(false); + qcom_scm_set_download_mode(QCOM_DOWNLOAD_NODUMP); } static const struct of_device_id qcom_scm_dt_match[] = { From patchwork Wed Jun 28 12:34:48 2023 Content-Type: text/plain; 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Wed, 28 Jun 2023 12:37:39 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 28 Jun 2023 05:37:33 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , , CC: , , , , , , , , "Mukesh Ojha" Subject: [PATCH v4 21/21] firmware: qcom_scm: Add multiple download mode support Date: Wed, 28 Jun 2023 18:04:48 +0530 Message-ID: <1687955688-20809-22-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> References: <1687955688-20809-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7N0NHCXx1HtIlnlWstC82DtCdSHMY6m1 X-Proofpoint-GUID: 7N0NHCXx1HtIlnlWstC82DtCdSHMY6m1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-28_08,2023-06-27_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 spamscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 mlxscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306280111 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, scm driver only supports full dump when download mode is selected. Add support to enable minidump as well as enable it along with fulldump. Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 946cb0f76a17..52e3b613a1af 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -31,6 +31,8 @@ static u32 download_mode; #define SCM_HAS_BUS_CLK BIT(2) #define QCOM_DOWNLOAD_FULLDUMP 0x1 +#define QCOM_DOWNLOAD_MINIDUMP 0x2 +#define QCOM_DOWNLOAD_BOTHDUMP (QCOM_DOWNLOAD_FULLDUMP | QCOM_DOWNLOAD_MINIDUMP) #define QCOM_DOWNLOAD_NODUMP 0x0 #define QCOM_DOWNLOAD_MODE_SHIFT 4 #define QCOM_DOWNLOAD_MODE_MASK 0x30 @@ -85,6 +87,8 @@ static const char * const qcom_scm_convention_names[] = { static const char * const download_mode_name[] = { [QCOM_DOWNLOAD_NODUMP] = "off", [QCOM_DOWNLOAD_FULLDUMP] = "full", + [QCOM_DOWNLOAD_MINIDUMP] = "mini", + [QCOM_DOWNLOAD_BOTHDUMP] = "full,mini", }; static struct qcom_scm *__scm; @@ -1465,7 +1469,7 @@ static const struct kernel_param_ops download_mode_param_ops = { module_param_cb(download_mode, &download_mode_param_ops, NULL, 0644); MODULE_PARM_DESC(download_mode, - "download mode: off/full are acceptable values"); + "download mode: off/full/mini/full,mini are acceptable values"); static int qcom_scm_probe(struct platform_device *pdev) {