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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:28 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 01/17] hw/i386/pc_q35: Resolve redundant q35_host variable Date: Fri, 30 Jun 2023 09:37:04 +0200 Message-ID: <20230630073720.21297-2-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=shentey@gmail.com; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The variable is redundant to "phb" and is never used by its real type. Signed-off-by: Bernhard Beschow Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_q35.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 11a7084ea1..d9f3764184 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -120,8 +120,7 @@ static void pc_q35_init(MachineState *machine) PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); - Q35PCIHost *q35_host; - PCIHostState *phb; + Object *phb; PCIBus *host_bus; PCIDevice *lpc; DeviceState *lpc_dev; @@ -207,10 +206,10 @@ static void pc_q35_init(MachineState *machine) } /* create pci host bus */ - q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE)); + phb = OBJECT(qdev_new(TYPE_Q35_HOST_DEVICE)); if (pcmc->pci_enabled) { - pci_hole64_size = object_property_get_uint(OBJECT(q35_host), + pci_hole64_size = object_property_get_uint(phb, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); } @@ -218,23 +217,23 @@ static void pc_q35_init(MachineState *machine) /* allocate ram and load rom/bios */ pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size); - object_property_add_child(OBJECT(machine), "q35", OBJECT(q35_host)); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM, + object_property_add_child(OBJECT(machine), "q35", phb); + object_property_set_link(phb, MCH_HOST_PROP_RAM_MEM, OBJECT(machine->ram), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_PCI_MEM, + object_property_set_link(phb, MCH_HOST_PROP_PCI_MEM, OBJECT(pci_memory), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_SYSTEM_MEM, + object_property_set_link(phb, MCH_HOST_PROP_SYSTEM_MEM, OBJECT(system_memory), NULL); - object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_IO_MEM, + object_property_set_link(phb, MCH_HOST_PROP_IO_MEM, OBJECT(system_io), NULL); - object_property_set_int(OBJECT(q35_host), PCI_HOST_BELOW_4G_MEM_SIZE, + object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE, x86ms->below_4g_mem_size, NULL); - object_property_set_int(OBJECT(q35_host), PCI_HOST_ABOVE_4G_MEM_SIZE, + object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + /* pci */ - sysbus_realize_and_unref(SYS_BUS_DEVICE(q35_host), &error_fatal); - phb = PCI_HOST_BRIDGE(q35_host); - host_bus = phb->bus; + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); + host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0")); /* create ISA bus */ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true, TYPE_ICH9_LPC_DEVICE); From patchwork Fri Jun 30 07:37:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B41CEB64D7 for ; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:29 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 02/17] hw/pci-host/q35: Fix double, contradicting .endianness assignment Date: Fri, 30 Jun 2023 09:37:05 +0200 Message-ID: <20230630073720.21297-3-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=shentey@gmail.com; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Fixes the following clangd warning (-Winitializer-overrides): q35.c:297:19: Initializer overrides prior initialization of this subobject q35.c:292:19: previous initialization is here Settle on little endian which is consistent with using pci_host_conf_le_ops. Fixes: bafc90bdc594 ("q35: implement TSEG") Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/q35.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index fd18920e7f..84137b9ad9 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -285,7 +285,6 @@ static void blackhole_write(void *opaque, hwaddr addr, uint64_t val, static const MemoryRegionOps blackhole_ops = { .read = blackhole_read, .write = blackhole_write, - .endianness = DEVICE_NATIVE_ENDIAN, .valid.min_access_size = 1, .valid.max_access_size = 4, .impl.min_access_size = 4, From patchwork Fri Jun 30 07:37:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50AA6EB64DA for ; Fri, 30 Jun 2023 07:37:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hG-000239-TS; Fri, 30 Jun 2023 03:37:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hD-00022O-8p for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:35 -0400 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hB-0005PB-HI for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:35 -0400 Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-51d8fa4dbf9so1586616a12.1 for ; Fri, 30 Jun 2023 00:37:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110651; x=1690702651; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CCVk7jdt1nDqHH6A+S2BbR5/KvJS5BvxayG0t6p+t7Q=; b=hTppHVQGOEUngTr52TFcZrzfdnuHUo0PBL4R0G9ssJqHaVsUIUJ9CtTnB9Xwwm1dWe Q/kuYRVZL2DpQZibwVIHn2MeZxYyfb7metyPB+YaJloiHE1llRVjXenaTjYOrL5JyV+D aEqPvPT5GGFr9Qz7W2y9gulQvaQp0Lj0Sie3hSnzi+DSjr2rlZFXr6drQais1xG4pA97 o2xHyrXHIz8Q/kCiT8cbEU0+uNafRginZMvNUeGWxnzGSphj2J7MSG9SG4ZOwVIu+wkS KDsIDVpYuUQh3jjVyNlBcv5H+164Y3+vdmicMbtmxIj+sMUmhNIrRRMWDKngyEGlQ4vu LSBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110651; x=1690702651; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CCVk7jdt1nDqHH6A+S2BbR5/KvJS5BvxayG0t6p+t7Q=; b=a6onf5uBcRFStDMveJ4tP7fsITRiuxynU5lLwEByLnky6fLugHH8WjoLSA8Ys09JXv mIEOPRgF2OiitPphvLvfx6S+p1cj54U/ggd/0QT7+ElEha+ItlH0FOtmiGKgzWGPG6Y8 iYZAp5CaLCF4lCQhRbx3Xu+d1P2TWPsknNyWfXoLRJZ7XYEVKb2p0AnTFBTS7JXFWlIe iPR7qkS2dibCdBVBoZPuqiV1FfT6ynYEFg/mIMUjTEa/TdiMiZshbK5wdAWUUvhMU0Qp FSa5EconmikFofQsMfP/keZpea7ux1SP4T4faQ6xa832SzouUNOF1g8SxRdxe0o2ChWU /CnA== X-Gm-Message-State: ABy/qLb5Vz3TXFQmmUS6kyVCcqBE2nDBc4VzNve8wwr+Z2jKYxIwQfDY m+adGfPlrvor5VFrl2TWtQpgHlxjIKA= X-Google-Smtp-Source: APBJJlFEA0slv+JHK/ul+yRyGLnTlAdASNaFkBxxn3UtZmjPeJVOPlPD/yrjgVlNYRkGIt3o0fEB0A== X-Received: by 2002:a17:906:f196:b0:96f:d345:d0f7 with SMTP id gs22-20020a170906f19600b0096fd345d0f7mr1045888ejb.62.1688110651565; Fri, 30 Jun 2023 00:37:31 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:31 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 03/17] hw/pci-host/q35: Initialize PCMachineState::bus in board code Date: Fri, 30 Jun 2023 09:37:06 +0200 Message-ID: <20230630073720.21297-4-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=shentey@gmail.com; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The Q35 PCI host currently sets the PC machine's PCI bus attribute through global state, thereby assuming the machine to be a PC machine. The Q35 machine code already holds on to Q35's pci bus attribute, so can easily set its own property while preserving encapsulation. Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_q35.c | 4 +++- hw/pci-host/q35.c | 1 - 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d9f3764184..4edc0b35f4 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -230,10 +230,12 @@ static void pc_q35_init(MachineState *machine) x86ms->below_4g_mem_size, NULL); object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); /* pci */ - sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0")); + pcms->bus = host_bus; + /* create ISA bus */ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true, TYPE_ICH9_LPC_DEVICE); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 84137b9ad9..0604464074 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -66,7 +66,6 @@ static void q35_host_realize(DeviceState *dev, Error **errp) s->mch.pci_address_space, s->mch.address_space_io, 0, TYPE_PCIE_BUS); - PC_MACHINE(qdev_get_machine())->bus = pci->bus; pci->bypass_iommu = PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu; qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); From patchwork Fri Jun 30 07:37:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 315C8EB64DA for ; Fri, 30 Jun 2023 07:39:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hK-00023o-ED; Fri, 30 Jun 2023 03:37:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hE-00022c-8P for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:36 -0400 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hC-0005PN-FP for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:35 -0400 Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-991f956fb5aso168596866b.0 for ; Fri, 30 Jun 2023 00:37:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110652; x=1690702652; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3zxuFy1nKO4CI4FNaygwtRvNzJbOGIkhIVlB0FND1xI=; b=Xr3EPxkfgc/aI13yvkPkvJj7vcrFYNIYfIX92iYccNiEANusSUOZj2q3jRVz+VjPwV AJaTgzsOy9151Tglz16uFwMUB1u2irpGB2w39R0aL4a6tBqdetr8WM2JhbeCppkOrQbD Of1Yk8vQNZo329ZCvRTMBscj+2PU1i/NeaCY3k0hgl0eTnnK6gW/yJ8IWwzQuIWQKX5u ihf2nMXDWJghKrebEL+7uJlCpRXSHWraxD4WewDYFbKXZGLVEs6LnNdxNI3I9/CY7QiJ lutBEZrAckARU44+aAzA2subsba+PkfGd5JAe2E0d44VphsMZwuh2yp1XDWV1iXR8vvO Cevg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110652; x=1690702652; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3zxuFy1nKO4CI4FNaygwtRvNzJbOGIkhIVlB0FND1xI=; b=DzUCGoSb7gBxkI8F+JmgDgskP6Jp5Mg27OYSy6cTGB43oJItA3UyVPlBu9oJOKjgcb McQHp3JbbgUY+48xjIsTMKFdQQf4v83yxQQax5MLUq92yi/BAuicgc/myMGDVF8vKZCi z+tAriv58CEQtjIY4V5d7wrICvRpR4IPFAzZt7xKF6nkyunS3zIRUR5bM/9WWOFjBKgl nHJCLA+3yunP368YJ5c1wO1mgB6DxOZ51mXjpd7XeRHP3j1oyNkWG32lGU+oF1a/jEV+ RjuE5GxLZMlMTGmpckapJ2tESfDa/pVDg2SBRem/R6nECx3gYdAu7F0vcqo3wD77evpl TfdA== X-Gm-Message-State: ABy/qLZhdIrqK6SGOjqrOhoWra1QOLc7kD7qd2raNjFiNK8NcX9TwpCx QQGBWPuFNHe49Q+5KE3ZP2JluyBmXH0= X-Google-Smtp-Source: APBJJlGZpb7VEK94oJSk+fOZrzfelapHmja8xwo2Qg7UU9vcKxtLN832ZNePWCqah7O/Mi80Pwxtmg== X-Received: by 2002:a17:906:fa89:b0:988:7d1:f5a5 with SMTP id lt9-20020a170906fa8900b0098807d1f5a5mr1231593ejb.28.1688110652512; Fri, 30 Jun 2023 00:37:32 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:32 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Igor Mammedov Subject: [PATCH v3 04/17] hw/pci/pci_host: Introduce PCI_HOST_BYPASS_IOMMU macro Date: Fri, 30 Jun 2023 09:37:07 +0200 Message-ID: <20230630073720.21297-5-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=shentey@gmail.com; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce a macro to avoid copy and pasting strings which can easily cause typos. Suggested-by: Michael S. Tsirkin Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov --- include/hw/pci/pci_host.h | 2 ++ hw/pci/pci_host.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h index c6f4eb4585..e52d8ec2cd 100644 --- a/include/hw/pci/pci_host.h +++ b/include/hw/pci/pci_host.h @@ -31,6 +31,8 @@ #include "hw/sysbus.h" #include "qom/object.h" +#define PCI_HOST_BYPASS_IOMMU "bypass-iommu" + #define TYPE_PCI_HOST_BRIDGE "pci-host-bridge" OBJECT_DECLARE_TYPE(PCIHostState, PCIHostBridgeClass, PCI_HOST_BRIDGE) diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index dfd185bbb4..7af8afdcbe 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -232,7 +232,7 @@ const VMStateDescription vmstate_pcihost = { static Property pci_host_properties_common[] = { DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, mig_enabled, true), - DEFINE_PROP_BOOL("bypass-iommu", PCIHostState, bypass_iommu, false), + DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false), DEFINE_PROP_END_OF_LIST(), }; From patchwork Fri Jun 30 07:37:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AEB02EB64DD for ; Fri, 30 Jun 2023 07:39:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hK-00023q-EE; Fri, 30 Jun 2023 03:37:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hF-000232-Co for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:38 -0400 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hD-0005Pe-LJ for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:37 -0400 Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-98df6bc0048so182946966b.1 for ; Fri, 30 Jun 2023 00:37:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110653; x=1690702653; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rtJ3y6eIvCQ3GWIbAZbSOrnzKk4wFNnFByJB8omAiJU=; b=BYXhWi7zJJ1U515ad4My5PHxjy5vmdg4AfJZS7xKk9IIU4NC3ngdxOSBkIa3FCAr7R sMEl/FBlnRa1WEL5DjTZyZBLct3xEB2kdjBIN3KPbfxou4dso0oOCHB+whMGHS/Q/iBJ U1cpLrmnZFVtngS11egm59hKRpQGoEXgVDZkTEkTT/DWU11rSJD53MWyVo8mQEzkugW7 tU5iQd535wbWKklIMHGAjDExfIY6cqK0PUVA+3vid1LfFdn2gld1+5WiwKCc110slgsB wGKuK1aXU/1LINDZTt6qkjGiTVId7qkfNb+ye8DMh8L+DSDK+f1o+WaEH4kOkCU70a6V 4fqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110653; x=1690702653; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rtJ3y6eIvCQ3GWIbAZbSOrnzKk4wFNnFByJB8omAiJU=; b=mBbW/BCN1OHDvEN6hvW2mHI2Fc6FnTRFdkvcb0AAqDhbpC6F68UGnd0/S9rFbpJ0Ko EaXQV42KzAy+8jT5q8udWPmUc9Ha4a+HF+9yB3kICg11hIW0z0mae68ALsydhh6NtN6I N0OSf3jmbrXNadx0vpH7HDOPVmPawIoNuV3WiApoFP/Y6I230sLCwBq5N2CIKI+TEiSw 4mxsAR1NwjGZ1AAuqwzxr04T0WJQ3qe7xBcLQRhh4XBlUgVpeLekrvwlQfGezvnGulkN V2scSb7d7nMugkyNoAwvmtqMOVDiwvUgZvVgONZrEUixG1yBxDcV9w7ghrkv2wWOcWb8 61aw== X-Gm-Message-State: ABy/qLYaM+TKtZV+w4vyssegurjP3Eg0J/SPk6/x8OglqKCbiyMTz0NA Uh++ny1Ej2K6p2i6KY3L1L7Q/H4QV30= X-Google-Smtp-Source: APBJJlEZVfoFTQ9m3q/vjUKcc93qZdylhN3nPdm9tbphub81EuTbE72vI8qSevpgd9GEcMometMjZA== X-Received: by 2002:a17:906:16c9:b0:991:e12e:9855 with SMTP id t9-20020a17090616c900b00991e12e9855mr1213591ejd.12.1688110653503; Fri, 30 Jun 2023 00:37:33 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:33 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 05/17] hw/pci-host/q35: Initialize PCI_HOST_BYPASS_IOMMU property from board code Date: Fri, 30 Jun 2023 09:37:08 +0200 Message-ID: <20230630073720.21297-6-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=shentey@gmail.com; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The Q35 PCI host already has a PCI_HOST_BYPASS_IOMMU property. However, the host initializes this property itself by accessing global machine state, thereby assuming it to be a PC machine. Avoid this by having board code set this property. Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_q35.c | 2 ++ hw/pci-host/q35.c | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 4edc0b35f4..852250e8cb 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -230,6 +230,8 @@ static void pc_q35_init(MachineState *machine) x86ms->below_4g_mem_size, NULL); object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, x86ms->above_4g_mem_size, NULL); + object_property_set_bool(phb, PCI_HOST_BYPASS_IOMMU, + pcms->default_bus_bypass_iommu, NULL); sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); /* pci */ diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 0604464074..d2830cee34 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -66,8 +66,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) s->mch.pci_address_space, s->mch.address_space_io, 0, TYPE_PCIE_BUS); - pci->bypass_iommu = - PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu; + qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); } From patchwork Fri Jun 30 07:37:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 722C0EB64D7 for ; Fri, 30 Jun 2023 07:39:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hK-000246-GQ; Fri, 30 Jun 2023 03:37:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hG-00023O-T7 for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:38 -0400 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hE-0005Pp-Ip for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:38 -0400 Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-98e1d3be004so179879466b.1 for ; Fri, 30 Jun 2023 00:37:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110655; x=1690702655; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fWlnycR5wJyTdbj8DEeaQ9aaDr9hN9D3c5m0fZQj8MU=; b=hRhmVuC8Dvp7v47ZZe4b/4JlPQE4gg5OxvhtdnhyZSErQ4AJ2OBNoOCYy3B1RlukzR rgCTDI3Nt2qHYG87MDE5FQwzNpm+GKdbrbHpdk7NjQCvdlfdxfMBRrfzixJ48kVt5GUj k/beSQwnrHuTKD9CO4dZo2En5yWC4KM8AvaVlzqUOrLYjec95wiQsjjHBxIDBI7EVdiw WxiGXx6i6+6xQyOZAfnEwURfkTEgSHm2H9JT+Cxj57ONSXQOJcadQEgcdlKhcAy6rFxo 9eAP1U/tzuNYA+Ln56OuNDiK6YAVsrgdHtc8ZWBPS/8SxN+HJpZPp0Bl2lL/mJoVOh8R 8Ojg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110655; x=1690702655; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fWlnycR5wJyTdbj8DEeaQ9aaDr9hN9D3c5m0fZQj8MU=; b=US+wzdKNlqZAtfcRZDUzcgxr3+QQfNygEEpp9GFSvl0IY6Fk3ZSS3NcnhGpnWOsqtR JICA7VbZXsfgPE9qjnOMNXQn4snfgZRlxAEXbBw0Z+Z1VEtDQCF13h3P/zT+sRXQVvab 4fejXGs/yHTVme2yWGv00XJBS6Xjn6FaXLJd4teoztQKOwVEi3NQv6YPFDoKImXEhoBL SI2TmioeBDvnALSq9K57MCCxS4cPHDdApA5V5Dss0yunm8VIvkdnMfph+t19W7WWU1cC weaQ9fx/Y9hxaGFXy7qYoA/rilEbGuyliHoxqvRFLPNfabqu4nBJQROKz1PMI45m02J0 Gv/A== X-Gm-Message-State: ABy/qLaK+PSFtSx/H/eHx6b7AKg75JyunRXvGPMGREv4vt91SFSHn/g5 q5+L3vNKhyfQm1NluFbdo6cWnydlZjs= X-Google-Smtp-Source: APBJJlFgWdsFvmiH6e8hwj3zyJR6A/ulgGjwW4deyE3aexofYRhuCLtL45uumGjb2uYNCU8t3/gZmg== X-Received: by 2002:a17:906:348f:b0:98e:26ae:9b08 with SMTP id g15-20020a170906348f00b0098e26ae9b08mr1191832ejb.58.1688110654754; Fri, 30 Jun 2023 00:37:34 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:34 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 06/17] hw/pci-host/q35: Make some property name macros reusable by i440fx Date: Fri, 30 Jun 2023 09:37:09 +0200 Message-ID: <20230630073720.21297-7-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=shentey@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Bernhard Beschow --- include/hw/i386/pc.h | 4 ++++ include/hw/pci-host/q35.h | 5 ----- hw/i386/pc_q35.c | 8 ++++---- hw/pci-host/q35.c | 8 ++++---- 4 files changed, 12 insertions(+), 13 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 6eec0fc51d..c34c698cdd 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -146,6 +146,10 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level); void pc_guest_info_init(PCMachineState *pcms); +#define PCI_HOST_PROP_RAM_MEM "ram-mem" +#define PCI_HOST_PROP_PCI_MEM "pci-mem" +#define PCI_HOST_PROP_SYSTEM_MEM "system-mem" +#define PCI_HOST_PROP_IO_MEM "io-mem" #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index e89329c51e..1d98bbfe0d 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -74,11 +74,6 @@ struct Q35PCIHost { * gmch part */ -#define MCH_HOST_PROP_RAM_MEM "ram-mem" -#define MCH_HOST_PROP_PCI_MEM "pci-mem" -#define MCH_HOST_PROP_SYSTEM_MEM "system-mem" -#define MCH_HOST_PROP_IO_MEM "io-mem" - /* PCI configuration */ #define MCH_HOST_BRIDGE "MCH" diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 852250e8cb..02dd274276 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -218,13 +218,13 @@ static void pc_q35_init(MachineState *machine) pc_memory_init(pcms, system_memory, rom_memory, pci_hole64_size); object_property_add_child(OBJECT(machine), "q35", phb); - object_property_set_link(phb, MCH_HOST_PROP_RAM_MEM, + object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, OBJECT(machine->ram), NULL); - object_property_set_link(phb, MCH_HOST_PROP_PCI_MEM, + object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, OBJECT(pci_memory), NULL); - object_property_set_link(phb, MCH_HOST_PROP_SYSTEM_MEM, + object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, OBJECT(system_memory), NULL); - object_property_set_link(phb, MCH_HOST_PROP_IO_MEM, + object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, OBJECT(system_io), NULL); object_property_set_int(phb, PCI_HOST_BELOW_4G_MEM_SIZE, x86ms->below_4g_mem_size, NULL); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index d2830cee34..91c46df9ae 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -240,19 +240,19 @@ static void q35_host_initfn(Object *obj) object_property_add_uint64_ptr(obj, PCIE_HOST_MCFG_SIZE, &pehb->size, OBJ_PROP_FLAG_READ); - object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.ram_memory, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.pci_address_space, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.system_memory, qdev_prop_allow_set_link_before_realize, 0); - object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, + object_property_add_link(obj, PCI_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.address_space_io, qdev_prop_allow_set_link_before_realize, 0); } From patchwork Fri Jun 30 07:37:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7853AEB64D7 for ; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:35 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 07/17] hw/i386/pc_piix: Turn some local variables into initializers Date: Fri, 30 Jun 2023 09:37:10 +0200 Message-ID: <20230630073720.21297-8-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=shentey@gmail.com; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Eliminates an else branch. Suggested-by: Igor Mammedov Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index f9947fbc10..6a5b6dad2f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -122,11 +122,11 @@ static void pc_init1(MachineState *machine, BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; MemoryRegion *ram_memory; - MemoryRegion *pci_memory; - MemoryRegion *rom_memory; + MemoryRegion *pci_memory = NULL; + MemoryRegion *rom_memory = system_memory; ram_addr_t lowmem; - uint64_t hole64_size; - DeviceState *i440fx_host; + uint64_t hole64_size = 0; + DeviceState *i440fx_host = NULL; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -205,11 +205,6 @@ static void pc_init1(MachineState *machine, hole64_size = object_property_get_uint(OBJECT(i440fx_host), PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); - } else { - pci_memory = NULL; - rom_memory = system_memory; - i440fx_host = NULL; - hole64_size = 0; } pc_guest_info_init(pcms); From patchwork Fri Jun 30 07:37:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B90BEB64D7 for ; Fri, 30 Jun 2023 07:38:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hb-0002Hm-Oe; Fri, 30 Jun 2023 03:37:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hJ-00023w-Qp for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:42 -0400 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hH-0005QA-NZ for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:41 -0400 Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-992ace062f3so173996166b.2 for ; Fri, 30 Jun 2023 00:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110657; x=1690702657; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WQG3c1JuQ/m1rucP/1PJyI67+DN0jd3fnKoXjuafnIw=; b=UiEpxaEVGTEhLOzVh7deuAZVd9uuFCy8bSy1mqyzExduR3mxBduwWIAyvrXkVRWI/x P0LKklwxzMz8+llYatHRD6/6hdHw2LK1+eClKJS6pwg+iRecuwV/9GlyXwLcDlsIv2hg c+Qb3hMYqX3WIPopbc8GC5ElPR+IGzGMxQZmNGGkByjJyeDDkIGSoLGVN3rQFDaaxEUN yMd0wyPeBnWdWQCnriwhlIW1XQAiSuKrnTsfyjqrvIZLr4mNwqZ2xXGxx3CQMF6ErwfO +CCVzZyNnVHwSN4wvvY/f1av01qHQyxAPn8sEAmRg9a/0C+pQeIw82FNYS6vaaS7YGn3 J8sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110657; x=1690702657; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WQG3c1JuQ/m1rucP/1PJyI67+DN0jd3fnKoXjuafnIw=; b=K2cHAK6gF7AyBWtIr9qE06UAQS+plY4SMwkPw2ZJdbIjFfeyD+SY4AgSE6i2SOOF2Q cHUn0AE+cQJ5XaSGl7nSy71Ku+raLSaDGqdCmkeBQUeFoVdKsyuq5x5wgLEKwVgqhxPy za/q6uz4c6zqstexNC+6OB7wab5NNS4U+7wv+S4kEGVRSHJPZ63u2GjDTZB/JzknlCnU t/UtQmRvqpQJ8cq0XUymZxQ6rHptGTPzrzqBb9oqwAIw9bCXVJMn6CZQOG/2SBx6d1yD rhGminFCHUFIlNZ4f4U7jaWbZ92Vdo2tO0gDccXejoIYO/UzdnpwbVG7M1eqAkM41eXH EH4A== X-Gm-Message-State: ABy/qLbh0u+bgJglgLb602YCs/ZTmiQkLnCcFiv1XyPCDT4zPCwqEIQE t7elruY/WTX3jZBC+xAKHElowjK5j3Q= X-Google-Smtp-Source: APBJJlGhHqhJ3Sm0pBvpu8fuqahP62EnMwp3oenvd5iEb5HlWOXuOCeVT18fSbq/uFk1rLSWJQSZRw== X-Received: by 2002:a17:906:a88b:b0:98b:dc6c:b304 with SMTP id ha11-20020a170906a88b00b0098bdc6cb304mr1403577ejb.38.1688110656824; Fri, 30 Jun 2023 00:37:36 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:36 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 08/17] hw/pci-host/i440fx: Add "i440fx" child property in board code Date: Fri, 30 Jun 2023 09:37:11 +0200 Message-ID: <20230630073720.21297-9-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=shentey@gmail.com; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The parent-child relation is usually established near a child's qdev_new(). For i440fx this allows for reusing the machine parameter, thus avoiding qdev_get_machine() which relies on a global variable. Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow --- hw/i386/pc_piix.c | 2 ++ hw/pci-host/i440fx.c | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6a5b6dad2f..26e8473a4d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -202,6 +202,8 @@ static void pc_init1(MachineState *machine, memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; i440fx_host = qdev_new(host_type); + object_property_add_child(OBJECT(machine), "i440fx", + OBJECT(i440fx_host)); hole64_size = object_property_get_uint(OBJECT(i440fx_host), PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 61e7b97ff4..d95d9229d3 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -259,7 +259,6 @@ PCIBus *i440fx_init(const char *pci_type, b = pci_root_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); s->bus = b; - object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, pci_type); From patchwork Fri Jun 30 07:37:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 477DFEB64D7 for ; Fri, 30 Jun 2023 07:38:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hU-0002BV-Li; Fri, 30 Jun 2023 03:37:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hJ-00023v-QR for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:42 -0400 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hH-0005QL-Qf for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:41 -0400 Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-991ef0b464cso272013766b.0 for ; Fri, 30 Jun 2023 00:37:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110658; x=1690702658; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K6dApJ7J8Z4QMs7bQhU3KSg7TWWxyrT4m6TvmkjO1Y8=; b=hygtFbNm9AFpvmsvBoXOm7U1ibViRW4nhS4YWMP7PRhXKY42EdmXDl+Oeqt/xBrpgG VcvEG8LFCt9qN7J5H4s1Zypzy3E7XZdI4iFogNin96lB/AaxD3s4QQpRGmgUN1agE7Is 4ifANY4uibg9Itk6VERLL57WR+VYM7WSN40ZnuaPCaRTSmKTsqmq0Ca8pok1FWSzQOFF G2DtzY+D8znyweNfG8niKNQJSIgcmd8cWTabknwy3/G6YarpeNEQPIhkHeCP1CKZcYF/ ZzYVWqP6YsKFKyU+X0sGJdiyZ0KsKtiUkssBsNSImnTKq/HyMJfTj8DxedSBLg9s/KnD hbjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110658; x=1690702658; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K6dApJ7J8Z4QMs7bQhU3KSg7TWWxyrT4m6TvmkjO1Y8=; b=HdvBQjde30rvz8sG4lsTBaFniAqOu2Pe8lgJl/uP16DtZ2kgNOhQnZGH/Zv0E6D/AW W6d/QCZJtMXpO7eirbyDsvPnK6n7/jVmMXuZki+SxC1fdNG4v027lSe5INSJjTgj0Jua 77bfXH+T84JD80GxRA9fGLu5jbb2VjnmtEOQWsvg6d5dLCwn5XjqHu595JSC5clFrhMg GXvA5tx3eyCeTVGgHxW4JFzOzQbhQvvXQIk+URR4CFtMi6+HH+RbyNbTAyMtfdcMcESY Hcxk7yft/jpISbSFOigo+fS2IO24qMvKoi8+BSyWn42a/vmYnAFTl/7bYmqWy3jSmCpN YG9w== X-Gm-Message-State: ABy/qLYJre8QwFD0R41UszA45FoGVklf4ps9EZjf3a69MXyp/31Onu3B xSrcopacNrWDyIS3D6OXeu6Sv6HyTx8= X-Google-Smtp-Source: APBJJlE63SFsOLGy112X/s8Z8l9Mwq0c53py6g2UROe3d4fDzPlYd9ovfboUurq8QPIouiRMOeo7mg== X-Received: by 2002:a17:906:224a:b0:992:1653:3402 with SMTP id 10-20020a170906224a00b0099216533402mr2786264ejr.25.1688110658263; Fri, 30 Jun 2023 00:37:38 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:37 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 09/17] hw/pci-host/i440fx: Replace magic values by existing constants Date: Fri, 30 Jun 2023 09:37:12 +0200 Message-ID: <20230630073720.21297-10-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=shentey@gmail.com; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Bernhard Beschow Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index d95d9229d3..b7c24a4e1d 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -276,8 +276,8 @@ PCIBus *i440fx_init(const char *pci_type, /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, 0xa0000, 0x20000); - memory_region_add_subregion_overlap(f->system_memory, 0xa0000, + f->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); + memory_region_add_subregion_overlap(f->system_memory, SMRAM_C_BASE, &f->smram_region, 1); memory_region_set_enabled(&f->smram_region, true); @@ -285,9 +285,9 @@ PCIBus *i440fx_init(const char *pci_type, memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); memory_region_set_enabled(&f->smram, true); memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, 0xa0000, 0x20000); + f->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); memory_region_set_enabled(&f->low_smram, true); - memory_region_add_subregion(&f->smram, 0xa0000, &f->low_smram); + memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&f->smram)); From patchwork Fri Jun 30 07:37:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83F5EEB64DA for ; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:38 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 10/17] hw/pci-host/i440fx: Have common names for some local variables Date: Fri, 30 Jun 2023 09:37:13 +0200 Message-ID: <20230630073720.21297-11-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=shentey@gmail.com; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org `PCIHostState` is often referred to as `phb`, own device state usually as `s`. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index b7c24a4e1d..0b76fe71af 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -205,28 +205,28 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { - PCIHostState *s = PCI_HOST_BRIDGE(obj); + PCIHostState *phb = PCI_HOST_BRIDGE(obj); - memory_region_init_io(&s->conf_mem, obj, &pci_host_conf_le_ops, s, + memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, "pci-conf-idx", 4); - memory_region_init_io(&s->data_mem, obj, &pci_host_data_le_ops, s, + memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { - PCIHostState *s = PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - memory_region_add_subregion(s->bus->address_space_io, 0xcf8, &s->conf_mem); + memory_region_add_subregion(phb->bus->address_space_io, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); - memory_region_add_subregion(s->bus->address_space_io, 0xcfc, &s->data_mem); + memory_region_add_subregion(phb->bus->address_space_io, 0xcfc, &phb->data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); /* register i440fx 0xcf8 port as coalesced pio */ - memory_region_set_flush_coalesced(&s->data_mem); - memory_region_add_coalescing(&s->conf_mem, 0, 4); + memory_region_set_flush_coalesced(&phb->data_mem); + memory_region_add_coalescing(&phb->conf_mem, 0, 4); } static void i440fx_realize(PCIDevice *dev, Error **errp) @@ -248,17 +248,16 @@ PCIBus *i440fx_init(const char *pci_type, MemoryRegion *pci_address_space, MemoryRegion *ram_memory) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(dev); PCIBus *b; PCIDevice *d; - PCIHostState *s; PCII440FXState *f; unsigned i; - I440FXState *i440fx; - s = PCI_HOST_BRIDGE(dev); b = pci_root_bus_new(dev, NULL, pci_address_space, address_space_io, 0, TYPE_PCI_BUS); - s->bus = b; + phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, pci_type); @@ -267,8 +266,7 @@ PCIBus *i440fx_init(const char *pci_type, f->pci_address_space = pci_address_space; f->ram_memory = ram_memory; - i440fx = I440FX_PCI_HOST_BRIDGE(dev); - range_set_bounds(&i440fx->pci_hole, below_4g_mem_size, + range_set_bounds(&s->pci_hole, below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ From patchwork Fri Jun 30 07:37:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2DF8EB64DA for ; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:40 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 11/17] hw/pci-host/i440fx: Move i440fx_realize() into PCII440FXState section Date: Fri, 30 Jun 2023 09:37:14 +0200 Message-ID: <20230630073720.21297-12-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=shentey@gmail.com; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org i440fx_realize() realizes the PCI device inside the host bridge (PCII440FXState), but is implemented between i440fx_pcihost_realize() and i440fx_init() which deal with the host bridge itself (I440FXState). Since we want to append i440fx_init() to i440fx_pcihost_realize() later let's move i440fx_realize() out of the way. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 0b76fe71af..e84fcd50b6 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -65,6 +65,15 @@ struct I440FXState { */ #define I440FX_COREBOOT_RAM_SIZE 0x57 +static void i440fx_realize(PCIDevice *dev, Error **errp) +{ + dev->config[I440FX_SMRAM] = 0x02; + + if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { + warn_report("i440fx doesn't support emulated iommu"); + } +} + static void i440fx_update_memory_mappings(PCII440FXState *d) { int i; @@ -229,15 +238,6 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) memory_region_add_coalescing(&phb->conf_mem, 0, 4); } -static void i440fx_realize(PCIDevice *dev, Error **errp) -{ - dev->config[I440FX_SMRAM] = 0x02; - - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { - warn_report("i440fx doesn't support emulated iommu"); - } -} - PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, From patchwork Fri Jun 30 07:37:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A8A1EB64D7 for ; Fri, 30 Jun 2023 07:39:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hg-0002MT-BD; Fri, 30 Jun 2023 03:38:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hN-00024z-CG for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:46 -0400 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hL-0005Qx-BF for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:45 -0400 Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-9923833737eso159429566b.3 for ; Fri, 30 Jun 2023 00:37:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110661; x=1690702661; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H45HpoTt4ez9R+HtnsaKwH+l/LOvWW/C/zvvDDhjp3o=; b=C6wQggqHROaGP1j4qh9pXBufDoFUkV4nKVgseyDxPMHCS4RsflvE1GHFf4lzkTTioL vNpBnstHdM+utEsrM43hVqyAxHq7unc3IF+VQpU41oHv68MSE7rJmFHzLOnX7BQEgmnd IPNeCpUewFTA33PEtRkATjmJAIAtVkc9m5S6LTrvpMnKtxdyQeZOhZ0olhTmuiRX/c/Z TiTJsl0pghcgAkMrFLuct3PojicGoBtHvuetnMflJT6ifpME3OmB24/IlW0WZMVi1jty gJ/k3MR8osmXjR9PWGP80oVCrigFRw8SNs/FIZLxmSWaQ7kh1rT5UXtFQkz8Z4C12jJC n+Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110661; x=1690702661; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H45HpoTt4ez9R+HtnsaKwH+l/LOvWW/C/zvvDDhjp3o=; b=Tdz2d1RXywmee349S72qLySn3rnc3O+8gRcazb+pGZigybPMWZy4ixSzwkKtE9VDJy ZowvQ0e3jIVjf1Zoeck95vrx23j5Yy9nzDz2d2nLbWEeM7HAemnQh8QUdruxcme82y4o z4rHaH3oZMLX00Ia8UrxE4casgb7f+NMl3cIiNJ1vHwJdsl58IrQPjDaCcJ31Y+ElpsN b/XIrtJnCf/A/5h9F3K8W/13mC3yXHLWFw7mMiSgJ/eSuyT9EfoqDhJ9d3ITeeiGU25E rCkPaKFy/dk75EuyN8u2WLMId5rLoPylz0HrMC/DwqXme7BbpOrYZhDJjrdkbtPZSQLW bt7Q== X-Gm-Message-State: ABy/qLbr6GcsORllXHnWBWnjHxMEH78zaKnHC0+eFuwQXRRSht01WEJT ipuYXbkosR1HvJmwtYrzTXikOs7tpBk= X-Google-Smtp-Source: APBJJlH1a9Vi7cenTukRpPph15Hh7fjqUQ7OSNXrC48x9IQnVsYhEMDjUVCRpzgJC8zpbkWqEGmCWw== X-Received: by 2002:a17:906:3913:b0:991:7875:454c with SMTP id f19-20020a170906391300b009917875454cmr1233668eje.1.1688110661352; Fri, 30 Jun 2023 00:37:41 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:41 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 12/17] hw/pci-host/i440fx: Make MemoryRegion pointers accessible as properties Date: Fri, 30 Jun 2023 09:37:15 +0200 Message-ID: <20230630073720.21297-13-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=shentey@gmail.com; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The goal is to eliminate i440fx_init() which is a legacy init function. This neccessitates the memory regions to be properties, like in Q35, which will be assigned in board code. Since i440fx needs different PCI devices in Xen mode, and since i440fx shall be self-contained, the PCI device will be created during realization of the host. Thus the pointers need to be moved to the host structure to be usable as properties. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- include/hw/pci-host/i440fx.h | 3 --- hw/pci-host/i440fx.c | 42 +++++++++++++++++++++++++----------- 2 files changed, 30 insertions(+), 15 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index bf57216c78..e3a550021e 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -25,9 +25,6 @@ struct PCII440FXState { PCIDevice parent_obj; /*< public >*/ - MemoryRegion *system_memory; - MemoryRegion *pci_address_space; - MemoryRegion *ram_memory; PAMMemoryRegion pam_regions[PAM_REGIONS_COUNT]; MemoryRegion smram_region; MemoryRegion smram, low_smram; diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index e84fcd50b6..b9530fc3a0 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -47,6 +47,10 @@ OBJECT_DECLARE_SIMPLE_TYPE(I440FXState, I440FX_PCI_HOST_BRIDGE) struct I440FXState { PCIHostState parent_obj; + + MemoryRegion *system_memory; + MemoryRegion *pci_address_space; + MemoryRegion *ram_memory; Range pci_hole; uint64_t pci_hole64_size; bool pci_hole64_fix; @@ -214,12 +218,25 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(obj); PCIHostState *phb = PCI_HOST_BRIDGE(obj); memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, "pci-conf-idx", 4); memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); + + object_property_add_link(obj, PCI_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->ram_memory, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + (Object **) &s->pci_address_space, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->system_memory, + qdev_prop_allow_set_link_before_realize, 0); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) @@ -255,27 +272,28 @@ PCIBus *i440fx_init(const char *pci_type, PCII440FXState *f; unsigned i; - b = pci_root_bus_new(dev, NULL, pci_address_space, + s->system_memory = address_space_mem; + s->pci_address_space = pci_address_space; + s->ram_memory = ram_memory; + + b = pci_root_bus_new(dev, NULL, s->pci_address_space, address_space_io, 0, TYPE_PCI_BUS); phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, pci_type); f = I440FX_PCI_DEVICE(d); - f->system_memory = address_space_mem; - f->pci_address_space = pci_address_space; - f->ram_memory = ram_memory; range_set_bounds(&s->pci_hole, below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ - pc_pci_as_mapping_init(f->system_memory, f->pci_address_space); + pc_pci_as_mapping_init(s->system_memory, s->pci_address_space); /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); - memory_region_add_subregion_overlap(f->system_memory, SMRAM_C_BASE, + s->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); + memory_region_add_subregion_overlap(s->system_memory, SMRAM_C_BASE, &f->smram_region, 1); memory_region_set_enabled(&f->smram_region, true); @@ -283,17 +301,17 @@ PCIBus *i440fx_init(const char *pci_type, memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); memory_region_set_enabled(&f->smram, true); memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); + s->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); memory_region_set_enabled(&f->low_smram, true); memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&f->smram)); - init_pam(&f->pam_regions[0], OBJECT(d), f->ram_memory, f->system_memory, - f->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); + init_pam(&f->pam_regions[0], OBJECT(d), s->ram_memory, s->system_memory, + s->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); for (i = 0; i < ARRAY_SIZE(f->pam_regions) - 1; ++i) { - init_pam(&f->pam_regions[i + 1], OBJECT(d), f->ram_memory, - f->system_memory, f->pci_address_space, + init_pam(&f->pam_regions[i + 1], OBJECT(d), s->ram_memory, + s->system_memory, s->pci_address_space, PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } From patchwork Fri Jun 30 07:37:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F4A5EB64DA for ; Fri, 30 Jun 2023 07:39:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hb-0002J6-Us; Fri, 30 Jun 2023 03:38:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hO-00026Z-Bt for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:48 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hM-0005R5-9Q for qemu-devel@nongnu.org; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:41 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 13/17] hw/pci-host/i440fx: Add PCI_HOST_PROP_IO_MEM property Date: Fri, 30 Jun 2023 09:37:16 +0200 Message-ID: <20230630073720.21297-14-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce the property in anticipation of QOM'ification; Q35 has the same property. Signed-off-by: Bernhard Beschow --- hw/pci-host/i440fx.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index b9530fc3a0..de14c75e95 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -27,7 +27,6 @@ #include "qemu/range.h" #include "hw/i386/pc.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/i440fx.h" #include "hw/qdev-properties.h" @@ -49,6 +48,7 @@ struct I440FXState { PCIHostState parent_obj; MemoryRegion *system_memory; + MemoryRegion *io_memory; MemoryRegion *pci_address_space; MemoryRegion *ram_memory; Range pci_hole; @@ -237,17 +237,22 @@ static void i440fx_pcihost_initfn(Object *obj) object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, (Object **) &s->system_memory, qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, + (Object **) &s->io_memory, + qdev_prop_allow_set_link_before_realize, 0); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - memory_region_add_subregion(phb->bus->address_space_io, 0xcf8, &phb->conf_mem); + memory_region_add_subregion(s->io_memory, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); - memory_region_add_subregion(phb->bus->address_space_io, 0xcfc, &phb->data_mem); + memory_region_add_subregion(s->io_memory, 0xcfc, &phb->data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); /* register i440fx 0xcf8 port as coalesced pio */ @@ -273,11 +278,12 @@ PCIBus *i440fx_init(const char *pci_type, unsigned i; s->system_memory = address_space_mem; + s->io_memory = address_space_io; s->pci_address_space = pci_address_space; s->ram_memory = ram_memory; b = pci_root_bus_new(dev, NULL, s->pci_address_space, - address_space_io, 0, TYPE_PCI_BUS); + s->io_memory, 0, TYPE_PCI_BUS); phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); From patchwork Fri Jun 30 07:37:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2DC5EB64D7 for ; Fri, 30 Jun 2023 07:39:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hi-0002WO-MX; Fri, 30 Jun 2023 03:38:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hQ-000274-Al for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:48 -0400 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hO-0005RI-3n for qemu-devel@nongnu.org; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:43 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 14/17] hw/pci-host/i440fx: Add PCI_HOST_{ABOVE, BELOW}_4G_MEM_SIZE properties Date: Fri, 30 Jun 2023 09:37:17 +0200 Message-ID: <20230630073720.21297-15-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=shentey@gmail.com; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce the properties in anticipation of QOM'ification; Q35 has the same properties. Note that we want to avoid a "ram size" property in the QOM interface since it seems redundant to both properties introduced in this change. Thus the removal of the ram_size parameter. We assume the invariant of both properties to sum up to "ram size" which is already asserted in pc_memory_init(). Under Xen the invariant seems to hold as well, so we now also check it there. Signed-off-by: Bernhard Beschow --- include/hw/pci-host/i440fx.h | 1 - hw/i386/pc_piix.c | 5 ++++- hw/pci-host/i440fx.c | 12 ++++++++++-- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index e3a550021e..7e38456ebb 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -36,7 +36,6 @@ PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, - ram_addr_t ram_size, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_memory, diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 26e8473a4d..c36783809f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -224,6 +224,9 @@ static void pc_init1(MachineState *machine, if (!xen_enabled()) { pc_memory_init(pcms, system_memory, rom_memory, hole64_size); } else { + assert(machine->ram_size == x86ms->below_4g_mem_size + + x86ms->above_4g_mem_size); + pc_system_flash_cleanup_unused(pcms); if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ @@ -239,7 +242,7 @@ static void pc_init1(MachineState *machine, pci_bus = i440fx_init(pci_type, i440fx_host, - system_memory, system_io, machine->ram_size, + system_memory, system_io, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size, pci_memory, ram_memory); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index de14c75e95..8731740a1b 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -52,6 +52,8 @@ struct I440FXState { MemoryRegion *pci_address_space; MemoryRegion *ram_memory; Range pci_hole; + uint64_t below_4g_mem_size; + uint64_t above_4g_mem_size; uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; @@ -264,7 +266,6 @@ PCIBus *i440fx_init(const char *pci_type, DeviceState *dev, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, - ram_addr_t ram_size, ram_addr_t below_4g_mem_size, ram_addr_t above_4g_mem_size, MemoryRegion *pci_address_space, @@ -281,6 +282,8 @@ PCIBus *i440fx_init(const char *pci_type, s->io_memory = address_space_io; s->pci_address_space = pci_address_space; s->ram_memory = ram_memory; + s->below_4g_mem_size = below_4g_mem_size; + s->above_4g_mem_size = above_4g_mem_size; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->io_memory, 0, TYPE_PCI_BUS); @@ -290,7 +293,7 @@ PCIBus *i440fx_init(const char *pci_type, d = pci_create_simple(b, 0, pci_type); f = I440FX_PCI_DEVICE(d); - range_set_bounds(&s->pci_hole, below_4g_mem_size, + range_set_bounds(&s->pci_hole, s->below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ @@ -321,6 +324,7 @@ PCIBus *i440fx_init(const char *pci_type, PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } + ram_addr_t ram_size = s->below_4g_mem_size + s->above_4g_mem_size; ram_size = ram_size / 8 / 1024 / 1024; if (ram_size > 255) { ram_size = 255; @@ -380,6 +384,10 @@ static Property i440fx_props[] = { DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState, pci_hole64_size, I440FX_PCI_HOST_HOLE64_SIZE_DEFAULT), DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0), + DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MEM_SIZE, I440FXState, + below_4g_mem_size, 0), + DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, I440FXState, + above_4g_mem_size, 0), DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true), DEFINE_PROP_END_OF_LIST(), }; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:43 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 15/17] hw/pci-host/i440fx: Add I440FX_HOST_PROP_PCI_TYPE property Date: Fri, 30 Jun 2023 09:37:18 +0200 Message-ID: <20230630073720.21297-16-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=shentey@gmail.com; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org I440FX needs a different PCI device model if the "igd-passthru" property is enabled. The type name is currently passed as a parameter to i440fx_init(). This parameter will be replaced by a property assignment once i440fx_init() gets resolved. Signed-off-by: Bernhard Beschow --- include/hw/pci-host/i440fx.h | 2 ++ hw/pci-host/i440fx.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index 7e38456ebb..2d7bae5a45 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -15,6 +15,8 @@ #include "hw/pci-host/pam.h" #include "qom/object.h" +#define I440FX_HOST_PROP_PCI_TYPE "pci-type" + #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 8731740a1b..c458987405 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -57,6 +57,8 @@ struct I440FXState { uint64_t pci_hole64_size; bool pci_hole64_fix; uint32_t short_root_bus; + + char *pci_type; }; #define I440FX_PAM 0x59 @@ -284,13 +286,14 @@ PCIBus *i440fx_init(const char *pci_type, s->ram_memory = ram_memory; s->below_4g_mem_size = below_4g_mem_size; s->above_4g_mem_size = above_4g_mem_size; + s->pci_type = (char *)pci_type; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->io_memory, 0, TYPE_PCI_BUS); phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - d = pci_create_simple(b, 0, pci_type); + d = pci_create_simple(b, 0, s->pci_type); f = I440FX_PCI_DEVICE(d); range_set_bounds(&s->pci_hole, s->below_4g_mem_size, @@ -389,6 +392,7 @@ static Property i440fx_props[] = { DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, I440FXState, above_4g_mem_size, 0), DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true), + DEFINE_PROP_STRING(I440FX_HOST_PROP_PCI_TYPE, I440FXState, pci_type), DEFINE_PROP_END_OF_LIST(), }; From patchwork Fri Jun 30 07:37:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BA2E7EB64DA for ; Fri, 30 Jun 2023 07:38:48 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qF8hb-0002GZ-7U; Fri, 30 Jun 2023 03:37:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qF8hR-00027N-Sv for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:51 -0400 Received: from mail-lj1-x235.google.com ([2a00:1450:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qF8hQ-0005Rz-1K for qemu-devel@nongnu.org; Fri, 30 Jun 2023 03:37:49 -0400 Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2b69e6cce7dso23719851fa.2 for ; Fri, 30 Jun 2023 00:37:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1688110665; x=1690702665; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zD7WAfiiRPEcVDryUR/zQvvkHlVUEwejF/uIZK/1fXo=; b=GTgbgU4wuMSLSCf01HhlN4x42O7wpg/+QFB+UucutI8d8eGk3XhpnxPFaS9rto4Nl2 MCkwJkV+RzqEGrw8qHVZpntxR7V0Up15bPecEQydIJslIyRuKqr0Yuh767xyJpUPHBz1 v9KTMRDK4gKibSZhXBtk1g1E5fj4nONubjJPOgM4v6zKqt+JYZC4PIW6DE8Al2bDSB3/ fHf+1o0BAYr9X6MvdUMBkzLLqW/ArMaa1lMQFQ96wOaQsBWVA1KiIQ5+4XZjrHd9+zvT 73CzJsY2GxKK7doq097Nlo47QU1cQT0f4ggjBwIZMSk0esnfFg2BshQjPgjpYX6lEETG LseA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688110665; x=1690702665; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zD7WAfiiRPEcVDryUR/zQvvkHlVUEwejF/uIZK/1fXo=; b=MKFcVrlGnfdt5hUxOStrZJvP8LJ/V7hQzNxv+Fcr/DEhf0hlClunLgxuFn2TiZ/YZo keeZubd3Zr3DRxhQTTiM2Fiq+zMqSzBi0jNI1/iw/CxfhNaHhZigC7q3RcDWbRKZsUdB HexeFPvm7iKCvUo0dU5HaflreCF8yBxIlcS6KafmKwMkUR0/UPS6B72/5qjGnBhJALm6 r+1nDRcgTz3QJskQOgRODnu+1e/uV7Cdlz9aOdd0SfeeMlWBJkIdieh6TnVAYdMnpd5T U6aXhK89iL4RgQvM92HXI9hyNcutiMPXNadMoAy1x41TX7AMeLLEniz0h6/QeZ+RccLE fN2Q== X-Gm-Message-State: ABy/qLY4G6rhyt9Ea+M7sj/ybxSWtPUGr1Ron5vPHuRj/65gFICNOa9F vhqX88GOCIA0nCQmQVIa6FlYhQfN7lM= X-Google-Smtp-Source: APBJJlGeJJql8TUkBGfNFmZUNb/l611P5R0BLd9ync1+GJimCNNMu0nB4bjjyVUs355+J6/tqrUL3A== X-Received: by 2002:a2e:9b85:0:b0:2b6:c864:5d28 with SMTP id z5-20020a2e9b85000000b002b6c8645d28mr1518552lji.38.1688110665105; Fri, 30 Jun 2023 00:37:45 -0700 (PDT) Received: from archlinux.. (dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:44 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 16/17] hw/pci-host/i440fx: Resolve i440fx_init() Date: Fri, 30 Jun 2023 09:37:19 +0200 Message-ID: <20230630073720.21297-17-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=shentey@gmail.com; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org i440fx_init() is a legacy init function. The previous patches worked towards TYPE_I440FX_PCI_HOST_BRIDGE to be instantiated the QOM way. Do this now by transforming the parameters passed to i440fx_init() into property assignments. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- include/hw/pci-host/i440fx.h | 10 ---------- hw/i386/pc_piix.c | 32 +++++++++++++++++++++----------- hw/pci-host/i440fx.c | 33 +++++---------------------------- 3 files changed, 26 insertions(+), 49 deletions(-) diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index 2d7bae5a45..c988f70890 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -34,14 +34,4 @@ struct PCII440FXState { #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" -PCIBus *i440fx_init(const char *pci_type, - DeviceState *dev, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_memory, - MemoryRegion *ram_memory); - - #endif diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index c36783809f..62148d7636 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -126,7 +126,7 @@ static void pc_init1(MachineState *machine, MemoryRegion *rom_memory = system_memory; ram_addr_t lowmem; uint64_t hole64_size = 0; - DeviceState *i440fx_host = NULL; + Object *phb = NULL; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -201,10 +201,9 @@ static void pc_init1(MachineState *machine, pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; - i440fx_host = qdev_new(host_type); - object_property_add_child(OBJECT(machine), "i440fx", - OBJECT(i440fx_host)); - hole64_size = object_property_get_uint(OBJECT(i440fx_host), + phb = OBJECT(qdev_new(host_type)); + object_property_add_child(OBJECT(machine), "i440fx", phb); + hole64_size = object_property_get_uint(phb, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); } @@ -240,12 +239,23 @@ static void pc_init1(MachineState *machine, PIIX3State *piix3; PCIDevice *pci_dev; - pci_bus = i440fx_init(pci_type, - i440fx_host, - system_memory, system_io, - x86ms->below_4g_mem_size, - x86ms->above_4g_mem_size, - pci_memory, ram_memory); + object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, + OBJECT(ram_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, + OBJECT(pci_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, + OBJECT(system_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, + OBJECT(system_io), &error_fatal); + object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, + x86ms->below_4g_mem_size, &error_fatal); + object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, + x86ms->above_4g_mem_size, &error_fatal); + object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, + pci_type, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); + + pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); pci_bus_map_irqs(pci_bus, xen_enabled() ? xen_pci_slot_get_pirq : pc_pci_slot_get_pirq); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index c458987405..62d6287681 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -249,9 +249,14 @@ static void i440fx_pcihost_initfn(Object *obj) static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) { + ERRP_GUARD(); I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + PCIBus *b; + PCIDevice *d; + PCII440FXState *f; + unsigned i; memory_region_add_subregion(s->io_memory, 0xcf8, &phb->conf_mem); sysbus_init_ioports(sbd, 0xcf8, 4); @@ -262,36 +267,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) /* register i440fx 0xcf8 port as coalesced pio */ memory_region_set_flush_coalesced(&phb->data_mem); memory_region_add_coalescing(&phb->conf_mem, 0, 4); -} - -PCIBus *i440fx_init(const char *pci_type, - DeviceState *dev, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_address_space, - MemoryRegion *ram_memory) -{ - I440FXState *s = I440FX_PCI_HOST_BRIDGE(dev); - PCIHostState *phb = PCI_HOST_BRIDGE(dev); - PCIBus *b; - PCIDevice *d; - PCII440FXState *f; - unsigned i; - - s->system_memory = address_space_mem; - s->io_memory = address_space_io; - s->pci_address_space = pci_address_space; - s->ram_memory = ram_memory; - s->below_4g_mem_size = below_4g_mem_size; - s->above_4g_mem_size = above_4g_mem_size; - s->pci_type = (char *)pci_type; b = pci_root_bus_new(dev, NULL, s->pci_address_space, s->io_memory, 0, TYPE_PCI_BUS); phb->bus = b; - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, s->pci_type); f = I440FX_PCI_DEVICE(d); @@ -335,8 +314,6 @@ PCIBus *i440fx_init(const char *pci_type, d->config[I440FX_COREBOOT_RAM_SIZE] = ram_size; i440fx_update_memory_mappings(f); - - return b; } static void i440fx_class_init(ObjectClass *klass, void *data) From patchwork Fri Jun 30 07:37:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13297687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16D2DEB64D7 for ; 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(dynamic-089-012-131-254.89.12.pool.telefonica.de. [89.12.131.254]) by smtp.gmail.com with ESMTPSA id k19-20020a1709061c1300b00988b32160dfsm7625578ejg.222.2023.06.30.00.37.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 00:37:45 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Richard Henderson , Marcel Apfelbaum , Eduardo Habkost , Paolo Bonzini , "Michael S. Tsirkin" , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 17/17] hw/i386/pc_piix: Move i440fx' realize near its qdev_new() Date: Fri, 30 Jun 2023 09:37:20 +0200 Message-ID: <20230630073720.21297-18-shentey@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630073720.21297-1-shentey@gmail.com> References: <20230630073720.21297-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22f; envelope-from=shentey@gmail.com; helo=mail-lj1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org I440FX realization is currently mixed with PIIX3 creation. Furthermore, it is common practice to only set properties between a device's qdev_new() and qdev_realize(). Clean up to resolve both issues. Since I440FX spawns a PCI bus let's also move the pci_bus initialization there. Note that when running `qemu-system-x86_64 -M pc -S` before and after this patch, `info mtree` in the QEMU console doesn't show any differences except that the ordering is different. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 51 ++++++++++++++++++++++++----------------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 62148d7636..b18443d3df 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -114,7 +114,7 @@ static void pc_init1(MachineState *machine, X86MachineState *x86ms = X86_MACHINE(machine); MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_io = get_system_io(); - PCIBus *pci_bus; + PCIBus *pci_bus = NULL; ISABus *isa_bus; int piix3_devfn = -1; qemu_irq smi_irq; @@ -126,7 +126,6 @@ static void pc_init1(MachineState *machine, MemoryRegion *rom_memory = system_memory; ram_addr_t lowmem; uint64_t hole64_size = 0; - Object *phb = NULL; /* * Calculate ram split, for memory below and above 4G. It's a bit @@ -198,11 +197,36 @@ static void pc_init1(MachineState *machine, } if (pcmc->pci_enabled) { + Object *phb; + pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; + phb = OBJECT(qdev_new(host_type)); object_property_add_child(OBJECT(machine), "i440fx", phb); + object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, + OBJECT(ram_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, + OBJECT(pci_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, + OBJECT(system_memory), &error_fatal); + object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, + OBJECT(system_io), &error_fatal); + object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, + x86ms->below_4g_mem_size, &error_fatal); + object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, + x86ms->above_4g_mem_size, &error_fatal); + object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type, + &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); + + pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); + pci_bus_map_irqs(pci_bus, + xen_enabled() ? xen_pci_slot_get_pirq + : pc_pci_slot_get_pirq); + pcms->bus = pci_bus; + hole64_size = object_property_get_uint(phb, PCI_HOST_PROP_PCI_HOLE64_SIZE, &error_abort); @@ -239,28 +263,6 @@ static void pc_init1(MachineState *machine, PIIX3State *piix3; PCIDevice *pci_dev; - object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM, - OBJECT(ram_memory), &error_fatal); - object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM, - OBJECT(pci_memory), &error_fatal); - object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM, - OBJECT(system_memory), &error_fatal); - object_property_set_link(phb, PCI_HOST_PROP_IO_MEM, - OBJECT(system_io), &error_fatal); - object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE, - x86ms->below_4g_mem_size, &error_fatal); - object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE, - x86ms->above_4g_mem_size, &error_fatal); - object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, - pci_type, &error_fatal); - sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal); - - pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0")); - pci_bus_map_irqs(pci_bus, - xen_enabled() ? xen_pci_slot_get_pirq - : pc_pci_slot_get_pirq); - pcms->bus = pci_bus; - pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, TYPE_PIIX3_DEVICE); @@ -285,7 +287,6 @@ static void pc_init1(MachineState *machine, rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev), "rtc")); } else { - pci_bus = NULL; isa_bus = isa_bus_new(NULL, system_memory, system_io, &error_abort);