From patchwork Wed Jul 12 11:41:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4063EB64D9 for ; Wed, 12 Jul 2023 11:42:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232345AbjGLLme (ORCPT ); Wed, 12 Jul 2023 07:42:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231463AbjGLLm1 (ORCPT ); Wed, 12 Jul 2023 07:42:27 -0400 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72D0C1FF5; Wed, 12 Jul 2023 04:42:05 -0700 (PDT) Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36CBb0fk024900; Wed, 12 Jul 2023 11:41:57 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=kfmfKPMqlJpQ1W+rYLjXoTsxcx534AJ9Ak33LCH6Stc=; b=a5ACldzKKMZwnrEw1Oov0i/YHD8ic8wZDzB7ldJ8voSqm3TBSsyaumDmbA6gou1oC+A6 3Fu/+SVkcx/EzDymMy8dvT4NalPJ3FCvrZ5HB+c8+H7nu/r1KT7thptVOZ1LNS/il8d3 w1N4L9upkg9wNbk0DFIQ8GyvapIP+oRcL1E7TpJSo33pTfHdkIcf3CdF6lGumBpX8rPC mUGsjbFbFVYs3YdXC7X1o/12p2W2sQSo6eDttOB1nGO+XPaj8v0CBhDX8uiF1I4kF7nx bwa9QZzLvcqKNbA0naxUGzpXlEUACFiUkzDRdD9xSnYdqcAkK0ypy6vDLS+b/3LDsz3t MA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rsuaugat0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:56 +0000 Received: from m0353729.ppops.net (m0353729.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 36CBb9Fg026573; Wed, 12 Jul 2023 11:41:55 GMT Received: from ppma06fra.de.ibm.com (48.49.7a9f.ip4.static.sl-reverse.com [159.122.73.72]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rsuaugarg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:55 +0000 Received: from pps.filterd (ppma06fra.de.ibm.com [127.0.0.1]) by ppma06fra.de.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 36C149Nw013796; Wed, 12 Jul 2023 11:41:53 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma06fra.de.ibm.com (PPS) with ESMTPS id 3rpy2e9w30-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:53 +0000 Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 36CBfnXO57606448 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D8D8320040; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B67B32004B; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 1/6] lib: s390x: introduce bitfield for PSW mask Date: Wed, 12 Jul 2023 13:41:44 +0200 Message-Id: <20230712114149.1291580-2-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Xkv1Ag9TGgqAdZ8Uyx52mK5LUbGDa9e9 X-Proofpoint-GUID: jqENdIRbQIDL8fu0FU4DJDeY70AeSHDh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=643 clxscore=1015 mlxscore=0 malwarescore=0 adultscore=0 impostorscore=0 suspectscore=0 bulkscore=0 phishscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Changing the PSW mask is currently little clumsy, since there is only the PSW_MASK_* defines. This makes it hard to change e.g. only the address space in the current PSW without a lot of bit fiddling. Introduce a bitfield for the PSW mask. This makes this kind of modifications much simpler and easier to read. Signed-off-by: Nico Boehr --- lib/s390x/asm/arch_def.h | 26 +++++++++++++++++++++++++- s390x/selftest.c | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index bb26e008cc68..53279572a9ee 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -37,12 +37,36 @@ struct stack_frame_int { }; struct psw { - uint64_t mask; + union { + uint64_t mask; + struct { + uint8_t reserved00:1; + uint8_t per:1; + uint8_t reserved02:3; + uint8_t dat:1; + uint8_t io:1; + uint8_t ext:1; + uint8_t key:4; + uint8_t reserved12:1; + uint8_t mchk:1; + uint8_t wait:1; + uint8_t pstate:1; + uint8_t as:2; + uint8_t cc:2; + uint8_t prg_mask:4; + uint8_t reserved24:7; + uint8_t ea:1; + uint8_t ba:1; + uint32_t reserved33:31; + }; + }; uint64_t addr; }; +_Static_assert(sizeof(struct psw) == 16, "PSW size"); #define PSW(m, a) ((struct psw){ .mask = (m), .addr = (uint64_t)(a) }) + struct short_psw { uint32_t mask; uint32_t addr; diff --git a/s390x/selftest.c b/s390x/selftest.c index 13fd36bc06f8..8d81ba312279 100644 --- a/s390x/selftest.c +++ b/s390x/selftest.c @@ -74,6 +74,45 @@ static void test_malloc(void) report_prefix_pop(); } +static void test_psw_mask(void) +{ + uint64_t expected_key = 0xF; + struct psw test_psw = PSW(0, 0); + + report_prefix_push("PSW mask"); + test_psw.dat = 1; + report(test_psw.mask == PSW_MASK_DAT, "DAT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_DAT, test_psw.mask); + + test_psw.mask = 0; + test_psw.io = 1; + report(test_psw.mask == PSW_MASK_IO, "IO matches expected=0x%016lx actual=0x%016lx", PSW_MASK_IO, test_psw.mask); + + test_psw.mask = 0; + test_psw.ext = 1; + report(test_psw.mask == PSW_MASK_EXT, "EXT matches expected=0x%016lx actual=0x%016lx", PSW_MASK_EXT, test_psw.mask); + + test_psw.mask = expected_key << (63 - 11); + report(test_psw.key == expected_key, "PSW Key matches expected=0x%lx actual=0x%x", expected_key, test_psw.key); + + test_psw.mask = 1UL << (63 - 13); + report(test_psw.mchk, "MCHK matches"); + + test_psw.mask = 0; + test_psw.wait = 1; + report(test_psw.mask == PSW_MASK_WAIT, "Wait matches expected=0x%016lx actual=0x%016lx", PSW_MASK_WAIT, test_psw.mask); + + test_psw.mask = 0; + test_psw.pstate = 1; + report(test_psw.mask == PSW_MASK_PSTATE, "Pstate matches expected=0x%016lx actual=0x%016lx", PSW_MASK_PSTATE, test_psw.mask); + + test_psw.mask = 0; + test_psw.ea = 1; + test_psw.ba = 1; + report(test_psw.mask == PSW_MASK_64, "BA/EA matches expected=0x%016lx actual=0x%016lx", PSW_MASK_64, test_psw.mask); + + report_prefix_pop(); +} + int main(int argc, char**argv) { report_prefix_push("selftest"); @@ -89,6 +128,7 @@ int main(int argc, char**argv) test_fp(); test_pgm_int(); test_malloc(); + test_psw_mask(); return report_summary(); } From patchwork Wed Jul 12 11:41:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 023B0C00528 for ; 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Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0CEED2004B; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DEB6220043; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:49 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 2/6] s390x: add function to set DAT mode for all interrupts Date: Wed, 12 Jul 2023 13:41:45 +0200 Message-Id: <20230712114149.1291580-3-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ekQI-tZ3AgpdxsG2JFLQtMlWd_KcO_6X X-Proofpoint-ORIG-GUID: iQZjT_llc4fYC1NXWDCF2Uua0IWXC4Y1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 phishscore=0 mlxlogscore=536 priorityscore=1501 bulkscore=0 spamscore=0 suspectscore=0 mlxscore=0 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When toggling DAT or switch address space modes, it is likely that interrupts should be handled in the same DAT or address space mode. Add a function which toggles DAT and address space mode for all interruptions, except restart interrupts. Signed-off-by: Nico Boehr --- lib/s390x/asm/interrupt.h | 4 ++++ lib/s390x/interrupt.c | 36 ++++++++++++++++++++++++++++++++++++ lib/s390x/mmu.c | 5 +++-- 3 files changed, 43 insertions(+), 2 deletions(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 35c1145f0349..55759002dce2 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -83,6 +83,10 @@ void expect_ext_int(void); uint16_t clear_pgm_int(void); void check_pgm_int_code(uint16_t code); +#define IRQ_DAT_ON true +#define IRQ_DAT_OFF false +void irq_set_dat_mode(bool dat, uint64_t as); + /* Activate low-address protection */ static inline void low_prot_enable(void) { diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index 3f993a363ae2..9b1bc6ce819d 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -9,6 +9,7 @@ */ #include #include +#include #include #include #include @@ -104,6 +105,41 @@ void register_ext_cleanup_func(void (*f)(struct stack_frame_int *)) THIS_CPU->ext_cleanup_func = f; } +/** + * irq_set_dat_mode - Set the DAT mode of all interrupt handlers, except for + * restart. + * This will update the DAT mode and address space mode of all interrupt new + * PSWs. + * + * Since enabling DAT needs initalized CRs and the restart new PSW is often used + * to initalize CRs, the restart new PSW is never touched to avoid the chicken + * and egg situation. + * + * @dat specifies whether to use DAT or not + * @as specifies the address space mode to use - one of AS_PRIM, AS_ACCR, + * AS_SECN or AS_HOME. + */ +void irq_set_dat_mode(bool dat, uint64_t as) +{ + struct psw* irq_psws[] = { + OPAQUE_PTR(GEN_LC_EXT_NEW_PSW), + OPAQUE_PTR(GEN_LC_SVC_NEW_PSW), + OPAQUE_PTR(GEN_LC_PGM_NEW_PSW), + OPAQUE_PTR(GEN_LC_MCCK_NEW_PSW), + OPAQUE_PTR(GEN_LC_IO_NEW_PSW), + }; + struct psw *psw; + + assert(as == AS_PRIM || as == AS_ACCR || as == AS_SECN || as == AS_HOME); + + for (size_t i = 0; i < ARRAY_SIZE(irq_psws); i++) { + psw = irq_psws[i]; + psw->dat = dat; + if (dat) + psw->as = as; + } +} + static void fixup_pgm_int(struct stack_frame_int *stack) { /* If we have an error on SIE we directly move to sie_exit */ diff --git a/lib/s390x/mmu.c b/lib/s390x/mmu.c index b474d7021d3f..199bd3fbc9c8 100644 --- a/lib/s390x/mmu.c +++ b/lib/s390x/mmu.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "mmu.h" @@ -41,8 +42,8 @@ static void mmu_enable(pgd_t *pgtable) /* enable dat (primary == 0 set as default) */ enable_dat(); - /* we can now also use DAT unconditionally in our PGM handler */ - lowcore.pgm_new_psw.mask |= PSW_MASK_DAT; + /* we can now also use DAT in all interrupt handlers */ + irq_set_dat_mode(IRQ_DAT_ON, AS_PRIM); } /* From patchwork Wed Jul 12 11:41:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310194 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D2FBEB64D9 for ; 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Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 354DE20043; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 12E7220040; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 3/6] s390x: sie: switch to home space mode before entering SIE Date: Wed, 12 Jul 2023 13:41:46 +0200 Message-Id: <20230712114149.1291580-4-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BY8whw9kGInAyybOC4l3gGXIrHhjqBDW X-Proofpoint-ORIG-GUID: U33eF2fWQRO4q_4EB-mi_eJwHCCqEnDl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=999 bulkscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 mlxscore=0 suspectscore=0 priorityscore=1501 spamscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This is to prepare for running guests without MSO/MSL, which is currently not possible. We already have code in sie64a to setup a guest primary ASCE before entering SIE, so we can in theory switch to the page tables which translate gpa to hpa. But the host is running in primary space mode already, so changing the primary ASCE before entering SIE will also affect the host's code and data. To make this switch useful, the host should run in a different address space mode. Hence, set up and change to home address space mode before installing the guest ASCE. The home space ASCE is just copied over from the primary space ASCE, so no functional change is intended, also for tests that want to use MSO/MSL. If a test intends to use a different primary space ASCE, it can now just set the guest.asce in the save_area. Signed-off-by: Nico Boehr --- lib/s390x/asm/arch_def.h | 1 + lib/s390x/sie.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index 53279572a9ee..65e1cf58c7e7 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -91,6 +91,7 @@ struct cpu { #define AS_HOME 3 #define PSW_MASK_DAT 0x0400000000000000UL +#define PSW_MASK_HOME 0x0000C00000000000UL #define PSW_MASK_IO 0x0200000000000000UL #define PSW_MASK_EXT 0x0100000000000000UL #define PSW_MASK_KEY 0x00F0000000000000UL diff --git a/lib/s390x/sie.c b/lib/s390x/sie.c index 9241b4b4a512..ffa8ec91a423 100644 --- a/lib/s390x/sie.c +++ b/lib/s390x/sie.c @@ -46,6 +46,8 @@ void sie_handle_validity(struct vm *vm) void sie(struct vm *vm) { + uint64_t old_cr13; + if (vm->sblk->sdf == 2) memcpy(vm->sblk->pv_grregs, vm->save_area.guest.grs, sizeof(vm->save_area.guest.grs)); @@ -53,6 +55,16 @@ void sie(struct vm *vm) /* Reset icptcode so we don't trip over it below */ vm->sblk->icptcode = 0; + /* set up home address space to match primary space */ + old_cr13 = stctg(13); + lctlg(13, stctg(1)); + + /* switch to home space so guest tables can be different from host */ + psw_mask_set_bits(PSW_MASK_HOME); + + /* also handle all interruptions in home space while in SIE */ + irq_set_dat_mode(IRQ_DAT_ON, AS_HOME); + while (vm->sblk->icptcode == 0) { sie64a(vm->sblk, &vm->save_area); sie_handle_validity(vm); @@ -60,6 +72,12 @@ void sie(struct vm *vm) vm->save_area.guest.grs[14] = vm->sblk->gg14; vm->save_area.guest.grs[15] = vm->sblk->gg15; + irq_set_dat_mode(IRQ_DAT_ON, AS_PRIM); + psw_mask_clear_bits(PSW_MASK_HOME); + + /* restore the old CR 13 */ + lctlg(13, old_cr13); + if (vm->sblk->sdf == 2) memcpy(vm->save_area.guest.grs, vm->sblk->pv_grregs, sizeof(vm->save_area.guest.grs)); From patchwork Wed Jul 12 11:41:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68DE5EB64DA for ; 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Wed, 12 Jul 2023 11:41:56 +0000 Received: from m0353725.ppops.net (m0353725.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 36CBXoLm001160; Wed, 12 Jul 2023 11:41:55 GMT Received: from ppma05fra.de.ibm.com (6c.4a.5195.ip4.static.sl-reverse.com [149.81.74.108]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3rsudercpf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:55 +0000 Received: from pps.filterd (ppma05fra.de.ibm.com [127.0.0.1]) by ppma05fra.de.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 36CAuxY0018973; Wed, 12 Jul 2023 11:41:54 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma05fra.de.ibm.com (PPS) with ESMTPS id 3rpye59w2w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Jul 2023 11:41:53 +0000 Received: from smtpav04.fra02v.mail.ibm.com (smtpav04.fra02v.mail.ibm.com [10.20.54.103]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 36CBfoUA31523474 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6694F20040; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3B3C52004B; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 4/6] s390x: lib: don't forward PSW when handling exception in SIE Date: Wed, 12 Jul 2023 13:41:47 +0200 Message-Id: <20230712114149.1291580-5-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: D6_K8l9ULeoPPnoZckfNhhrzcKydHuop X-Proofpoint-ORIG-GUID: ezPfTNNf8bMpeXax-acy-Tq0JRrHqMRM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 spamscore=0 adultscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When we're handling a pgm int in SIE, we want to return to the SIE cleanup after handling the exception. That's why we set pgm_old_psw to the sie_exit label in fixup_pgm_int. On nullifing pgm ints, fixup_pgm_int will also forward the old PSW such that we don't cause an pgm int again. However, when we want to return to the sie_exit label, this is not needed (since we've manually set pgm_old_psw). Instead, forwarding the PSW might cause us to skip an instruction or end up in the middle of an instruction. So, let's just skip the rest of the fixup in case we're inside SIE. Note that we're intentionally not fixing up the PSW in the guest; that's best left to the test at hand by registering their own psw fixup. Signed-off-by: Nico Boehr --- lib/s390x/interrupt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index 9b1bc6ce819d..5653220d166e 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -146,6 +146,7 @@ static void fixup_pgm_int(struct stack_frame_int *stack) if (lowcore.pgm_old_psw.addr >= (uint64_t)&sie_entry && lowcore.pgm_old_psw.addr <= (uint64_t)&sie_exit) { lowcore.pgm_old_psw.addr = (uint64_t)&sie_exit; + return; } switch (lowcore.pgm_int_code) { From patchwork Wed Jul 12 11:41:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D9C0EB64DA for ; Wed, 12 Jul 2023 11:42:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231213AbjGLLmh (ORCPT ); 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Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8EA2520040; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6C89B20043; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 5/6] s390x: lib: sie: don't reenter SIE on pgm int Date: Wed, 12 Jul 2023 13:41:48 +0200 Message-Id: <20230712114149.1291580-6-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: doQoExXep4yvSmjB46LSl0mZzX0b0WM5 X-Proofpoint-GUID: Fkbdz6iMncn9IYjaKW41qUFKfeXuxkCn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=23 lowpriorityscore=0 mlxlogscore=53 clxscore=1015 mlxscore=23 malwarescore=0 adultscore=0 impostorscore=0 suspectscore=0 bulkscore=0 phishscore=0 priorityscore=1501 spamscore=23 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org At the moment, when a PGM int occurs while in SIE, we will just reenter SIE after the interrupt handler was called. This is because sie() has a loop which checks icptcode and re-enters SIE if it is zero. However, this behaviour is quite undesirable for SIE tests, since it doesn't give the host the chance to assert on the PGM int. Instead, we will just re-enter SIE, on nullifing conditions even causing the exception again. In sie(), check whether a pgm int code is set in lowcore. If it has, exit the loop so the test can react to the interrupt. Add a new function read_pgm_int_code() to obtain the interrupt code. Note that this introduces a slight oddity with sie and pgm int in certain cases: If a PGM int occurs between a expect_pgm_int() and sie(), we will now never enter SIE until the pgm_int_code is cleared by e.g. clear_pgm_int(). Also add missing include of facility.h to mem.h. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth --- lib/s390x/asm/interrupt.h | 14 ++++++++++++++ lib/s390x/asm/mem.h | 1 + lib/s390x/sie.c | 4 +++- 3 files changed, 18 insertions(+), 1 deletion(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 55759002dce2..9e509d2f4f1e 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -99,4 +99,18 @@ static inline void low_prot_disable(void) ctl_clear_bit(0, CTL0_LOW_ADDR_PROT); } +/** + * read_pgm_int_code - Get the program interruption code of the last pgm int + * on the current CPU. + * + * This is similar to clear_pgm_int(), except that it doesn't clear the + * interruption information from lowcore. + * + * Returns 0 when none occurred. + */ +static inline uint16_t read_pgm_int_code(void) +{ + return lowcore.pgm_int_code; +} + #endif diff --git a/lib/s390x/asm/mem.h b/lib/s390x/asm/mem.h index 64ef59b546a4..94d58c34f53f 100644 --- a/lib/s390x/asm/mem.h +++ b/lib/s390x/asm/mem.h @@ -8,6 +8,7 @@ #ifndef _ASMS390X_MEM_H_ #define _ASMS390X_MEM_H_ #include +#include /* create pointer while avoiding compiler warnings */ #define OPAQUE_PTR(x) ((void *)(((uint64_t)&lowcore) + (x))) diff --git a/lib/s390x/sie.c b/lib/s390x/sie.c index ffa8ec91a423..632740edd431 100644 --- a/lib/s390x/sie.c +++ b/lib/s390x/sie.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -65,7 +66,8 @@ void sie(struct vm *vm) /* also handle all interruptions in home space while in SIE */ irq_set_dat_mode(IRQ_DAT_ON, AS_HOME); - while (vm->sblk->icptcode == 0) { + /* leave SIE when we have an intercept or an interrupt so the test can react to it */ + while (vm->sblk->icptcode == 0 && !read_pgm_int_code()) { sie64a(vm->sblk, &vm->save_area); sie_handle_validity(vm); } From patchwork Wed Jul 12 11:41:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 13310195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA34DC001B0 for ; Wed, 12 Jul 2023 11:42:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231734AbjGLLmb (ORCPT ); Wed, 12 Jul 2023 07:42:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229843AbjGLLm0 (ORCPT ); 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Wed, 12 Jul 2023 11:41:50 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B637020040; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 949962004B; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) Received: from a83lp41.lnxne.boe (unknown [9.152.108.100]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 12 Jul 2023 11:41:50 +0000 (GMT) From: Nico Boehr To: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org Subject: [kvm-unit-tests PATCH v5 6/6] s390x: add a test for SIE without MSO/MSL Date: Wed, 12 Jul 2023 13:41:49 +0200 Message-Id: <20230712114149.1291580-7-nrb@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712114149.1291580-1-nrb@linux.ibm.com> References: <20230712114149.1291580-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Xxu-93m0f_FGWkB8Qa7JM66VHrxtolH7 X-Proofpoint-GUID: N-WPvYfBY_5SMCIc5uMgnRJFC_tHryrD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-12_06,2023-07-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxlogscore=999 malwarescore=0 phishscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307120103 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Since we now have the ability to run guests without MSO/MSL, add a test to make sure this doesn't break. Signed-off-by: Nico Boehr Reviewed-by: Thomas Huth --- s390x/Makefile | 2 + s390x/sie-dat.c | 115 +++++++++++++++++++++++++++++++++++++ s390x/snippets/c/sie-dat.c | 58 +++++++++++++++++++ s390x/unittests.cfg | 3 + 4 files changed, 178 insertions(+) create mode 100644 s390x/sie-dat.c create mode 100644 s390x/snippets/c/sie-dat.c diff --git a/s390x/Makefile b/s390x/Makefile index a80db538810e..4921669ee4c3 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -40,6 +40,7 @@ tests += $(TEST_DIR)/panic-loop-pgm.elf tests += $(TEST_DIR)/migration-sck.elf tests += $(TEST_DIR)/exittime.elf tests += $(TEST_DIR)/ex.elf +tests += $(TEST_DIR)/sie-dat.elf pv-tests += $(TEST_DIR)/pv-diags.elf @@ -120,6 +121,7 @@ snippet_lib = $(snippet_asmlib) lib/auxinfo.o # perquisites (=guests) for the snippet hosts. # $(TEST_DIR)/.elf: snippets = $(SNIPPET_DIR)//.gbin $(TEST_DIR)/mvpg-sie.elf: snippets = $(SNIPPET_DIR)/c/mvpg-snippet.gbin +$(TEST_DIR)/sie-dat.elf: snippets = $(SNIPPET_DIR)/c/sie-dat.gbin $(TEST_DIR)/spec_ex-sie.elf: snippets = $(SNIPPET_DIR)/c/spec_ex.gbin $(TEST_DIR)/pv-diags.elf: pv-snippets += $(SNIPPET_DIR)/asm/snippet-pv-diag-yield.gbin diff --git a/s390x/sie-dat.c b/s390x/sie-dat.c new file mode 100644 index 000000000000..b326995dfa85 --- /dev/null +++ b/s390x/sie-dat.c @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Tests SIE with paging. + * + * Copyright 2023 IBM Corp. + * + * Authors: + * Nico Boehr + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct vm vm; +static pgd_t *guest_root; + +/* keep in sync with TEST_PAGE_COUNT in s390x/snippets/c/sie-dat.c */ +#define GUEST_TEST_PAGE_COUNT 10 + +/* keep in sync with TOTAL_PAGE_COUNT in s390x/snippets/c/sie-dat.c */ +#define GUEST_TOTAL_PAGE_COUNT 256 + +static void test_sie_dat(void) +{ + uint64_t test_page_gpa, test_page_hpa; + uint8_t *test_page_hva, expected_val; + bool contents_match; + uint8_t r1; + + /* guest will tell us the guest physical address of the test buffer */ + sie(&vm); + + r1 = (vm.sblk->ipa & 0xf0) >> 4; + test_page_gpa = vm.save_area.guest.grs[r1]; + test_page_hpa = virt_to_pte_phys(guest_root, (void*)test_page_gpa); + test_page_hva = __va(test_page_hpa); + assert(vm.sblk->icptcode == ICPT_INST && + (vm.sblk->ipa & 0xff00) == 0x8300 && vm.sblk->ipb == 0x9c0000); + report_info("test buffer gpa=0x%lx hva=%p", test_page_gpa, test_page_hva); + + /* guest will now write to the test buffer and we verify the contents */ + sie(&vm); + assert(vm.sblk->icptcode == ICPT_INST && + vm.sblk->ipa == 0x8300 && vm.sblk->ipb == 0x440000); + + contents_match = true; + for (unsigned int i = 0; i < GUEST_TEST_PAGE_COUNT; i++) { + expected_val = 42 + i; + if (test_page_hva[i * PAGE_SIZE] != expected_val) { + report_fail("page %u mismatch actual_val=%x expected_val=%x", + i, test_page_hva[i], expected_val); + contents_match = false; + } + } + report(contents_match, "test buffer contents match"); + + /* the guest will now write to an unmapped address and we check that this causes a segment translation exception */ + report_prefix_push("guest write to unmapped"); + expect_pgm_int(); + sie(&vm); + check_pgm_int_code(PGM_INT_CODE_SEGMENT_TRANSLATION); + report_prefix_pop(); +} + +static void setup_guest(void) +{ + extern const char SNIPPET_NAME_START(c, sie_dat)[]; + extern const char SNIPPET_NAME_END(c, sie_dat)[]; + uint64_t guest_max_addr; + + setup_vm(); + snippet_setup_guest(&vm, false); + + /* allocate a region-1 table */ + guest_root = pgd_alloc_one(); + + /* map guest memory 1:1 */ + guest_max_addr = GUEST_TOTAL_PAGE_COUNT * PAGE_SIZE; + for (uint64_t i = 0; i < guest_max_addr; i += PAGE_SIZE) + install_page(guest_root, __pa(vm.guest_mem + i), (void *)i); + + /* set up storage limit supression - leave mso and msl intact they are ignored anyways */ + vm.sblk->cpuflags |= CPUSTAT_SM; + + /* set up the guest asce */ + vm.save_area.guest.asce = __pa(guest_root) | ASCE_DT_REGION1 | REGION_TABLE_LENGTH; + + snippet_init(&vm, SNIPPET_NAME_START(c, sie_dat), + SNIPPET_LEN(c, sie_dat), SNIPPET_UNPACK_OFF); +} + +int main(void) +{ + report_prefix_push("sie-dat"); + if (!sclp_facilities.has_sief2) { + report_skip("SIEF2 facility unavailable"); + goto done; + } + + setup_guest(); + test_sie_dat(); + sie_guest_destroy(&vm); + +done: + report_prefix_pop(); + return report_summary(); + +} diff --git a/s390x/snippets/c/sie-dat.c b/s390x/snippets/c/sie-dat.c new file mode 100644 index 000000000000..0505e5aba62b --- /dev/null +++ b/s390x/snippets/c/sie-dat.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Snippet used by the sie-dat.c test to verify paging without MSO/MSL + * + * Copyright (c) 2023 IBM Corp + * + * Authors: + * Nico Boehr + */ +#include +#include +#include +#include + +/* keep in sync with GUEST_TEST_PAGE_COUNT in s390x/sie-dat.c */ +#define TEST_PAGE_COUNT 10 +static uint8_t test_page[TEST_PAGE_COUNT * PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); + +/* keep in sync with GUEST_TOTAL_PAGE_COUNT in s390x/sie-dat.c */ +#define TOTAL_PAGE_COUNT 256 + +static inline void force_exit(void) +{ + asm volatile("diag 0,0,0x44\n"); +} + +static inline void force_exit_value(uint64_t val) +{ + asm volatile( + "diag %[val],0,0x9c\n" + : : [val] "d"(val) + ); +} + +int main(void) +{ + uint8_t *invalid_ptr; + + memset(test_page, 0, sizeof(test_page)); + /* tell the host the page's physical address (we're running DAT off) */ + force_exit_value((uint64_t)test_page); + + /* write some value to the page so the host can verify it */ + for (size_t i = 0; i < TEST_PAGE_COUNT; i++) + test_page[i * PAGE_SIZE] = 42 + i; + + /* indicate we've written all pages */ + force_exit(); + + /* the first unmapped address */ + invalid_ptr = (uint8_t *)(TOTAL_PAGE_COUNT * PAGE_SIZE); + *invalid_ptr = 42; + + /* indicate we've written the non-allowed page (should never get here) */ + force_exit(); + + return 0; +} diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg index b61faf0737c3..24cd27202a08 100644 --- a/s390x/unittests.cfg +++ b/s390x/unittests.cfg @@ -218,3 +218,6 @@ extra_params = -append '--parallel' [execute] file = ex.elf + +[sie-dat] +file = sie-dat.elf