From patchwork Wed Jul 19 07:13:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CEEAC001DC for ; Wed, 19 Jul 2023 07:15:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=WSl2rTx4Jbx5bMzj4fGvVSypKQ4/TxVZX9AkRiH3BUs=; b=EZ5QKOkN3d+ORYDmqqqVXzdPA0hp+bnYQQhBomn78z6SVC5VR3Vv7izTwx6kt9Pj wm/vyfnSIIxCdHZjHKiDBe74FIB8hn6rELDyKCKQfz+ZJVVTxVsUAgR+Og/Az5Pe jhvNqBgZPBaoKVETdzEsJlEjAttpk/bILHI/wraP1x8=; X-AuditID: ac14000a-917fe70000007ecb-2b-64b78d8c1adf Received: from berlix.phytec.de (Unknown_Domain [172.25.0.12]) (using TLS with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 03.C3.32459.C8D87B46; Wed, 19 Jul 2023 09:15:24 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Wed, 19 Jul 2023 09:15:15 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH v2 1/7] arm64: dts: imx8mp-phycore-som: Remove eth phy interrupt Date: Wed, 19 Jul 2023 09:13:07 +0200 Message-ID: <20230719071313.3274882-2-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719071313.3274882-1-t.remmet@phytec.de> References: <20230719071313.3274882-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBLMWRmVeSWpSXmKPExsWyRpKBR7end3uKQfcpSYs1e88xWTy86m+x aupOFou+Fw+ZLTY9vsZq0fVrJbNF694j7BZ/t29isXixRdyi+526A5fHzll32T02repk87hz bQ+bx+Yl9R793S2sHhvf7WDy6P9rEMAexWWTkpqTWZZapG+XwJXxbp1twUSeipkth9kbGGdx dTFyckgImEjcav7E3MXIxSEksIRJ4uS7ZhYI5wmjxNTumcwgVWwCGhJPV5xmAkmICJxiklh9 YgZYglnATeLfxvnsILawQIDE5yMbwWwWAVWJY/+3M4HYvAKWEhs6L7FCrJOXmHnpO1gNp4CV xLX+Y2BxIaCaPfseskLUC0qcnPmEBWK+vETz1tlQuyQkDr54wQxRLy+x69JJRpiZ0869Zoaw QyW2ftnONIFRaBaSUbOQjJqFZNQCRuZVjEK5mcnZqUWZ2XoFGZUlqcl6KambGEGxI8LAtYOx b47HIUYmDsZDjBIczEoivI8ub0sR4k1JrKxKLcqPLyrNSS0+xCjNwaIkznu/hylRSCA9sSQ1 OzW1ILUIJsvEwSnVwMi5NDmf9dIF7u/v+FZ7sxtv7TET3jbfSz9+/cey/6WJs+zCTzq6ce5k yOhQEtoV2qCddJHJckF/bfIlzoII7zqbLf0LS8s+Ry5Y7Gqu4fvL/PY81ktSfAd9vHl/Rnf/ Z/ayTHql175udfO9uNeP0mPcX8z8yCAwPVrzc2pmGNsFofIXtpUsSizFGYmGWsxFxYkAYn8/ nosCAAA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_001531_186962_01E86F8D X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Christian Hemp In some occasions the ethernet phy IRQ can not be detected correctly by the SoC. This leads to a non detected link in Linux. The problem is caused by the buffer that adjusts the voltage between ethernet phy and SoC. To workaround this, remove the IRQ support for the ethernet phy and use polling instead. Signed-off-by: Christian Hemp Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index ecc4bce6db97..e73f1711ec89 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -54,8 +54,6 @@ mdio { ethphy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; @@ -222,7 +220,6 @@ MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 - MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11 >; }; From patchwork Wed Jul 19 07:13:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2091CC0015E for ; Wed, 19 Jul 2023 07:16:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uP/VlcIqAe36JvPdzDCgURkLJFpgVa0fVCsVxGGwddU=; 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Signed-off-by: Teresa Remmet --- Changes in v2: - Rearranged nodes as suggested by Shawn - Updated commit message accordingly --- .../dts/freescale/imx8mp-phycore-som.dtsi | 120 +++++++++--------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index e73f1711ec89..0989104a06e2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -42,8 +42,8 @@ &A53_3 { &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; - phy-mode = "rgmii-id"; phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; fsl,magic-packet; status = "okay"; @@ -54,12 +54,12 @@ mdio { ethphy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; - ti,rx-internal-delay = ; - ti,tx-internal-delay = ; - ti,fifo-depth = ; + enet-phy-lane-no-swap; ti,clk-output-sel = ; + ti,fifo-depth = ; ti,min-output-impedance; - enet-phy-lane-no-swap; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; }; }; }; @@ -73,8 +73,8 @@ som_flash: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; - spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; }; }; @@ -83,89 +83,89 @@ &i2c1 { pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; - sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; pmic: pmic@25 { - reg = <0x25>; compatible = "nxp,pca9450c"; + reg = <0x25>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio4>; - interrupts = <18 IRQ_TYPE_LEVEL_LOW>; regulators { buck1: BUCK1 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <2187500>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2187500>; + regulator-min-microvolt = <600000>; regulator-ramp-delay = <3125>; }; buck2: BUCK2 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <2187500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; nxp,dvs-run-voltage = <950000>; nxp,dvs-standby-voltage = <850000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2187500>; + regulator-min-microvolt = <600000>; + regulator-ramp-delay = <3125>; }; buck4: BUCK4 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3400000>; + regulator-min-microvolt = <600000>; }; buck5: BUCK5 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3400000>; + regulator-min-microvolt = <600000>; }; buck6: BUCK6 { - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3400000>; + regulator-min-microvolt = <600000>; }; ldo1: LDO1 { - regulator-min-microvolt = <1600000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1600000>; }; ldo2: LDO2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1150000>; + regulator-min-microvolt = <800000>; }; ldo3: LDO3 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <800000>; }; ldo4: LDO4 { - regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <800000>; }; ldo5: LDO5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; }; }; }; @@ -213,13 +213,13 @@ MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 - MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x12 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x12 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 >; }; @@ -236,8 +236,8 @@ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 >; }; @@ -256,49 +256,49 @@ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x141 pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 >; }; pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 >; }; pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < - MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 - MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2 - MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2 - MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2 - MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2 - MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 >; }; From patchwork Wed Jul 19 07:13:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE47FEB64DA for ; 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Wed, 19 Jul 2023 09:15:25 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Wed, 19 Jul 2023 09:15:25 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH v2 3/7] arm64: dts: imx8mp-phycore-som: Correct pad settings Date: Wed, 19 Jul 2023 09:13:09 +0200 Message-ID: <20230719071313.3274882-4-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719071313.3274882-1-t.remmet@phytec.de> References: <20230719071313.3274882-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrOLMWRmVeSWpSXmKPExsWyRpKBR7e3d3uKweznJhZr9p5jsnh41d9i 1dSdLBZ9Lx4yW2x6fI3VouvXSmaL1r1H2C3+bt/EYvFii7hF9zt1By6PnbPusntsWtXJ5nHn 2h42j81L6j36u1tYPTa+28Hk0f/XIIA9issmJTUnsyy1SN8ugSvjwR7DgkvCFZ96F7I1MG4S 6GLk5JAQMJE40XyUuYuRi0NIYAmTxNcbE5ggnCeMEuv2TGUEqWIT0JB4uuI0WEJE4BSTxOoT M5hBEswCbhL/Ns5n72Lk4BAW8JHYsVYVJMwioCrx/fhcNhCbV8BS4tr3U4wQ2+QlZl76zg5i cwpYSVzrP8YKYgsB1ezZ95AVol5Q4uTMJywQ4+UlmrfOhlolIXHwxQtmiHp5iV2XTsLNnHbu NTOEHSqx9ct2pgmMQrOQjJqFZNQsJKMWMDKvYhTKzUzOTi3KzNYryKgsSU3WS0ndxAiKHBEG rh2MfXM8DjEycTAeYpTgYFYS4X10eVuKEG9KYmVValF+fFFpTmrxIUZpDhYlcd77PUyJQgLp iSWp2ampBalFMFkmDk6pBkbH4k3CCRbPpr0sjN6/2W8ex9/mr4sSVU/eWej07jDj5B/7kvOi 55X/FvJVkDyr3Gfl/8+Jyfjz5o8x/CaOUcmK5w8q6MSkTOdlCLho9e7asjm1zS2JrN8DprvN cTM482b6561Pjy/ZttqgLTK0iyv76wZ1M6PbT08+vLnMRO5KVdFW84rIB3eVWIozEg21mIuK EwGu0PaSigIAAA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_001535_634035_F088C081 X-CRM114-Status: GOOD ( 10.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Do not set reserved bits 0 and 3 in pad configuration. Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- .../dts/freescale/imx8mp-phycore-som.dtsi | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 0989104a06e2..7a187098a9ed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -206,20 +206,20 @@ &wdog1 { &iomuxc { pinctrl_fec: fecgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 - MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 - MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 - MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 - MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 - MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 - MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x12 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x12 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 - MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 >; }; @@ -236,21 +236,21 @@ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 >; }; pinctrl_i2c1_gpio: i2c1gpiogrp { fsl,pins = < - MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e3 - MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e3 + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e2 + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e2 >; }; pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x141 + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x140 >; }; From patchwork Wed Jul 19 07:13:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318418 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C981C0015E for ; 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Wed, 19 Jul 2023 09:15:25 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Wed, 19 Jul 2023 09:15:25 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH v2 4/7] arm64: dts: imx8mp-phycore-som: Remove LDO2 and LDO4 pmic nodes Date: Wed, 19 Jul 2023 09:13:10 +0200 Message-ID: <20230719071313.3274882-5-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719071313.3274882-1-t.remmet@phytec.de> References: <20230719071313.3274882-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJLMWRmVeSWpSXmKPExsWyRpKBR7e3d3uKwYODphZr9p5jsnh41d9i 1dSdLBZ9Lx4yW2x6fI3VouvXSmaL1r1H2C3+bt/EYvFii7hF9zt1By6PnbPusntsWtXJ5nHn 2h42j81L6j36u1tYPTa+28Hk0f/XIIA9issmJTUnsyy1SN8ugSuj7+dR1oIdnBUtXQ/YGxgP sXcxcnJICJhITF08Bcjm4hASWMIkcenbVEYI5wmjxLo9IA4nB5uAhsTTFaeZQBIiAqeYJFaf mMEMkmAWcJP4t3E+2ChhgXCJ4+8nsILYLAKqEp+utIPV8ApYSqy/tZ0RYp28xMxL38HqOQWs JK71HwOrFwKq2bPvIStEvaDEyZlPWCDmy0s0b50NtUtC4uCLF8wQ9fISuy6dhJs57dxrZgg7 VGLrl+1MExiFZiEZNQvJqFlIRi1gZF7FKJSbmZydWpSZrVeQUVmSmqyXkrqJERQ9IgxcOxj7 5ngcYmTiYDzEKMHBrCTC++jythQh3pTEyqrUovz4otKc1OJDjNIcLErivPd7mBKFBNITS1Kz U1MLUotgskwcnFINjBodzH2rX8o032FSl4rx+PZu9fGrfSGxf7Q/sHw65GVQ4Bo6/SeP1Pf3 8afkTvzyTanpda/Wu7Sv8N/PxSoXOz5dEF+l+T1wys2GCG4zxQn36g/xxIZuZMmc7HhaOMxz SuPWFSfTZ97I2e7xUd9AJ63gZZbJl6lx6zadzeoT2j3Nd4dI5LHDs5RYijMSDbWYi4oTAY69 5vyMAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_001535_153483_EEB1328A X-CRM114-Status: GOOD ( 11.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We do not touch LDO2 and LDO4 in linux as they are bypassed. So remove them completely from device tree. Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- .../arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 7a187098a9ed..7f833471837c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -142,13 +142,6 @@ ldo1: LDO1 { regulator-min-microvolt = <1600000>; }; - ldo2: LDO2 { - regulator-always-on; - regulator-boot-on; - regulator-max-microvolt = <1150000>; - regulator-min-microvolt = <800000>; - }; - ldo3: LDO3 { regulator-always-on; regulator-boot-on; @@ -156,11 +149,6 @@ ldo3: LDO3 { regulator-min-microvolt = <800000>; }; - ldo4: LDO4 { - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <800000>; - }; - ldo5: LDO5 { regulator-always-on; regulator-boot-on; From patchwork Wed Jul 19 07:13:11 2023 Content-Type: text/plain; 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Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 7f833471837c..53ba09172cba 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -101,6 +101,7 @@ buck1: BUCK1 { regulator-boot-on; regulator-max-microvolt = <2187500>; regulator-min-microvolt = <600000>; + regulator-name = "VDD_SOC (BUCK1)"; regulator-ramp-delay = <3125>; }; @@ -111,6 +112,7 @@ buck2: BUCK2 { regulator-boot-on; regulator-max-microvolt = <2187500>; regulator-min-microvolt = <600000>; + regulator-name = "VDD_ARM (BUCK2)"; regulator-ramp-delay = <3125>; }; @@ -119,6 +121,7 @@ buck4: BUCK4 { regulator-boot-on; regulator-max-microvolt = <3400000>; regulator-min-microvolt = <600000>; + regulator-name = "VDD_3V3 (BUCK4)"; }; buck5: BUCK5 { @@ -126,6 +129,7 @@ buck5: BUCK5 { regulator-boot-on; regulator-max-microvolt = <3400000>; regulator-min-microvolt = <600000>; + regulator-name = "VDD_1V8 (BUCK5)"; }; buck6: BUCK6 { @@ -133,6 +137,7 @@ buck6: BUCK6 { regulator-boot-on; regulator-max-microvolt = <3400000>; regulator-min-microvolt = <600000>; + regulator-name = "NVCC_DRAM_1V1 (BUCK6)"; }; ldo1: LDO1 { @@ -140,6 +145,7 @@ ldo1: LDO1 { regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1600000>; + regulator-name = "NVCC_SNVS_1V8 (LDO1)"; }; ldo3: LDO3 { @@ -147,6 +153,7 @@ ldo3: LDO3 { regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <800000>; + regulator-name = "VDDA_1V8 (LDO3)"; }; ldo5: LDO5 { @@ -154,6 +161,7 @@ ldo5: LDO5 { regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <1800000>; + regulator-name = "NVCC_SD2 (LDO5)"; }; }; }; From patchwork Wed Jul 19 07:13:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C979FC001DC for ; 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Wed, 19 Jul 2023 09:15:45 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Wed, 19 Jul 2023 09:15:25 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH v2 6/7] arm64: dts: imx8mp-phycore-som: Update regulator output voltages Date: Wed, 19 Jul 2023 09:13:12 +0200 Message-ID: <20230719071313.3274882-7-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719071313.3274882-1-t.remmet@phytec.de> References: <20230719071313.3274882-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBLMWRmVeSWpSXmKPExsWyRpKBR3dh7/YUg78vTSzW7D3HZPHwqr/F qqk7WSz6Xjxkttj0+BqrRdevlcwWrXuPsFv83b6JxeLFFnGL7nfqDlweO2fdZffYtKqTzePO tT1sHpuX1Hv0d7ewemx8t4PJo/+vQQB7FJdNSmpOZllqkb5dAlfG2ZPTmQpuiFUc2LONrYHx kWAXIyeHhICJxOnnnYxdjFwcQgJLmCS+PP7KBuE8YZRYt2cqI0gVm4CGxNMVp5lAEiICp5gk Vp+YwQySYBZwk/i3cT57FyMHh7BAhMT3l8IgYRYBVYnZCxrASngFLCV+3L3NBrFNXmLmpe/s IDangJXEtf5jrCC2EFDNnn0PWSHqBSVOznzCAjFeXqJ562yoVRISB1+8YIaol5fYdekkI8zM aedeM0PYoRJbv2xnmsAoNAvJqFlIRs1CMmoBI/MqRqHczOTs1KLMbL2CjMqS1GS9lNRNjKDY EWHg2sHYN8fjECMTB+MhRgkOZiUR3keXt6UI8aYkVlalFuXHF5XmpBYfYpTmYFES573fw5Qo JJCeWJKanZpakFoEk2Xi4JRqYCw7PmePvdMFrR8yutre6z1ez9Q67lDy2VCr74lW2rdpzzYr flqa/+RFmuGO8Jjf75U5j5efNgt2iut0my1SfaLjXqb9lWWuuomVTfWFO+/sOZt/9EkaZ17O 4eyz3DPerLkSZml/UuWQRAODnOFfCe7njKcytD56+a+V/2jPuf3uuqMiVzmkBJRYijMSDbWY i4oTAdq5jVGLAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_001547_835882_8CDB92FC X-CRM114-Status: GOOD ( 11.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Set the regulator voltages to the min and max values the i.MX8MP requires and not what the PMIC provides. Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- .../dts/freescale/imx8mp-phycore-som.dtsi | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 53ba09172cba..d8df97060e8f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -99,8 +99,8 @@ regulators { buck1: BUCK1 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <2187500>; - regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <805000>; regulator-name = "VDD_SOC (BUCK1)"; regulator-ramp-delay = <3125>; }; @@ -110,8 +110,8 @@ buck2: BUCK2 { nxp,dvs-standby-voltage = <850000>; regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <2187500>; - regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1050000>; + regulator-min-microvolt = <805000>; regulator-name = "VDD_ARM (BUCK2)"; regulator-ramp-delay = <3125>; }; @@ -119,40 +119,40 @@ buck2: BUCK2 { buck4: BUCK4 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <3400000>; - regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; regulator-name = "VDD_3V3 (BUCK4)"; }; buck5: BUCK5 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <3400000>; - regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; regulator-name = "VDD_1V8 (BUCK5)"; }; buck6: BUCK6 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <3400000>; - regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1155000>; + regulator-min-microvolt = <1045000>; regulator-name = "NVCC_DRAM_1V1 (BUCK6)"; }; ldo1: LDO1 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1950000>; + regulator-min-microvolt = <1710000>; regulator-name = "NVCC_SNVS_1V8 (LDO1)"; }; ldo3: LDO3 { regulator-always-on; regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; regulator-name = "VDDA_1V8 (LDO3)"; }; From patchwork Wed Jul 19 07:13:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13318420 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7E96C0015E for ; Wed, 19 Jul 2023 07:16:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; 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Wed, 19 Jul 2023 09:15:49 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Wed, 19 Jul 2023 09:15:45 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH v2 7/7] arm64: dts: imx8mp-phyboard-pollux: Add missing usdhc clocks assignment Date: Wed, 19 Jul 2023 09:13:13 +0200 Message-ID: <20230719071313.3274882-8-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230719071313.3274882-1-t.remmet@phytec.de> References: <20230719071313.3274882-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBLMWRmVeSWpSXmKPExsWyRpKBR3dp7/YUg4cdTBZr9p5jsnh41d9i 1dSdLBZ9Lx4yW2x6fI3VouvXSmaL1r1H2C3+bt/EYvFii7hF9zt1By6PnbPusntsWtXJ5nHn 2h42j81L6j36u1tYPTa+28Hk0f/XIIA9issmJTUnsyy1SN8ugSuj9epMpoJ9HBUfF/M0MG5k 72Lk5JAQMJFo7P/F1sXIxSEksIRJ4u+E91DOE0aJfb/ms4BUsQloSDxdcZoJJCEicIpJYvWJ GcwgCWYBN4l/G+eDjRIWiJdouLYPrIFFQFXixu3fYDW8ApYSMx59Z4ZYJy8x89J3sHpOASuJ a/3HWEFsIaCaPfseskLUC0qcnPmEBWK+vETz1tlQuyQkDr54wQxRLy+x69JJRpiZ0869hpof KrH1y3amCYxCs5CMmoVk1CwkoxYwMq9iFMrNTM5OLcrM1ivIqCxJTdZLSd3ECIodEQauHYx9 czwOMTJxMB5ilOBgVhLhfXR5W4oQb0piZVVqUX58UWlOavEhRmkOFiVx3vs9TIlCAumJJanZ qakFqUUwWSYOTqkGRqPWq/Kbv7L33c5f/0+7bupayaVPlkWmfL16+p1sU1SJkW+Y+8uC5cJ/ 3bO+HDj7MeDCdvFZf9Q9Dc04Qnie1qVHFa2e4/tYdmXgvljDD2XrLbJOiWY9PbR9V5//m+3z jVICtORiPDZt0726lUdL6nPhoum80YeZ4uU0F/rGGu/xbangusXYp8RSnJFoqMVcVJwIAEKw pZ2LAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_001549_718226_59372655 X-CRM114-Status: GOOD ( 12.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jonas Kuenstler Add the missing usdhc2 root clock to 200MHz to be able to support SDR104 mode for SD-Card on phyBOARD-Pollux-i.MX8MP. Signed-off-by: Jonas Kuenstler Signed-off-by: Teresa Remmet --- Changes in v2: - no changes --- arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 6aa720bafe28..0a51ddbc62df 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -103,6 +103,8 @@ &uart1 { /* SD-Card */ &usdhc2 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; + assigned-clock-rates = <200000000>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_pins>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_pins>;