From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324963 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25F62C04A6A for ; Mon, 24 Jul 2023 16:23:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230152AbjGXQXe (ORCPT ); Mon, 24 Jul 2023 12:23:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230386AbjGXQXa (ORCPT ); Mon, 24 Jul 2023 12:23:30 -0400 Received: from mailout1.w2.samsung.com (mailout1.w2.samsung.com [211.189.100.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD3B718E for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p1.samsung.com (unknown [182.198.245.206]) by mailout1.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162323usoutp016b556e1e7a95f83ea0248a2729d27aac~02lGKl4Eh2720227202usoutp01_; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w2.samsung.com 20230724162323usoutp016b556e1e7a95f83ea0248a2729d27aac~02lGKl4Eh2720227202usoutp01_ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215803; bh=C4aTzaNtGHKVgJ50XEww+sc4KO9zZq8bdfgSZbWIqXU=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=vgiMdk8WDFMPvaWfRBSUpOZeJsmlnLZDGOEczbfT3qXRnP7eYaGyFFTbFRPoJu+aS pc90seXOA0JzdM5JU3x+0PgVntRG4Nkson13+mvTMmCCQPNQhNz5nTggl5pMzQ0xXh IOuAyvTVJeitaLRe6rpLmtEI2SM9Viltg+aQo9EE= Received: from ussmges2new.samsung.com (u111.gpu85.samsung.co.kr [203.254.195.111]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p2d430cfe9ef07dafe0e44de2b64b62ab8~02lF9a9cw0598305983uscas1p2a; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges2new.samsung.com (USCPEMTA) with SMTP id 19.78.42611.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from ussmgxs1new.samsung.com (u89.gpu85.samsung.co.kr [203.254.195.89]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p16c295c61b82f774fb23eedfab4dfff28~02lFiHjoY1496114961uscas1p10; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec36f-fb1ff7000000a673-9a-64bea57b50cf Received: from SSI-EX1.ssi.samsung.com ( [105.128.2.146]) by ussmgxs1new.samsung.com (USCPEXMTA) with SMTP id 1B.8B.38326.A75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX1.ssi.samsung.com (105.128.2.226) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:22 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:22 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command Thread-Topic: [Qemu PATCH RESEND 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command Thread-Index: AQHZvksqhijwK0T7Vk+qA4s8EDYBFA== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-2-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0wTWRjFc2em7VBtMtRKP3WjQhSjxgpidBJlVyMmg8aExJgg8TWBEdBS sAPic202gBHLy4JKEQEBYwsGfEShIpWCCKgBNdKCEUQRRBBk0WUx+KCdmvDf79zvnPudm1wS lz8VzSWjNfGcVsOqfcRS4k7j19YVx0trI/wmHvnSZ1srEX0hpw3RZR3liNb985agk+6NYLT1 fT9Bm4vaxXSrsYWg+7P6Mbq05C1OP0qrIjbMYNoMmSKmWLeZqTa+ljBJDZ+mVM0AxtwY/Slh ettvYcytwQ84k5N3ihm7OT9EGiZdH8Gpow9z2pV/7pNGVdgsKO6V7Ej6N6tEh9JmpCIPEqjV UNHwAKUiKSmnTAhaJq0iQSRjUHe+HP/tKpvQu13XEbTlFhKC+BdBX0q6WBBXEdgL9RJnREx5 Q23qXbGTFVQANNaX4E4TTn0iYLR8yBWfRekRFI+VuDYqqCwEE4PnkBBRwbNLE5iTCWox2Koy XNfKqLUwWJriYg+KhsrnTSInI8oLxlvKXX6cUkJnbwEmNPeEK3k17ld4wQ9Lj1jgBWD4/6Kb vaF7fEAiZFXgyMkWC7wcrhYN4sJeT2jO7SUE/xyou+Zws8ED+pMXCRwEL3sy3LvmwUt7zhST UxwO5lGpcKyGgpLb7ug6KJqswDLRIuO01sZpLYzTWhintShEhBkpE3g+JpLjV2m4RBXPxvAJ mkhVeGzMTTT14x7/qI+tQvbOUZUNYSSyISBxH4XMf1dthFwWwR49xmlj92oT1BxvQ/NIwkcp 8w9sDpdTkWw8d5Dj4jjt7ylGeszVYQtefNNhP62Zvc2ZKfbipo0pM/c7qsfC/r7W3DcZIrfk q6v2hyUlluV5894HQr1C4WTalXcn9XfsgQ8/PI57KKor0HguJ/w66zTIVE+hhYbuLDRTJJ3d Ea8PbHtw7nTI6YYAz4CD0Y4/7geT85NP5BmGuiyJ7/4LelJvMgcN3d6ZLovd/iTZt3HrsMWY P+6nvBGyxvQFt55K3xIc15Sb/9ch8vIO9uy2YkVllHin39OlF6MCujbtVtRcUFwfYLo12Hrl whOts/1re8x3t30fsb8Z2MgezhhbcsaUPZwYGUo7Dkhb+taxH9d0jKT51piGyqqD2/cM74lZ 1rFhZfbnriNmH4KPYv2X4Vqe/QWV60Z/4AMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA03Se0hTURwHcM597W4yuE7Toz3MlX+ktVpFXSoqTeGCEIUZqL1Gu63VNNtc WUGtB5ampqlpU3y/SlFbWatMa2Y6i3xQpkaYafkYGbmVzzLnJfC/z5dzvud3DhwSFVkwd1IZ EcWqI2QqMSHAlDrk5qpzRbXyNSN9JH29pQrQ6WmtgC7rKge07tIXjL7y9AdC130dwOi7eR0E 3aJvxuiB5AGELir8gtKNCUZsuwPTmpKEMwW6AOax/hOPufLy+2yqGUKYez9neEx/x32EuW8Z RJm0zAuM1bBklyBUsEXOqpSnWPXqrYcERytNT0DkR2F04mQdTwcSHOIAn4TUelg2EQ/igIAU UWUATnRacC6MAlg+FktwoRjAqxkphL1CUJ6wNu7RnJ2pdfBVfSFqN0pZMPi7zcFecKLiASyw Fs4d5UwlA/gp9xnKNSSwLWsCsRujvKDJeINnt5DaCC1FMXMWzfqNoW7OfIqGVe1NuN2AcoFj zeUIN80VdvfnINwjKFhY04JyXgCH+v7inD1gyngGwdkT9owN8biuBHampRKcfWBxngXl7uAI zbf7MW6/G3xR2oklAaifN04/r66fV9fPq+cC7C5w1Wo04YpojTSCPS3RyMI12giF5PCJcAOY /Q+v/9aHGEFD90+JCSAkMAFIomJnoXRfrVwklMvOnGXVJw6qtSpWYwILSUzsKhQFJB8UUQpZ FHucZSNZ9f9VhOS76xBtz2L1n9sf/RTyqSRPa0Xthp6wreTlljgpXz4eqBp0m7RVll1rqPzd m7tzdJm2ZCQ7tPftdGtX4LO+/dsMw/ivM049mYb4IJdmcXCM7VJ6KW0733iPeLBo56bskwEh vua+DxnvqhK8K6TLzal6XxZKjv0xr7VJc6q7Uf8Vk8MePkvxfYO7dtccaOfjm5vj2+r6pz7M KKtWui/iTzkE+TWOdr9/Rd/JJ6ubQtKiI7uOjGsTb4V9H3hu5NmCEbz09JFiL0f/4pEwQexK ldYSczEfLRF5NOmVx8wew0ZrVk6u4sWU5JsV/+Y2OD0kEe7Y8zn8OE0EN4W5TY/O7H1oFWOa ozKpN6rWyP4Bd5T0hn4DAAA= X-CMS-MailID: 20230724162323uscas1p16c295c61b82f774fb23eedfab4dfff28 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p16c295c61b82f774fb23eedfab4dfff28 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Based on CXL spec 3.0 Table 8-94 (Identify Memory Device Output Payload), dynamic capacity event log size should be part of output of the Identify command. Add dc_event_log_size to the output payload for the host to get the info. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index ad7a6116e4..b013e30314 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -21,6 +21,8 @@ #include "sysemu/hostmem.h" #define CXL_CAPACITY_MULTIPLIER (256 * MiB) +/* Experimental value: dynamic capacity event log size */ +#define CXL_DC_EVENT_LOG_SIZE 8 /* * How to add a new command, example. The command set FOO, with cmd BAR. @@ -519,8 +521,9 @@ static CXLRetCode cmd_identify_memory_device(struct cxl_cmd *cmd, uint16_t inject_poison_limit; uint8_t poison_caps; uint8_t qos_telemetry_caps; + uint16_t dc_event_log_size; } QEMU_PACKED *id; - QEMU_BUILD_BUG_ON(sizeof(*id) != 0x43); + QEMU_BUILD_BUG_ON(sizeof(*id) != 0x45); CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, cxl_dstate); CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d); @@ -543,6 +546,7 @@ static CXLRetCode cmd_identify_memory_device(struct cxl_cmd *cmd, st24_le_p(id->poison_list_max_mer, 256); /* No limit - so limited by main poison record limit */ stw_le_p(&id->inject_poison_limit, 0); + stw_le_p(&id->dc_event_log_size, CXL_DC_EVENT_LOG_SIZE); *len = sizeof(*id); return CXL_MBOX_SUCCESS; From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324966 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1025C001DF for ; Mon, 24 Jul 2023 16:23:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230191AbjGXQXf (ORCPT ); Mon, 24 Jul 2023 12:23:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231204AbjGXQXb (ORCPT ); Mon, 24 Jul 2023 12:23:31 -0400 Received: from mailout2.w2.samsung.com (mailout2.w2.samsung.com [211.189.100.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0CD3E4E for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p1.samsung.com (unknown [182.198.245.206]) by mailout2.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp02c18e7d70d551f78314c0c8358f5baf24~02lGVgsPf1330813308usoutp02i; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w2.samsung.com 20230724162324usoutp02c18e7d70d551f78314c0c8358f5baf24~02lGVgsPf1330813308usoutp02i DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=QdhsTlPOjfPS50+L27TzshjXC2bd/OfwpwsRqKlBcb8=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=jhAK6eXmZIJ+IYJyj+Ud2zcNwH79On7+hvPqxUklQyVGRTnFqA18n/H3hc8RyMUJE b8F1rKDuAgF5GIX7/fGN2jJHYbmfGrezcgDycyIpQITuNguFddJ0mI8EIkJcM8BZrQ PvZ4lI4w4wjGUTnfgjJ2p7b+Rw7Xm9/lGmKQDojo= Received: from ussmges3new.samsung.com (u112.gpu85.samsung.co.kr [203.254.195.112]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p2f437b5dd7cf792fe20ac40d7da1a080a~02lGMSE6d0402104021uscas1p2c; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges3new.samsung.com (USCPEMTA) with SMTP id 02.A5.62237.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from ussmgxs1new.samsung.com (u89.gpu85.samsung.co.kr [203.254.195.89]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p1c9f1ab1af688efbfc50d3246da5d0f7c~02lF0mHVm1474714747uscas1p1s; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec370-b17ff7000001f31d-2f-64bea57b4280 Received: from SSI-EX1.ssi.samsung.com ( [105.128.2.146]) by ussmgxs1new.samsung.com (USCPEXMTA) with SMTP id DB.8B.38326.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX1.ssi.samsung.com (105.128.2.226) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:22 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:22 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support Thread-Topic: [Qemu PATCH RESEND 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support Thread-Index: AQHZvksqExHVXG8u5USYZ0Vv6oRqLA== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-3-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDKsWRmVeSWpSXmKPExsWy7djX87rVS/elGBzpM7ToPr+B0WL61AuM FqtvrmG0aGh6xGLRsvs9k8X+p89ZLFYtvMZmcX7WKRaL5xOfM1ksXfKI2eJ47w4WB26PC5Mn sHosbnD12DnrLrtHy5G3QN6el0weGz/+Z/d4cm0zk8fm1y+YPabOrvf4vEkugCuKyyYlNSez LLVI3y6BK+Pgr1vsBbPUK5ru5DYwPpXtYuTgkBAwkXi6XaqLkYtDSGAlo8Tss82sEE4rk8TM N/eZuxg5wYqeNJ+DSqxllPh99CyU84lR4llbHxuEs4xR4vqCHnaQFjYBRYl9XdvZQGwRAWOJ Y4eXMIMUMQu8ZZH4uOYNC4gjLNDMKLFoVT9YRkSgg1Hi0J//zBAtehKNX9cwgtgsAqoSh3b0 g43lFTCXePlxGlicU8BCYsOlE6wgNqOAmMT3U2uYQGxmAXGJW0/mM0FcLiixaPYeqC/EJP7t esgGYctLTP4xA8pWlLj//SU7RK+exI2pU9ggbG2JZQtfM0PsFZQ4OfMJC0S9pMTBFTfAPpAQ mMwpceREJytEwkVi3p+3UEXSElevT2WGhHGyxKqPXBDhHIn5S7ZAlVhLLPyznmkCo8osJGfP QnLGLCRnzEJyxgJGllWM4qXFxbnpqcXGeanlesWJucWleel6yfm5mxiBCe70v8MFOxhv3fqo d4iRiYPxEKMEB7OSCK9hzL4UId6UxMqq1KL8+KLSnNTiQ4zSHCxK4ryGtieThQTSE0tSs1NT C1KLYLJMHJxSDUzCiYIzfT8rH759WOWVGbu22s5z2kKL9meUFF7zufre7+lr4ZfPpQ66KtZW 5PNYX/0jvlArmMVTfLFS2AKLy58absxadNPEOb0pr6jv4CyjQMUzHnx7Fjn1t+9Sbth9ljPj m+PZjRK1P6Z9U1S7mxO50i42n9Gm8/vd+qUsqecyzY3r68tNTLMq7u3aVNz3u+j3Gm0drkPs 6Y8F97x+te6Njk/v6nfvXqv2ZLS772tcFbCNOeBgY0CPlcmyaTba5SdOdG/92VSid/zCqg8z 21fwKqxVe3LP7/XGs+tX/vt9WDPuWdtZW6E9zW1s64JPzzix3riFeeGThLueTTebzpUV+519 ytv65O3lIPGX3RZKLMUZiYZazEXFiQC92B0F3wMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJIsWRmVeSWpSXmKPExsWS2cA0Sbd66b4Ug6e7JS26z29gtJg+9QKj xeqbaxgtGpoesVi07H7PZLH/6XMWi1ULr7FZnJ91isXi+cTnTBZLlzxitjjeu4PFgdvjwuQJ rB6LG1w9ds66y+7RcuQtkLfnJZPHxo//2T2eXNvM5LH59Qtmj6mz6z0+b5IL4IrisklJzcks Sy3St0vgyjj46xZ7wSz1iqY7uQ2MT2W7GDk5JARMJJ40n2MFsYUEVjNK/Hjo3MXIBWR/YpRY 872TDcJZxijRPmMyG0gVm4CixL6u7WC2iICxxLHDS5hBbGaB1ywS3y5ygzQICzQzSixa1c8M 4ogIdDBKnH9ykhGiQ0+i8esaMJtFQFXi0I5+dhCbV8Bc4uXHaYwQd5hLnNm0HyzOKWAhseHS CbD7GAXEJL6fWsMEsU1c4taT+UwQPwhILNlznhnCFpV4+fgfK4QtLzH5xww2CFtR4v73l+wQ vXoSN6ZOYYOwtSWWLXzNDHGDoMTJmU9YIOolJQ6uuMEygVFiFpJ1s5C0z0LSPgtJ+wJGllWM 4qXFxbnpFcWGeanlesWJucWleel6yfm5mxiBqeH0v8OROxiP3vqod4iRiYPxEKMEB7OSCK9h zL4UId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rxCrhPjhQTSE0tSs1NTC1KLYLJMHJxSDUw+V5KF yp9PnPjswbvSlUcXzG3NFD1XujfyofP2NX+MprGwee03KlsncyB+w/ykAmbxpxo8E7gtpR7/ UDwTwpzF8PtJ532PZ/PyI35rH3kTHHEu4qAv09JHFqtm3m8yEXDfVTD/Qp9ne9im747K595K 3QkWkXr5Wv7mqe37Xz3PcT91OH3XvDVeqveDI4tzs//oxXYdY7aNebI2Mu7l5R9dhh9bbk6O L70oa+xu1bNiY05aoP8U9qTVGbOfzgr1vD9hiePLXWcO/hd47TFB21zLKqj2uEpU357O2Isz N79J3GxeWvNB8ttai93Pxau73h36ydgfaJy2VtVn9dUWhUbFhRlfnp1Tyuqb2ccfJPRRiaU4 I9FQi7moOBEAYM2eSnwDAAA= X-CMS-MailID: 20230724162323uscas1p1c9f1ab1af688efbfc50d3246da5d0f7c CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p1c9f1ab1af688efbfc50d3246da5d0f7c References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Per cxl spec 3.0, add dynamic capacity region representative based on Table 8-126 and extend the cxl type3 device definition to include dc region information. Also, based on info in 8.2.9.8.9.1, add 'Get Dynamic Capacity Configuration' mailbox support. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 69 +++++++++++++++++++++++++++++++++++++ include/hw/cxl/cxl_device.h | 16 +++++++++ 2 files changed, 85 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index b013e30314..41e43ec231 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -81,6 +81,8 @@ enum { #define GET_POISON_LIST 0x0 #define INJECT_POISON 0x1 #define CLEAR_POISON 0x2 + DCD_CONFIG = 0x48, /*r3.0: 8.2.9.8.9*/ + #define GET_DC_CONFIG 0x0 PHYSICAL_SWITCH = 0x51 #define IDENTIFY_SWITCH_DEVICE 0x0 }; @@ -939,6 +941,71 @@ static CXLRetCode cmd_media_clear_poison(struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } +/* + * cxl spec 3.0: 8.2.9.8.9.1 + * Get Dynamic Capacity Configuration + **/ +static CXLRetCode cmd_dcd_get_dyn_cap_config(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct get_dyn_cap_config_in_pl { + uint8_t region_cnt; + uint8_t start_region_id; + } QEMU_PACKED; + + struct get_dyn_cap_config_out_pl { + uint8_t num_regions; + uint8_t rsvd1[7]; + struct { + uint64_t base; + uint64_t decode_len; + uint64_t region_len; + uint64_t block_size; + uint32_t dsmadhandle; + uint8_t flags; + uint8_t rsvd2[3]; + } QEMU_PACKED records[]; + } QEMU_PACKED; + + struct get_dyn_cap_config_in_pl *in = (void *)cmd->payload; + struct get_dyn_cap_config_out_pl *out = (void *)cmd->payload; + struct CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, + cxl_dstate); + uint16_t record_count = 0, i; + uint16_t out_pl_len; + uint8_t start_region_id = in->start_region_id; + + if (start_region_id >= ct3d->dc.num_regions) { + return CXL_MBOX_INVALID_INPUT; + } + + record_count = MIN(ct3d->dc.num_regions - in->start_region_id, + in->region_cnt); + + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); + assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE); + + memset(out, 0, out_pl_len); + out->num_regions = record_count; + for (i = 0; i < record_count; i++) { + stq_le_p(&out->records[i].base, + ct3d->dc.regions[start_region_id + i].base); + stq_le_p(&out->records[i].decode_len, + ct3d->dc.regions[start_region_id + i].decode_len); + stq_le_p(&out->records[i].region_len, + ct3d->dc.regions[start_region_id + i].len); + stq_le_p(&out->records[i].block_size, + ct3d->dc.regions[start_region_id + i].block_size); + stl_le_p(&out->records[i].dsmadhandle, + ct3d->dc.regions[start_region_id + i].dsmadhandle); + out->records[i].flags = ct3d->dc.regions[start_region_id + i].flags; + } + + *len = out_pl_len; + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_DATA_CHANGE (1 << 2) #define IMMEDIATE_POLICY_CHANGE (1 << 3) @@ -977,6 +1044,8 @@ static struct cxl_cmd cxl_cmd_set[256][256] = { cmd_media_inject_poison, 8, 0 }, [MEDIA_AND_POISON][CLEAR_POISON] = { "MEDIA_AND_POISON_CLEAR_POISON", cmd_media_clear_poison, 72, 0 }, + [DCD_CONFIG][GET_DC_CONFIG] = { "DCD_GET_DC_CONFIG", + cmd_dcd_get_dyn_cap_config, 2, 0 }, }; static struct cxl_cmd cxl_cmd_set_sw[256][256] = { diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index cd7f28dba8..bf564f4a0b 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -382,6 +382,17 @@ typedef struct CXLPoison { typedef QLIST_HEAD(, CXLPoison) CXLPoisonList; #define CXL_POISON_LIST_LIMIT 256 +#define DCD_MAX_REGION_NUM 8 + +typedef struct CXLDCD_Region { + uint64_t base; + uint64_t decode_len; /* in multiples of 256MB */ + uint64_t len; + uint64_t block_size; + uint32_t dsmadhandle; + uint8_t flags; +} CXLDCD_Region; + struct CXLType3Dev { /* Private */ PCIDevice parent_obj; @@ -413,6 +424,11 @@ struct CXLType3Dev { unsigned int poison_list_cnt; bool poison_list_overflowed; uint64_t poison_list_overflow_ts; + + struct dynamic_capacity { + uint8_t num_regions; /* 0-8 regions */ + struct CXLDCD_Region regions[DCD_MAX_REGION_NUM]; + } dc; }; #define TYPE_CXL_TYPE3 "cxl-type3" From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324962 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E460CC00528 for ; Mon, 24 Jul 2023 16:23:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229806AbjGXQXd (ORCPT ); Mon, 24 Jul 2023 12:23:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230195AbjGXQXa (ORCPT ); Mon, 24 Jul 2023 12:23:30 -0400 Received: from mailout2.w2.samsung.com (mailout2.w2.samsung.com [211.189.100.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF4A61BC for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout2.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp029c061439fc7dd542962553e3522675ad~02lGfWLQR1330013300usoutp021; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w2.samsung.com 20230724162324usoutp029c061439fc7dd542962553e3522675ad~02lGfWLQR1330013300usoutp021 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=WQr2LrRXl3XQtQGPB07JnzxaUKwKp30D1H0fKKDUSRc=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=f0xSx6x/5gi71MR0N50OC8Orn2aYQ9eCPFlWgEL7C4qcp4XdkMwEOlLO+F3KomExa IsfhIS0yxKW4p7fFxh5njvihDmHQuQsqYdZXzoM+SI0WsucqMXJueZydqZCRGNzPzY RyBNg5dw6Wx6YTT4RMUaJbL9ujJM7siBeAN8kqMA= Received: from ussmges3new.samsung.com (u112.gpu85.samsung.co.kr [203.254.195.112]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p2b66277f3a8e9393c6b72f46727974f91~02lGSYWgx0635306353uscas1p2P; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges3new.samsung.com (USCPEMTA) with SMTP id C2.A5.62237.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from ussmgxs3new.samsung.com (u92.gpu85.samsung.co.kr [203.254.195.92]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p103885ae76e95ba7b55e707f3270d14e4~02lF6Bihb2699226992uscas1p1h; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec370-823ff7000001f31d-30-64bea57b92d4 Received: from SSI-EX2.ssi.samsung.com ( [105.128.2.145]) by ussmgxs3new.samsung.com (USCPEXMTA) with SMTP id B0.D1.64580.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX2.ssi.samsung.com (105.128.2.227) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:22 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:22 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices Thread-Topic: [Qemu PATCH RESEND 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices Thread-Index: AQHZvksqvUEFvMt+DkeO9/kVLpnyUQ== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-4-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA02SWUwTURSGvTPTdqhWh0LgAK6NvqBUGzSOC4qJkonGiA8aNCba0BGILZAW 3IOIJSagUoKglMiigFBbAYtaxSAWRQEjuCMRkc3SKLIoYkCptFMT3r7/nv+c89+bS+LiZp4/ GRObwKpj5UoJX0jcaRhtCTpRUqtYMZmzlk5vqUT0pexWRN/4YER0cko3QWtrBjH6YZ+NoA1F 7/h0i76JoG2ZNowuKe7G6afnLUToTKY1S8djriVvYe7pOwSM9vHAlHpgx5iqYYeA6X1nxhjz 136cyc47xfy4NT9cuFe4XsEqYw6z6uUbDgijs6yjvPjRgKMZbbmCZGTwSUMkCdRK6LKEpSEh KabKERT3T/A4kYpBz/vCKeHhMhnqHiKuYEIwUvPd7RpBcP35GYITpQjeF54TOFv41CKoTbvL d7I3FQwN9cW404RTAwQMG78RzoIXdQxuVxa6TUnwJSMH51gKLwtSXbsJaglYLRmuoSJqNdRo P7n8HhQNla+euTyI8oGxJiPmZJzyhfbeAozL7QlX8x7gHPvA5P0uPscLIOv3ZTcvgs4xu4Dr lUJb9kU+x0uhtOgrzu31hMbcXoLz+8GjsjbXjYFK94AuR597wWYYqnvr5gC4ZHxNcC8cCYZh IXeshILiavecdVD0pwLTocX6abH102Lop8XQT4tRiAgD8k3UaFRRrCY4lj0i1chVmsTYKGlk nOoWmvpvzZP18RbU3j4stSKMRFYEJC7xFsn21SrEIoX82HFWHbdfnahkNVYUQBISX5EspDFS TEXJE9hDLBvPqv9XMdLDPxmTJgSETPiWjyXuFBh73rSOH7zz4Qjve8dK7e2r0S9ENyPOhcri TE0XqubwK0wK6Wnd2V93VUNaW2qn7ulr7b76Ez33BaajM6v0kj0/Ag915u6KyP/bYc+515Rq 9zTrSvoSUMSSpMN0cDWpS/nmNYjmP/Lrqvt92lqat8Z/JMh0cmz8i3kkjOmxRa2lxLuehFkz eb86L8PPt9vKBjK9tmwvUPvJugODV4Uqw3dninaEjG8yrzo7OpdXsTRociKmb9lQdXndnBSJ o7o/POLKntbupKJGR3p9eP6MwY/qKvu8z/MI02zSZ8B7w8JZZSH+vFLHjf0bBVuHVA18y5Pl Wl3zDgmhiZbLAnG1Rv4PLZR66N4DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA02SbUhTYRTHe+692+5W0tMyfXI2baBS4jQUu1JUYMGFCiSqD7HSkbdl6bRd NXsfMQu08mWTdFYmThnTmq1Ia7blLC0VdH4QX8rAls5EMiuNFEt3Cfz2+5/z/z/nHHhIXOwl gsg0dTajUSvTZXwRkabFSqIu1TpSY3rtIVRhTyOg7pb1Aqp+sAFQ2uujBKWzf8Mo55dxgrJU 9/OpHmMnQY2XjGNUrWkUpzpuNxN7VtO9+mIeXaPdR78wfhTQujdTS6plAqOffP8roD39TzH6 6aQXp8sqr9E/bNIk0THRzlQmPS2X0UTvShGd1rt+8bJ+SfKKBioEWmAJKABCEsE4ZHntBAVA RIphPUDNw118TswA5HJ8EHCiDqCb5Xr+coQPNyNHQZOP/WEsam8z4cuMw0kCzbpXL/N6eAHN 2qZ4BYBc8lxF3kEBZ5cjd1U+b5kJGIZczUW+uh/cjuy6Ed+T4iXutjl9dSGkUGPfO58fwAA0 19mAcaMC0ZCnCuMugMjU0oNzvAFNfF7kcRyC9L/L+RxvRp/mJgRcVo4Gygx8jiNRXfUkzu2w Dr2v8BCcfyNqNQ8QxQAZV4wzrogbV8SNK+IPAWEBgTksm6HKY2PVzHk5q8xgc9Qq+cnMDBtY +gxdi22KZjAy9F3uAhgJXACRuMzfb5vCkSr2S1VeuMhoMpM1OekM6wISkpAF+tHHS5LFUKXM Zs4yTBaj+d/FSGGQFnvLmx2Rj7HPrwAImd/bI5IER8rve4HBUy+7Zuhb9afVay455H+vCZfg 74+aKjJi2r8edAanTJVBRUBCqCfeNFTotOsXA4kd5xKprmppYsieoChD97zt1qB0/5bHbcfX tHZFJrvJsJOqmlJy7Ge1wlp7q2JheBjqGMmY9kxhgmR0IdpqjfwTvol/4r7aXtdQ6hAnVZpz y/Wi7IR7d2hhD3v2Rpz0gfIA/dK8til6OtSqhBtvLs6tsxqvXo7ZMZ8Z0a4W9t0Oe4RXvlww xp8KrnR+Ez+LN1x5lT/96bDb+cSr2K1T6YPM850z04rujlCvCbdIczvfxLn3hssI9rRy21Zc wyr/ASgn9Gx7AwAA X-CMS-MailID: 20230724162323uscas1p103885ae76e95ba7b55e707f3270d14e4 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p103885ae76e95ba7b55e707f3270d14e4 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Rename mem_size as static_mem_size for type3 memdev to cover static RAM and pmem capacity, preparing for the introduction of dynamic capacity to support dynamic capacity devices. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 5 +++-- hw/mem/cxl_type3.c | 8 ++++---- include/hw/cxl/cxl_device.h | 2 +- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 41e43ec231..59d57ae245 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -540,7 +540,8 @@ static CXLRetCode cmd_identify_memory_device(struct cxl_cmd *cmd, snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0); - stq_le_p(&id->total_capacity, cxl_dstate->mem_size / CXL_CAPACITY_MULTIPLIER); + stq_le_p(&id->total_capacity, + cxl_dstate->static_mem_size / CXL_CAPACITY_MULTIPLIER); stq_le_p(&id->persistent_capacity, cxl_dstate->pmem_size / CXL_CAPACITY_MULTIPLIER); stq_le_p(&id->volatile_capacity, cxl_dstate->vmem_size / CXL_CAPACITY_MULTIPLIER); stl_le_p(&id->lsa_size, cvc->get_lsa_size(ct3d)); @@ -879,7 +880,7 @@ static CXLRetCode cmd_media_clear_poison(struct cxl_cmd *cmd, struct clear_poison_pl *in = (void *)cmd->payload; dpa = ldq_le_p(&in->dpa); - if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->mem_size) { + if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size) { return CXL_MBOX_INVALID_PA; } diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 862107c5ef..237b544b9c 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -748,7 +748,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) } address_space_init(&ct3d->hostvmem_as, vmr, v_name); ct3d->cxl_dstate.vmem_size = memory_region_size(vmr); - ct3d->cxl_dstate.mem_size += memory_region_size(vmr); + ct3d->cxl_dstate.static_mem_size += memory_region_size(vmr); g_free(v_name); } @@ -771,7 +771,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) } address_space_init(&ct3d->hostpmem_as, pmr, p_name); ct3d->cxl_dstate.pmem_size = memory_region_size(pmr); - ct3d->cxl_dstate.mem_size += memory_region_size(pmr); + ct3d->cxl_dstate.static_mem_size += memory_region_size(pmr); g_free(p_name); } @@ -984,7 +984,7 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d, return -EINVAL; } - if (*dpa_offset > ct3d->cxl_dstate.mem_size) { + if (*dpa_offset > ct3d->cxl_dstate.static_mem_size) { return -EINVAL; } @@ -1142,7 +1142,7 @@ static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data) return false; } - if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.mem_size) { + if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.static_mem_size) { return false; } diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index bf564f4a0b..a32ee6d6ba 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -209,7 +209,7 @@ typedef struct cxl_device_state { } timestamp; /* memory region size, HDM */ - uint64_t mem_size; + uint64_t static_mem_size; uint64_t pmem_size; uint64_t vmem_size; From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CB01C001DF for ; Mon, 24 Jul 2023 16:23:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231283AbjGXQXb (ORCPT ); Mon, 24 Jul 2023 12:23:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230162AbjGXQXa (ORCPT ); Mon, 24 Jul 2023 12:23:30 -0400 Received: from mailout1.w2.samsung.com (mailout1.w2.samsung.com [211.189.100.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE6471B0 for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout1.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp01264683b331c29389eb977a8fa8c1d281~02lGY3z5F2719927199usoutp01y; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w2.samsung.com 20230724162324usoutp01264683b331c29389eb977a8fa8c1d281~02lGY3z5F2719927199usoutp01y DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=g5l7URI3CHFGaV1c3IODQfiJjEbKhZ8zpz4cb8chZLU=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=GhgBLWKGnD7AtedUna1KQ0AhvUCp9smWHXqioH6wZ4dreqEUDhGtF5vXhzx+aTbPI h7AkAUxwzJYdT1bYaa5VnAYoSnv1Q7ztH/HWcJ85wBgnG0GlVrzaMnkX/ymmkmPb4t 9CbTJ1qK6+T1gfkrMkNW4z+D7ECPhLsy3CrI1JPo= Received: from ussmges2new.samsung.com (u111.gpu85.samsung.co.kr [203.254.195.111]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p2e674b3a7c575c22db2eba0ab094eed58~02lGPZ_LR0636506365uscas1p2E; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges2new.samsung.com (USCPEMTA) with SMTP id F9.78.42611.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from ussmgxs2new.samsung.com (u91.gpu85.samsung.co.kr [203.254.195.91]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p131ecd295a7f6c8b3b95df5a6d5a98760~02lF4q3zg1472414724uscas1p1t; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec36f-fb1ff7000000a673-9c-64bea57b33d0 Received: from SSI-EX3.ssi.samsung.com ( [105.128.2.145]) by ussmgxs2new.samsung.com (USCPEXMTA) with SMTP id F4.9A.44215.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX3.ssi.samsung.com (105.128.2.228) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:22 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:22 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices Thread-Topic: [Qemu PATCH RESEND 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices Thread-Index: AQHZvksqkt0lMhZUQE+bOLebPq5xJA== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-5-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNKsWRmVeSWpSXmKPExsWy7djX87rVS/elGHx7YmHRfX4Do8X0qRcY LVbfXMNo0dD0iMWiZfd7Jov9T5+zWKxaeI3N4vysUywWzyc+Z7JYuuQRs8Xx3h0sDtweFyZP YPVY3ODqsXPWXXaPliNvgbw9L5k8Nn78z+7x5NpmJo/Nr18we0ydXe/xeZNcAFcUl01Kak5m WWqRvl0CV8b+nVtYC1ZIVLx484+1gXG3cBcjJ4eEgInE6Wm97F2MXBxCAisZJbZ92M4E4bQy Sbz62MACU7X4xhI2iMRaRolvqyYzQzifGCU6W55C9S9jlLi+oIcdpIVNQFFiX9d2NhBbRMBY 4tjhJWAdzAJvWSQ+rnkDNldYIFfizv7nQAs5gIqKJNZsSoeo15PY+PsXM4jNIqAqcWhHP9hM XgFziQ9LzrCC2JwCFhIbLp0AsxkFxCS+n1rDBGIzC4hL3HoynwnibEGJRbP3MEPYYhL/dj1k g7DlJSb/mAFlK0rc//6SHaJXT+LG1ClsELa2xLKFr5kh9gpKnJz5BBoUkhIHV9xgAflFQqCf U+LZxpVQy1wkum80Q9nSEn/vLgP7S0IgWWLVRy6IcI7E/CVboOZYSyz8s55pAqPKLCRnz0Jy xiwkZ8xCcsYCRpZVjOKlxcW56anFRnmp5XrFibnFpXnpesn5uZsYgent9L/D+TsYr9/6qHeI kYmD8RCjBAezkgivYcy+FCHelMTKqtSi/Pii0pzU4kOM0hwsSuK8hrYnk4UE0hNLUrNTUwtS i2CyTBycUg1MwYLPN6xLEGJSbrzls6HPoTJmndTXOdfibm1a86LrSWGx29Udlx6WlOefCpkm nXx6x/EYcb6lO3g5Xm/49nRXQnjrdbNKiw8RJ88feZy8TP66yDR3+7sVv7Uk5SsuPLU1Nj5z KftT539NJYMk699P+LY4zDvcqPfK4ZJgpZqhC2PDBct7xsE18b+evky8pNA4d7rSSfZ39x6x uzIHiFy374h496sp5fmNrld7864W3jrgfvHDG+45Kd8a2ZUyiv4HbHVguCL5SHl615sJi1Pr XUUqlyk68E7Pi95+8qfWlnB5J/HuqlRfr/iwc8k9X5a/fSi/RvXLnTLH1PSMd/VT5pbq5Jpt 51TNZ+4NS2NTYinOSDTUYi4qTgQAQomnad4DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJIsWRmVeSWpSXmKPExsWS2cA0Ubd66b4Ug00nFSy6z29gtJg+9QKj xeqbaxgtGpoesVi07H7PZLH/6XMWi1ULr7FZnJ91isXi+cTnTBZLlzxitjjeu4PFgdvjwuQJ rB6LG1w9ds66y+7RcuQtkLfnJZPHxo//2T2eXNvM5LH59Qtmj6mz6z0+b5IL4IrisklJzcks Sy3St0vgyti/cwtrwQqJihdv/rE2MO4W7mLk5JAQMJFYfGMJWxcjF4eQwGpGif6Dr1ghnE+M Em8uLmCHcJYxSrTPmMwG0sImoCixr2s7mC0iYCxx7PASZhCbWeA1i8S3i9wgtrBArsSd/c+Z IGqKJHo2bmaGsPUkNv7+BWazCKhKHNrRzw5i8wqYS3xYcoYVxBYCss9s2g8W5xSwkNhw6QRY nFFATOL7qTVMELvEJW49mc8E8YKAxJI955khbFGJl4//sULY8hKTf8xgg7AVJe5/f8kO0asn cWPqFDYIW1ti2cLXzBA3CEqcnPmEBaJeUuLgihssExglZiFZNwtJ+ywk7bOQtC9gZFnFKF5a XJybXlFslJdarlecmFtcmpeul5yfu4kRmBpO/zscvYPx9q2PeocYmTgYDzFKcDArifAaxuxL EeJNSaysSi3Kjy8qzUktPsQozcGiJM77MmpivJBAemJJanZqakFqEUyWiYNTqoEpN/VN/NvP P62ylqfWW/0/Oe+BTEZT2OZdd+RubTq63mFm/NZLO1V3is1r83srnCakzKbPJbb/0GbPrjMF EzITOeNP5r1gPCPyLWqbSolXy/YPd75WXr1/Xu23nN8v7e+fy9YlvoqT7Di09VWlqHS55um0 yF/Jxm0GOeXHnE+v5bigkMcuO2f31dvhcr6x6Re323yOPsRTv3HbvQb5Q0K+Z5W0tNP2uiSG ViSxc/8RaLBsiubrva6o+ufMEjEli9lXNz3avf7V9y91s4q+c3HN9bP73KeWKT3nquB8/4kd d268mJ3A2eJ8YNopHjv9zUmBjpUX05eJLj6/uYGt8c/t0JnLeUwP7PMynjvVmoVTiaU4I9FQ i7moOBEAN7eqonwDAAA= X-CMS-MailID: 20230724162323uscas1p131ecd295a7f6c8b3b95df5a6d5a98760 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p131ecd295a7f6c8b3b95df5a6d5a98760 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni With the change, when setting up memory for type3 memory device, we can create DC regions A property 'num-dc-regions' is added to ct3_props to allow users to pass the number of DC regions to create. To make it easier, other region parameters like region base, length, and block size are hard coded. If needed, these parameters can be added easily. With the change, we can create DC regions with proper kernel side support as below: region=$(cat /sys/bus/cxl/devices/decoder0.0/create_dc_region) echo $region> /sys/bus/cxl/devices/decoder0.0/create_dc_region echo 256 > /sys/bus/cxl/devices/$region/interleave_granularity echo 1 > /sys/bus/cxl/devices/$region/interleave_ways echo "dc0" >/sys/bus/cxl/devices/decoder2.0/mode echo 0x40000000 >/sys/bus/cxl/devices/decoder2.0/dpa_size echo 0x40000000 > /sys/bus/cxl/devices/$region/size echo "decoder2.0" > /sys/bus/cxl/devices/$region/target0 echo 1 > /sys/bus/cxl/devices/$region/commit echo $region > /sys/bus/cxl/drivers/cxl_region/bind Signed-off-by: Fan Ni --- hw/mem/cxl_type3.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 237b544b9c..27b5920f7d 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -707,6 +707,34 @@ static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value, } } +/* + * Create a dc region to test "Get Dynamic Capacity Configuration" command. + */ +static int cxl_create_dc_regions(CXLType3Dev *ct3d) +{ + int i; + uint64_t region_base = (ct3d->hostvmem ? ct3d->hostvmem->size : 0) + + (ct3d->hostpmem ? ct3d->hostpmem->size : 0); + uint64_t region_len = (uint64_t)2 * 1024 * 1024 * 1024; + uint64_t decode_len = 4; /* 4*256MB */ + uint64_t blk_size = 2 * 1024 * 1024; + struct CXLDCD_Region *region; + + for (i = 0; i < ct3d->dc.num_regions; i++) { + region = &ct3d->dc.regions[i]; + region->base = region_base; + region->decode_len = decode_len; + region->len = region_len; + region->block_size = blk_size; + /* dsmad_handle is set when creating cdat table entries */ + region->flags = 0; + + region_base += region->len; + } + + return 0; +} + static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) { DeviceState *ds = DEVICE(ct3d); @@ -775,6 +803,10 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) g_free(p_name); } + if (cxl_create_dc_regions(ct3d)) { + return false; + } + return true; } @@ -1062,6 +1094,7 @@ static Property ct3_props[] = { DEFINE_PROP_UINT64("sn", CXLType3Dev, sn, UI64_NULL), DEFINE_PROP_STRING("cdat", CXLType3Dev, cxl_cstate.cdat.filename), DEFINE_PROP_UINT16("spdm", CXLType3Dev, spdm_port, 0), + DEFINE_PROP_UINT8("num-dc-regions", CXLType3Dev, dc.num_regions, 0), DEFINE_PROP_END_OF_LIST(), }; From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324968 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F907C04E69 for ; Mon, 24 Jul 2023 16:23:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230232AbjGXQXg (ORCPT ); Mon, 24 Jul 2023 12:23:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230162AbjGXQXb (ORCPT ); Mon, 24 Jul 2023 12:23:31 -0400 Received: from mailout2.w2.samsung.com (mailout2.w2.samsung.com [211.189.100.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0BECE49 for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout2.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp029f7516dd2c5a9d8201d2cd6ff7b0d93d~02lGnC6km1330813308usoutp02j; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w2.samsung.com 20230724162324usoutp029f7516dd2c5a9d8201d2cd6ff7b0d93d~02lGnC6km1330813308usoutp02j DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=5SSkUaMVBIRUFuwFhiANd+RWi4PPAiCkGHnUDsDBzrA=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=CxQ125jhrJipU77o03ubyr0Z9ZA7ABlfsujEcw57qsLGqOOjKkNKKfIMJgt0PoyAt PWaEiwWp00TpN2GYqryyvpn7eFlYKtNt9MlsGAYrYesBvUGA+pzCvkW3RiTTNNPZk+ WWb1AYbIKsI3h6mwjt/Xwt6EDEuRV/ZHam6tgSuw= Received: from ussmges1new.samsung.com (u109.gpu85.samsung.co.kr [203.254.195.109]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p2c1b0db1b95bf5d5a59428fba41aadc37~02lGd1Ye10405604056uscas1p2X; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges1new.samsung.com (USCPEMTA) with SMTP id 3F.05.51475.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from ussmgxs1new.samsung.com (u89.gpu85.samsung.co.kr [203.254.195.89]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p1e2745b924e1cbf628aca33514819b07f~02lGH6mnF1474714747uscas1p1t; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec36d-8a3ff7000001c913-97-64bea57ca7bc Received: from SSI-EX1.ssi.samsung.com ( [105.128.2.146]) by ussmgxs1new.samsung.com (USCPEXMTA) with SMTP id 9C.8B.38326.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX1.ssi.samsung.com (105.128.2.226) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:23 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:23 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions Thread-Topic: [Qemu PATCH RESEND 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions Thread-Index: AQHZvksqskXfKAovyE62yBqQlWAdiA== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-6-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNKsWRmVeSWpSXmKPExsWy7djX87o1S/elGNx8wWHRfX4Do8X0qRcY LVbfXMNo0dD0iMWiZfd7Jov9T5+zWKxaeI3N4vysUywWzyc+Z7JYuuQRs8Xx3h0sDtweFyZP YPVY3ODqsXPWXXaPliNvgbw9L5k8Nn78z+7x5NpmJo/Nr18we0ydXe/xeZNcAFcUl01Kak5m WWqRvl0CV8akXd9ZCxomMFa8/tzF3MC4Ka2LkZNDQsBE4vqN38xdjFwcQgIrGSV+PJrOBuG0 MkmsmjyNDaZq36IOIJsDKLGWUWJTHUTNJ0aJyYePsEI4yxglHux4zAzSwCagKLGvaztYs4iA scSxw0vAVjALvGWR+LjmDQtIQlggX6J3wS+oohKJ56/nMELYehI/X3xlBbFZBFQlDu3oZwex eQXMJf6sXARWzylgIbHh0gmwGkYBMYnvp9YwgdjMAuISt57MZ4K4WlBi0ew9zBC2mMS/XQ+h vpGXmPxjBpStKHH/+0t2iF49iRtTp7BB2NoSyxa+ZobYKyhxcuYTFoh6SYmDK26wgDwjIdDP KbHv3mFWiISLRNf8bqjF0hJXr09lBgWXhECyxKqPXBDhHIn5S7ZAzbGWWPhnPdMERpVZSM6e heSMWUjOmIXkjAWMLKsYxUuLi3PTU4sN81LL9YoTc4tL89L1kvNzNzEC09vpf4dzdzDuuPVR 7xAjEwfjIUYJDmYlEV7DmH0pQrwpiZVVqUX58UWlOanFhxilOViUxHkNbU8mCwmkJ5akZqem FqQWwWSZODilGpjyYl9K5k/3nsybe+6m4wfHldcOHV2ebrHfIPrOpFsePgb2t2vvcNoflZ1d WnMiTl1A7VT5/OuvehY3SoRxs8RHzlfYteG2YdazJ/WBJ04dzd48cSlrhqqIzuenF5omuCk+ LZy9ZevvuYc89z8K+1i05vZJ58OtEvKvUpvDD1W+FbypISac2bk8MOtOkcuzO4L+FhsU5I5z eoj/mRuRc8KnKvHt+tOOMjoZ095Y5rrtXbW/44nGikVTu+7OnVJSbmi5/cQCZa453B9a17no /uj4HSbTdOqI6epdwrN5H1964nbXYM8y9SdLDQ79VEz8cNmz6wF7aV1N4eyzu7edvhBqZi1h /vl7vNGEiCVHp7ptVGIpzkg01GIuKk4EAK7DeA7eAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrFIsWRmVeSWpSXmKPExsWS2cA0Sbd66b4Ug8a3uhbd5zcwWkyfeoHR YvXNNYwWDU2PWCxadr9nstj/9DmLxaqF19gszs86xWLxfOJzJoulSx4xWxzv3cHiwO1xYfIE Vo/FDa4eO2fdZfdoOfIWyNvzkslj48f/7B5Prm1m8tj8+gWzx9TZ9R6fN8kFcEVx2aSk5mSW pRbp2yVwZUza9Z21oGECY8Xrz13MDYyb0roYOTkkBEwk9i3qYOti5OIQEljNKLFk6nFmCOcT o8TZl2tZIJxljBJ9p7awg7SwCShK7OvazgZiiwgYSxw7vIQZxGYWeM0i8e0iN4gtLJAv0bvg F1RNicTrCT3MELaexM8XX1lBbBYBVYlDO/rBZvIKmEv8WbkIrF4IyD6zaT9YnFPAQmLDpRNg 9YwCYhLfT61hgtglLnHryXwmiBcEJJbsOc8MYYtKvHz8jxXClpeY/GMGG4StKHH/+0t2iF49 iRtTp7BB2NoSyxa+Zoa4QVDi5MwnLBD1khIHV9xgmcAoMQvJullI2mchaZ+FpH0BI8sqRvHS 4uLc9Ipiw7zUcr3ixNzi0rx0veT83E2MwORw+t/hyB2MR2991DvEyMTBeIhRgoNZSYTXMGZf ihBvSmJlVWpRfnxRaU5q8SFGaQ4WJXFeIdeJ8UIC6YklqdmpqQWpRTBZJg5OqQYmaYm1AdNi hD8Zh21bfo1DLOJoYuROZe2Pl2UfPsx1U5txhmHHjLr81RltZ+et6BXcp7LD/ujUrGmXeEI3 bdE7curSXEaXJXXSDufYWpR07OOLvCdrrV30Zd2Hg42vFrhdLInaVLA3QzDDJ5NpS2soX7jw AdenT3/EzF4vtWZ1i8DNxH2lnQGrTayjPrOKqqhPCJ4ieukWW/VTsWYejrgFJ1qPFWtda7zO U9ezUbB2//OtDEpd6//y+Z8p2H6ZxdXBvzNVsvHVvecfrrxjuS6YcPPSHzkdm/IXjzxmG22t qmA7eVj3JGvVPKuLMp3Kp/03uQnWblz0j00xnn+f3NqgBz9v96x0N3x7QrBBdomvEktxRqKh FnNRcSIA8w5Aa30DAAA= X-CMS-MailID: 20230724162323uscas1p1e2745b924e1cbf628aca33514819b07f CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p1e2745b924e1cbf628aca33514819b07f References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Add (file/memory backed) host backend, all the dynamic capacity regions will share a single, large enough host backend. Set up address space for DC regions to support read/write operations to dynamic capacity for DCD. With the change, following supports are added: 1. add a new property to type3 device "nonvolatile-dc-memdev" to point to host memory backend for dynamic capacity; 2. add namespace for dynamic capacity for read/write support; 3. create cdat entries for each dynamic capacity region; 4. fix dvsec range registers to include DC regions. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 19 +++- hw/mem/cxl_type3.c | 203 +++++++++++++++++++++++++++++------- include/hw/cxl/cxl_device.h | 4 + 3 files changed, 185 insertions(+), 41 deletions(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 59d57ae245..c497298a1d 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -388,9 +388,11 @@ static CXLRetCode cmd_firmware_update_get_info(struct cxl_cmd *cmd, char fw_rev4[0x10]; } QEMU_PACKED *fw_info; QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50); + CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, cxl_dstate); if ((cxl_dstate->vmem_size < CXL_CAPACITY_MULTIPLIER) || - (cxl_dstate->pmem_size < CXL_CAPACITY_MULTIPLIER)) { + (cxl_dstate->pmem_size < CXL_CAPACITY_MULTIPLIER) || + (ct3d->dc.total_capacity < CXL_CAPACITY_MULTIPLIER)) { return CXL_MBOX_INTERNAL_ERROR; } @@ -531,7 +533,8 @@ static CXLRetCode cmd_identify_memory_device(struct cxl_cmd *cmd, CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d); if ((!QEMU_IS_ALIGNED(cxl_dstate->vmem_size, CXL_CAPACITY_MULTIPLIER)) || - (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER))) { + (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER)) || + (!QEMU_IS_ALIGNED(ct3d->dc.total_capacity, CXL_CAPACITY_MULTIPLIER))) { return CXL_MBOX_INTERNAL_ERROR; } @@ -566,9 +569,11 @@ static CXLRetCode cmd_ccls_get_partition_info(struct cxl_cmd *cmd, uint64_t next_pmem; } QEMU_PACKED *part_info = (void *)cmd->payload; QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20); + CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, cxl_dstate); if ((!QEMU_IS_ALIGNED(cxl_dstate->vmem_size, CXL_CAPACITY_MULTIPLIER)) || - (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER))) { + (!QEMU_IS_ALIGNED(cxl_dstate->pmem_size, CXL_CAPACITY_MULTIPLIER)) || + (!QEMU_IS_ALIGNED(ct3d->dc.total_capacity, CXL_CAPACITY_MULTIPLIER))) { return CXL_MBOX_INTERNAL_ERROR; } @@ -880,7 +885,13 @@ static CXLRetCode cmd_media_clear_poison(struct cxl_cmd *cmd, struct clear_poison_pl *in = (void *)cmd->payload; dpa = ldq_le_p(&in->dpa); - if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size) { + if (dpa + CXL_CACHE_LINE_SIZE >= cxl_dstate->static_mem_size + && ct3d->dc.num_regions == 0) { + return CXL_MBOX_INVALID_PA; + } + + if (ct3d->dc.num_regions && dpa + CXL_CACHE_LINE_SIZE >= + cxl_dstate->static_mem_size + ct3d->dc.total_capacity) { return CXL_MBOX_INVALID_PA; } diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 27b5920f7d..af1d919be3 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -20,6 +20,7 @@ #include "hw/pci/spdm.h" #define DWORD_BYTE 4 +#define CXL_CAPACITY_MULTIPLIER (256 * MiB) /* Default CDAT entries for a memory region */ enum { @@ -33,8 +34,8 @@ enum { }; static int ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table, - int dsmad_handle, MemoryRegion *mr, - bool is_pmem, uint64_t dpa_base) + int dsmad_handle, uint8_t flags, + uint64_t dpa_base, uint64_t size) { g_autofree CDATDsmas *dsmas = NULL; g_autofree CDATDslbis *dslbis0 = NULL; @@ -53,9 +54,9 @@ static int ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table, .length = sizeof(*dsmas), }, .DSMADhandle = dsmad_handle, - .flags = is_pmem ? CDAT_DSMAS_FLAG_NV : 0, + .flags = flags, .DPA_base = dpa_base, - .DPA_length = memory_region_size(mr), + .DPA_length = size, }; /* For now, no memory side cache, plausiblish numbers */ @@ -137,9 +138,9 @@ static int ct3_build_cdat_entries_for_mr(CDATSubHeader **cdat_table, * NV: Reserved - the non volatile from DSMAS matters * V: EFI_MEMORY_SP */ - .EFI_memory_type_attr = is_pmem ? 2 : 1, + .EFI_memory_type_attr = flags ? 2 : 1, .DPA_offset = 0, - .DPA_length = memory_region_size(mr), + .DPA_length = size, }; /* Header always at start of structure */ @@ -158,21 +159,28 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv) g_autofree CDATSubHeader **table = NULL; CXLType3Dev *ct3d = priv; MemoryRegion *volatile_mr = NULL, *nonvolatile_mr = NULL; + MemoryRegion *dc_mr = NULL; int dsmad_handle = 0; int cur_ent = 0; int len = 0; int rc, i; + uint64_t vmr_size = 0, pmr_size = 0; - if (!ct3d->hostpmem && !ct3d->hostvmem) { + if (!ct3d->hostpmem && !ct3d->hostvmem && !ct3d->dc.num_regions) { return 0; } + if (ct3d->hostpmem && ct3d->hostvmem && ct3d->dc.host_dc) { + warn_report("The device has static ram and pmem and dynamic capacity"); + } + if (ct3d->hostvmem) { volatile_mr = host_memory_backend_get_memory(ct3d->hostvmem); if (!volatile_mr) { return -EINVAL; } len += CT3_CDAT_NUM_ENTRIES; + vmr_size = volatile_mr->size; } if (ct3d->hostpmem) { @@ -181,6 +189,19 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv) return -EINVAL; } len += CT3_CDAT_NUM_ENTRIES; + pmr_size = nonvolatile_mr->size; + } + + if (ct3d->dc.num_regions) { + if (ct3d->dc.host_dc) { + dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc); + if (!dc_mr) { + return -EINVAL; + } + len += CT3_CDAT_NUM_ENTRIES * ct3d->dc.num_regions; + } else { + return -EINVAL; + } } table = g_malloc0(len * sizeof(*table)); @@ -190,8 +211,8 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv) /* Now fill them in */ if (volatile_mr) { - rc = ct3_build_cdat_entries_for_mr(table, dsmad_handle++, volatile_mr, - false, 0); + rc = ct3_build_cdat_entries_for_mr(table, dsmad_handle++, + 0, 0, vmr_size); if (rc < 0) { return rc; } @@ -200,14 +221,37 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv) if (nonvolatile_mr) { rc = ct3_build_cdat_entries_for_mr(&(table[cur_ent]), dsmad_handle++, - nonvolatile_mr, true, - (volatile_mr ? - memory_region_size(volatile_mr) : 0)); + CDAT_DSMAS_FLAG_NV, vmr_size, pmr_size); if (rc < 0) { goto error_cleanup; } cur_ent += CT3_CDAT_NUM_ENTRIES; } + + if (dc_mr) { + uint64_t region_base = vmr_size + pmr_size; + + /* + * Currently we create cdat entries for each region, should we only + * create dsmas table instead?? + * We assume all dc regions are non-volatile for now. + * + */ + for (i = 0; i < ct3d->dc.num_regions; i++) { + rc = ct3_build_cdat_entries_for_mr(&(table[cur_ent]) + , dsmad_handle++ + , CDAT_DSMAS_FLAG_NV | CDAT_DSMAS_FLAG_DYNAMIC_CAP + , region_base, ct3d->dc.regions[i].len); + if (rc < 0) { + goto error_cleanup; + } + ct3d->dc.regions[i].dsmadhandle = dsmad_handle - 1; + + cur_ent += CT3_CDAT_NUM_ENTRIES; + region_base += ct3d->dc.regions[i].len; + } + } + assert(len == cur_ent); *cdat_table = g_steal_pointer(&table); @@ -435,11 +479,24 @@ static void build_dvsecs(CXLType3Dev *ct3d) range2_size_hi = ct3d->hostpmem->size >> 32; range2_size_lo = (2 << 5) | (2 << 2) | 0x3 | (ct3d->hostpmem->size & 0xF0000000); + } else if (ct3d->dc.host_dc) { + range2_size_hi = ct3d->dc.host_dc->size >> 32; + range2_size_lo = (2 << 5) | (2 << 2) | 0x3 | + (ct3d->dc.host_dc->size & 0xF0000000); } - } else { + } else if (ct3d->hostpmem) { range1_size_hi = ct3d->hostpmem->size >> 32; range1_size_lo = (2 << 5) | (2 << 2) | 0x3 | (ct3d->hostpmem->size & 0xF0000000); + if (ct3d->dc.host_dc) { + range2_size_hi = ct3d->dc.host_dc->size >> 32; + range2_size_lo = (2 << 5) | (2 << 2) | 0x3 | + (ct3d->dc.host_dc->size & 0xF0000000); + } + } else { + range1_size_hi = ct3d->dc.host_dc->size >> 32; + range1_size_lo = (2 << 5) | (2 << 2) | 0x3 | + (ct3d->dc.host_dc->size & 0xF0000000); } dvsec = (uint8_t *)&(CXLDVSECDevice){ @@ -708,7 +765,8 @@ static void ct3d_reg_write(void *opaque, hwaddr offset, uint64_t value, } /* - * Create a dc region to test "Get Dynamic Capacity Configuration" command. + * Create dc regions. + * TODO: region parameters are hard coded, may need to change in the future. */ static int cxl_create_dc_regions(CXLType3Dev *ct3d) { @@ -739,7 +797,8 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) { DeviceState *ds = DEVICE(ct3d); - if (!ct3d->hostmem && !ct3d->hostvmem && !ct3d->hostpmem) { + if (!ct3d->hostmem && !ct3d->hostvmem && !ct3d->hostpmem + && !ct3d->dc.num_regions) { error_setg(errp, "at least one memdev property must be set"); return false; } else if (ct3d->hostmem && ct3d->hostpmem) { @@ -807,6 +866,50 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) return false; } + ct3d->dc.total_capacity = 0; + if (ct3d->dc.host_dc) { + MemoryRegion *dc_mr; + char *dc_name; + uint64_t total_region_size = 0; + int i; + + dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc); + if (!dc_mr) { + error_setg(errp, "dynamic capacity must have backing device"); + return false; + } + /* FIXME: set dc as nonvolatile for now */ + memory_region_set_nonvolatile(dc_mr, true); + memory_region_set_enabled(dc_mr, true); + host_memory_backend_set_mapped(ct3d->dc.host_dc, true); + if (ds->id) { + dc_name = g_strdup_printf("cxl-dcd-dpa-dc-space:%s", ds->id); + } else { + dc_name = g_strdup("cxl-dcd-dpa-dc-space"); + } + address_space_init(&ct3d->dc.host_dc_as, dc_mr, dc_name); + + for (i = 0; i < ct3d->dc.num_regions; i++) { + total_region_size += ct3d->dc.regions[i].len; + } + /* Make sure the host backend is large enough to cover all dc range */ + if (total_region_size > memory_region_size(dc_mr)) { + error_setg(errp, + "too small host backend size, increase to %lu MiB or more", + total_region_size / 1024 / 1024); + return false; + } + + if (dc_mr->size % CXL_CAPACITY_MULTIPLIER != 0) { + error_setg(errp, "DC region size is unaligned to %lx", + CXL_CAPACITY_MULTIPLIER); + return false; + } + + ct3d->dc.total_capacity = total_region_size; + g_free(dc_name); + } + return true; } @@ -916,6 +1019,9 @@ err_release_cdat: err_free_special_ops: g_free(regs->special_ops); err_address_space_free: + if (ct3d->dc.host_dc) { + address_space_destroy(&ct3d->dc.host_dc_as); + } if (ct3d->hostpmem) { address_space_destroy(&ct3d->hostpmem_as); } @@ -935,6 +1041,9 @@ static void ct3_exit(PCIDevice *pci_dev) cxl_doe_cdat_release(cxl_cstate); spdm_sock_fini(ct3d->doe_spdm.socket); g_free(regs->special_ops); + if (ct3d->dc.host_dc) { + address_space_destroy(&ct3d->dc.host_dc_as); + } if (ct3d->hostpmem) { address_space_destroy(&ct3d->hostpmem_as); } @@ -999,16 +1108,24 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d, AddressSpace **as, uint64_t *dpa_offset) { - MemoryRegion *vmr = NULL, *pmr = NULL; + MemoryRegion *vmr = NULL, *pmr = NULL, *dc_mr = NULL; + uint64_t vmr_size = 0, pmr_size = 0, dc_size = 0; if (ct3d->hostvmem) { vmr = host_memory_backend_get_memory(ct3d->hostvmem); + vmr_size = memory_region_size(vmr); } if (ct3d->hostpmem) { pmr = host_memory_backend_get_memory(ct3d->hostpmem); + pmr_size = memory_region_size(pmr); + } + if (ct3d->dc.host_dc) { + dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc); + /* Do we want dc_size to be dc_mr->size or not?? */ + dc_size = ct3d->dc.total_capacity; } - if (!vmr && !pmr) { + if (!vmr && !pmr && !dc_mr) { return -ENODEV; } @@ -1016,19 +1133,19 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d, return -EINVAL; } - if (*dpa_offset > ct3d->cxl_dstate.static_mem_size) { + if ((*dpa_offset >= vmr_size + pmr_size + dc_size) || + (*dpa_offset >= vmr_size + pmr_size && ct3d->dc.num_regions == 0)) { return -EINVAL; } - if (vmr) { - if (*dpa_offset < memory_region_size(vmr)) { - *as = &ct3d->hostvmem_as; - } else { - *as = &ct3d->hostpmem_as; - *dpa_offset -= memory_region_size(vmr); - } - } else { + if (*dpa_offset < vmr_size) { + *as = &ct3d->hostvmem_as; + } else if (*dpa_offset < vmr_size + pmr_size) { *as = &ct3d->hostpmem_as; + *dpa_offset -= vmr_size; + } else { + *as = &ct3d->dc.host_dc_as; + *dpa_offset -= (vmr_size + pmr_size); } return 0; @@ -1095,6 +1212,8 @@ static Property ct3_props[] = { DEFINE_PROP_STRING("cdat", CXLType3Dev, cxl_cstate.cdat.filename), DEFINE_PROP_UINT16("spdm", CXLType3Dev, spdm_port, 0), DEFINE_PROP_UINT8("num-dc-regions", CXLType3Dev, dc.num_regions, 0), + DEFINE_PROP_LINK("nonvolatile-dc-memdev", CXLType3Dev, dc.host_dc, + TYPE_MEMORY_BACKEND, HostMemoryBackend *), DEFINE_PROP_END_OF_LIST(), }; @@ -1161,33 +1280,43 @@ static void set_lsa(CXLType3Dev *ct3d, const void *buf, uint64_t size, static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data) { - MemoryRegion *vmr = NULL, *pmr = NULL; + MemoryRegion *vmr = NULL, *pmr = NULL, *dc_mr = NULL; AddressSpace *as; + uint64_t vmr_size = 0, pmr_size = 0, dc_size = 0; if (ct3d->hostvmem) { vmr = host_memory_backend_get_memory(ct3d->hostvmem); + vmr_size = memory_region_size(vmr); } if (ct3d->hostpmem) { pmr = host_memory_backend_get_memory(ct3d->hostpmem); + pmr_size = memory_region_size(pmr); } + if (ct3d->dc.host_dc) { + dc_mr = host_memory_backend_get_memory(ct3d->dc.host_dc); + dc_size = ct3d->dc.total_capacity; + } - if (!vmr && !pmr) { + if (!vmr && !pmr && !dc_mr) { return false; } - if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.static_mem_size) { + if (dpa_offset >= vmr_size + pmr_size + dc_size) { + return false; + } + if (dpa_offset + CXL_CACHE_LINE_SIZE >= vmr_size + pmr_size + && ct3d->dc.num_regions == 0) { return false; } - if (vmr) { - if (dpa_offset < memory_region_size(vmr)) { - as = &ct3d->hostvmem_as; - } else { - as = &ct3d->hostpmem_as; - dpa_offset -= memory_region_size(vmr); - } - } else { + if (dpa_offset < vmr_size) { + as = &ct3d->hostvmem_as; + } else if (dpa_offset < vmr_size + pmr_size) { as = &ct3d->hostpmem_as; + dpa_offset -= vmr->size; + } else { + as = &ct3d->dc.host_dc_as; + dpa_offset -= (vmr_size + pmr_size); } address_space_write(as, dpa_offset, MEMTXATTRS_UNSPECIFIED, &data, diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index a32ee6d6ba..ddb24271a8 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -426,6 +426,10 @@ struct CXLType3Dev { uint64_t poison_list_overflow_ts; struct dynamic_capacity { + HostMemoryBackend *host_dc; + AddressSpace host_dc_as; + uint64_t total_capacity; /* 256M aligned */ + uint8_t num_regions; /* 0-8 regions */ struct CXLDCD_Region regions[DCD_MAX_REGION_NUM]; } dc; From patchwork Mon Jul 24 16:23:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6604EC41513 for ; Mon, 24 Jul 2023 16:23:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229656AbjGXQXc (ORCPT ); Mon, 24 Jul 2023 12:23:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229771AbjGXQXa (ORCPT ); Mon, 24 Jul 2023 12:23:30 -0400 Received: from mailout1.w2.samsung.com (mailout1.w2.samsung.com [211.189.100.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE56C19F for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout1.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp01105f234ef75c19e0fa2a2c82576cdfad~02lGm3rk12719927199usoutp01z; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w2.samsung.com 20230724162324usoutp01105f234ef75c19e0fa2a2c82576cdfad~02lGm3rk12719927199usoutp01z DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=0lFWcB4DqM5aIudi8cl3SMn2Aw136RMry04GoncNhGc=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=WPEo3M4sjD5axqvoj4nIVOHHNb7QOuNwSCaD8glJW+ireE3h3m1HFbm99GnpDBeo2 xVZwwDjT1k6lGuV+PflHOT8yLtsPwF9xPOZ+22W6PFFQi25G2xoODzYArI3dmbreKv LHhNPNbzgoFclNhpDwy0lyQeU3irp6g8BPA9EGiw= Received: from ussmges3new.samsung.com (u112.gpu85.samsung.co.kr [203.254.195.112]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p26b08ff78320f7314afde394bd8adca00~02lGeTFt20598305983uscas1p2c; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p1.samsung.com ( [182.198.245.206]) by ussmges3new.samsung.com (USCPEMTA) with SMTP id 83.A5.62237.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from ussmgxs3new.samsung.com (u92.gpu85.samsung.co.kr [203.254.195.92]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162323uscas1p2f1a7176a3b646b5c790fb41372244713~02lGKFJGx0636506365uscas1p2D; Mon, 24 Jul 2023 16:23:23 +0000 (GMT) X-AuditID: cbfec370-b17ff7000001f31d-31-64bea57c3962 Received: from SSI-EX2.ssi.samsung.com ( [105.128.2.145]) by ussmgxs3new.samsung.com (USCPEXMTA) with SMTP id 71.D1.64580.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX2.ssi.samsung.com (105.128.2.227) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:23 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:23 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support Thread-Topic: [Qemu PATCH RESEND 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support Thread-Index: AQHZvksqpRKN14lEYEidzSMbndI4Pg== Date: Mon, 24 Jul 2023 16:23:22 +0000 Message-ID: <20230724162313.34196-7-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFKsWRmVeSWpSXmKPExsWy7djXc7o1S/elGKy9zmnRfX4Do8X0qRcY LVbfXMNo0dD0iMWiZfd7Jov9T5+zWKxaeI3N4vysUywWzyc+Z7JYuuQRs8Xx3h0sDtweFyZP YPVY3ODqsXPWXXaPliNvgbw9L5k8Nn78z+7x5NpmJo/Nr18we0ydXe/xeZNcAFcUl01Kak5m WWqRvl0CV8bUKzPZCj5rVVz8f4y9gfGdQhcjJ4eEgInEgTnn2bsYuTiEBFYySuzqe84K4bQy SZxe08UKU7V13XeoqrWMEo23TjODJIQEPjFKrL3PApFYxijxYMdjsASbgKLEvq7tbCC2iICx xLHDS5hBipgF3rJIfFzzhgUkISxQK3H5QQMrRFETo8S+TZFdjBxAtp7EywlCIGEWAVWJQzv6 2UFsXgFzib33XoG1cgpYSGy4dAKslVFATOL7qTVMIDazgLjErSfzmSCuFpRYNHsPM4QtJvFv 10M2CFteYvKPGVC2osT97y/ZIXr1JG5MncIGYWtLLFv4mhlir6DEyZlPWCDqJSUOrrgB9rCE wHROiUvdr6BB5CJxd20nI4QtLTF9zWUWkF8kBJIlVn3kggjnSMxfsgVqjrXEwj/rmSYwqsxC cvYsJGfMQnLGLCRnLGBkWcUoXlpcnJueWmycl1quV5yYW1yal66XnJ+7iRGY3E7/O1ywg/HW rY96hxiZOBgPMUpwMCuJ8BrG7EsR4k1JrKxKLcqPLyrNSS0+xCjNwaIkzmtoezJZSCA9sSQ1 OzW1ILUIJsvEwSnVwJQgycSaLP7i1K0K9SdBznwF5x+8vpn23W36DpfNrHf3f7hZ+cbZ6ffS 3p9HDa7vqBXjWXNyWveOnsCyR526v/8cfRueYJdp9iaWV7tIPZf3W42Hmpyw2qv7Kaun75l7 5MU9scowL4aFG1+zrPJdrH7ITqP1v7Tx/Ltsl018xacEKybLVbCvvffBUyjsw8af375c4Y6N yb36eXHytrcyO7/3zE2b5f4wT2BX3xfW05kl/T1TSivnmqkzW83TvBgltkckaWXZ6lT/JJfW zaoLpm+Ttk26HPbFpEZkk6vyqUvZ1qKJlVOr1mzxfdHE1cVZ3iN4TtThxSWeD4+dTqpHTr7f 7hIuYsEg8q/urBZLthJLcUaioRZzUXEiAMHTdkzdAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrJIsWRmVeSWpSXmKPExsWS2cA0Ubd66b4Ug2lzDCy6z29gtJg+9QKj xeqbaxgtGpoesVi07H7PZLH/6XMWi1ULr7FZnJ91isXi+cTnTBZLlzxitjjeu4PFgdvjwuQJ rB6LG1w9ds66y+7RcuQtkLfnJZPHxo//2T2eXNvM5LH59Qtmj6mz6z0+b5IL4IrisklJzcks Sy3St0vgyph6ZSZbwWetiov/j7E3ML5T6GLk5JAQMJHYuu47excjF4eQwGpGiZNbH7NAOJ8Y JeYu3scM4SxjlOg7tYUdpIVNQFFiX9d2NhBbRMBY4tjhJcwgNrPAaxaJbxe5QWxhgVqJyw8a WEGaRQSaGCUmX/8NNJYDyNGTeDlBCKSGRUBV4tCOfrCZvALmEnvvvWIBsYWA7DOb9oPFOQUs JDZcOsEKYjMKiEl8P7WGCWKXuMStJ/OZIF4QkFiy5zwzhC0q8fLxP1YIW15i8o8ZbBC2osT9 7y/ZIXr1JG5MncIGYWtLLFv4mhniBkGJkzOfsEDUS0ocXHGDZQKjxCwk62YhaZ+FpH0WkvYF jCyrGMVLi4tz0yuKjfNSy/WKE3OLS/PS9ZLzczcxAlPD6X+HY3Yw3rv1Ue8QIxMH4yFGCQ5m JRFew5h9KUK8KYmVValF+fFFpTmpxYcYpTlYlMR5PWInxgsJpCeWpGanphakFsFkmTg4pRqY erdsFdNSCfd+d9U34Kjs6UmuvGu50s/ylTAtfeCqfCniwuntV4L0E9o+Bnnlb3T+Ili8KiL4 EcM3mbkJWVZOMW1StyoneXVtd7q/OuaCuqq/xhZL2R/q/0LKC68sqnWe0d6d61V9SP0TxyFu tjk3mpn+pG7xZnriXmfptnHLJ7/kmL1J6XN+Xrr57GTDhZvzEs/z2v9sjevUc46w/ON0ez3j /GK9Xwd47i16PmFdo/HXIolnZ18xtr6YYX1b0eNvyKxT9xQi9JjkrGSy6x45iX54p136Vkt3 rqvSuvXre2X9WZdze9046bCqU1knqvVP9AOLv5Ya6u5vcxIE7JQ3/p5+RTz5acFqt+bPJaZK LMUZiYZazEXFiQDE/dgefAMAAA== X-CMS-MailID: 20230724162323uscas1p2f1a7176a3b646b5c790fb41372244713 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162323uscas1p2f1a7176a3b646b5c790fb41372244713 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Add dynamic capacity extent list representative to the definition of CXLType3Dev and add get DC extent list mailbox command per CXL.spec.3.0:.8.2.9.8.9.2. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 71 +++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3.c | 1 + include/hw/cxl/cxl_device.h | 23 ++++++++++++ 3 files changed, 95 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index c497298a1d..754ab68b78 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -83,6 +83,7 @@ enum { #define CLEAR_POISON 0x2 DCD_CONFIG = 0x48, /*r3.0: 8.2.9.8.9*/ #define GET_DC_CONFIG 0x0 + #define GET_DYN_CAP_EXT_LIST 0x1 PHYSICAL_SWITCH = 0x51 #define IDENTIFY_SWITCH_DEVICE 0x0 }; @@ -1018,6 +1019,73 @@ static CXLRetCode cmd_dcd_get_dyn_cap_config(struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } +/* + * cxl spec 3.0: 8.2.9.8.9.2 + * Get Dynamic Capacity Extent List (Opcode 4810h) + */ +static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct get_dyn_cap_ext_list_in_pl { + uint32_t extent_cnt; + uint32_t start_extent_id; + } QEMU_PACKED; + + struct get_dyn_cap_ext_list_out_pl { + uint32_t count; + uint32_t total_extents; + uint32_t generation_num; + uint8_t rsvd[4]; + CXLDCExtent_raw records[]; + } QEMU_PACKED; + + struct get_dyn_cap_ext_list_in_pl *in = (void *)cmd->payload; + struct get_dyn_cap_ext_list_out_pl *out = (void *)cmd->payload; + struct CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, + cxl_dstate); + uint16_t record_count = 0, i = 0, record_done = 0; + CXLDCDExtentList *extent_list = &ct3d->dc.extents; + CXLDCD_Extent *ent; + uint16_t out_pl_len; + uint32_t start_extent_id = in->start_extent_id; + + if (start_extent_id > ct3d->dc.total_extent_count) { + return CXL_MBOX_INVALID_INPUT; + } + + record_count = MIN(in->extent_cnt, + ct3d->dc.total_extent_count - start_extent_id); + + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]); + /* May need more processing here in the future */ + assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE); + + memset(out, 0, out_pl_len); + stl_le_p(&out->count, record_count); + stl_le_p(&out->total_extents, ct3d->dc.total_extent_count); + stl_le_p(&out->generation_num, ct3d->dc.ext_list_gen_seq); + + if (record_count > 0) { + QTAILQ_FOREACH(ent, extent_list, node) { + if (i++ < start_extent_id) { + continue; + } + stq_le_p(&out->records[record_done].start_dpa, ent->start_dpa); + stq_le_p(&out->records[record_done].len, ent->len); + memcpy(&out->records[record_done].tag, ent->tag, 0x10); + stw_le_p(&out->records[record_done].shared_seq, ent->shared_seq); + record_done++; + if (record_done == record_count) { + break; + } + } + } + + *len = out_pl_len; + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_DATA_CHANGE (1 << 2) #define IMMEDIATE_POLICY_CHANGE (1 << 3) @@ -1058,6 +1126,9 @@ static struct cxl_cmd cxl_cmd_set[256][256] = { cmd_media_clear_poison, 72, 0 }, [DCD_CONFIG][GET_DC_CONFIG] = { "DCD_GET_DC_CONFIG", cmd_dcd_get_dyn_cap_config, 2, 0 }, + [DCD_CONFIG][GET_DYN_CAP_EXT_LIST] = { + "DCD_GET_DYNAMIC_CAPACITY_EXTENT_LIST", cmd_dcd_get_dyn_cap_ext_list, + 8, 0 }, }; static struct cxl_cmd cxl_cmd_set_sw[256][256] = { diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index af1d919be3..608063ac52 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -789,6 +789,7 @@ static int cxl_create_dc_regions(CXLType3Dev *ct3d) region_base += region->len; } + QTAILQ_INIT(&ct3d->dc.extents); return 0; } diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index ddb24271a8..a9cfe4e904 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -384,6 +384,25 @@ typedef QLIST_HEAD(, CXLPoison) CXLPoisonList; #define DCD_MAX_REGION_NUM 8 +typedef struct CXLDCD_Extent_raw { + uint64_t start_dpa; + uint64_t len; + uint8_t tag[0x10]; + uint16_t shared_seq; + uint8_t rsvd[0x6]; +} QEMU_PACKED CXLDCExtent_raw; + +typedef struct CXLDCD_Extent { + uint64_t start_dpa; + uint64_t len; + uint8_t tag[0x10]; + uint16_t shared_seq; + uint8_t rsvd[0x6]; + + QTAILQ_ENTRY(CXLDCD_Extent) node; +} CXLDCD_Extent; +typedef QTAILQ_HEAD(, CXLDCD_Extent) CXLDCDExtentList; + typedef struct CXLDCD_Region { uint64_t base; uint64_t decode_len; /* in multiples of 256MB */ @@ -432,6 +451,10 @@ struct CXLType3Dev { uint8_t num_regions; /* 0-8 regions */ struct CXLDCD_Region regions[DCD_MAX_REGION_NUM]; + CXLDCDExtentList extents; + + uint32_t total_extent_count; + uint32_t ext_list_gen_seq; } dc; }; From patchwork Mon Jul 24 16:23:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8339C001B0 for ; Mon, 24 Jul 2023 16:23:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230195AbjGXQXf (ORCPT ); Mon, 24 Jul 2023 12:23:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231303AbjGXQXb (ORCPT ); Mon, 24 Jul 2023 12:23:31 -0400 Received: from mailout2.w2.samsung.com (mailout2.w2.samsung.com [211.189.100.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B038E4F for ; Mon, 24 Jul 2023 09:23:26 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout2.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162324usoutp02f7f58cedbc725731c692aff9ff1199d1~02lG0pWe51330013300usoutp022; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w2.samsung.com 20230724162324usoutp02f7f58cedbc725731c692aff9ff1199d1~02lG0pWe51330013300usoutp022 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215804; bh=19jO8AQKlPnjvTG/qAmQR958D7VywZQOcO0U0leP8tM=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=t9RBhoO37r/+1eBQHzaXsnvTdhtQyzTVEUEei9CibaF2NlyoO/guDczlkYWVpLP9L CzULxtGWzm+qY5uzL24HCEvokL8zukfxS2FUXbu0Fq/HfiUZJJ4JeIMw1uX6+XAPQT 8FzdFsZydBrExSY0byW2Gl3MjCZuNcqbKG/UD9Pw= Received: from ussmges3new.samsung.com (u112.gpu85.samsung.co.kr [203.254.195.112]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p2a98acca4ed1916794fe694fb091a570a~02lGqaXvv0628606286uscas1p2K; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p1.samsung.com ( [182.198.245.206]) by ussmges3new.samsung.com (USCPEMTA) with SMTP id 44.A5.62237.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from ussmgxs3new.samsung.com (u92.gpu85.samsung.co.kr [203.254.195.92]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p1004474b4ac5267f90a97a6eeabe68db8~02lGRrH4t2262822628uscas1p1P; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) X-AuditID: cbfec370-823ff7000001f31d-32-64bea57c8842 Received: from SSI-EX4.ssi.samsung.com ( [105.128.2.146]) by ussmgxs3new.samsung.com (USCPEXMTA) with SMTP id 81.D1.64580.B75AEB46; Mon, 24 Jul 2023 12:23:23 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX4.ssi.samsung.com (105.128.2.229) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:23 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:23 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response Thread-Topic: [Qemu PATCH RESEND 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response Thread-Index: AQHZvksql9OmCbCKwEW6gosXJjHlUw== Date: Mon, 24 Jul 2023 16:23:23 +0000 Message-ID: <20230724162313.34196-8-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBKsWRmVeSWpSXmKPExsWy7djXc7o1S/elGDScF7ToPr+B0WL61AuM FqtvrmG0aGh6xGLRsvs9k8X+p89ZLFYtvMZmcX7WKRaL5xOfM1ksXfKI2eJ47w4WB26PC5Mn sHosbnD12DnrLrtHy5G3QN6el0weGz/+Z/d4cm0zk8fm1y+YPabOrvf4vEkugCuKyyYlNSez LLVI3y6BK+P20V6WggWBFQ8v+jQwbrXsYuTkkBAwkbjZsp8NxBYSWMkoceUikM0FZLcySTw7 v5oZpujFl35miMRaRokl3SuZIJxPjBKTn+5ih3CWMUo82PEYrIVNQFFiX9d2sLkiAsYSxw4v AWtnFnjLIvFxzRsWEEdYoIlR4uK8B6wQVe2MEtuWanUxcgDZehJ7+qpATBYBVYmji+JAKngF zCUmTrnGDmJzClhIbLh0AqyTUUBM4vupNUwgNrOAuMStJ/OZIM4WlFg0ew/UC2IS/3Y9ZIOw 5SUm/5gBZStK3P/+kh2iV0/ixtQpbBC2tsSyha+ZIfYKSpyc+YQFol5S4uCKG2DnSwhM5pQ4 cPAwC8idEgIuEnduyELUSEtMX3MZKpwsseojF0Q4R2L+ki1QY6wlFv5ZzzSBUWUWkqtnIbli FpIrZiG5YgEjyypG8dLi4tz01GLjvNRyveLE3OLSvHS95PzcTYzAxHb63+GCHYy3bn3UO8TI xMF4iFGCg1lJhNcwZl+KEG9KYmVValF+fFFpTmrxIUZpDhYlcV5D25PJQgLpiSWp2ampBalF MFkmDk6pBqbEJwvZjfL4k07dU8hMWuvOfn/K8gk9DDZPZlenfvWdPjVf6UL4UqMT2zeu4eg+ nfjq/qcNP+7u2F1YOGnZS869vyY2BLBaT4lm4j3zS1b7jk1TVTyv+T/fIzUHvM8/MU48zb1D kWn1HD3Li0/s3dKVrkls4XG7oR+2v8c4fn7PbJHFzMzh7WKrzJ6fD/YJDeK5NKniUtLs/U3P T/RLBjQ3BVn+/c9gPlc3evaKjW6ZB6P9M2Y9aH6Zu+PHuYiSuTpbedMXZ7ux3tzpk8lh+Emy Nf/rS4Uwxgcz15etK9MumhnIZHBmC4s73z4lPaUnZ878s3yiZp4YnpSp+Um9M/eF9YRgns99 Gza8rFzaqKDEUpyRaKjFXFScCABoyHS/2wMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBIsWRmVeSWpSXmKPExsWS2cA0Sbd66b4Ug5mPzC26z29gtJg+9QKj xeqbaxgtGpoesVi07H7PZLH/6XMWi1ULr7FZnJ91isXi+cTnTBZLlzxitjjeu4PFgdvjwuQJ rB6LG1w9ds66y+7RcuQtkLfnJZPHxo//2T2eXNvM5LH59Qtmj6mz6z0+b5IL4IrisklJzcks Sy3St0vgyrh9tJelYEFgxcOLPg2MWy27GDk5JARMJF586WfuYuTiEBJYzSjR0HURyvnEKPH8 +2E2CGcZo0TfqS3sIC1sAooS+7q2s4HYIgLGEscOL2EGsZkFXrNIfLvIDdIgLNDEKHFx3gNW EEdEoJ1R4v739UxdjBxAjp7Enr4qEJNFQFXi6KI4kF5eAXOJiVOugc0XArLPbNoPZnMKWEhs uHSCFcRmFBCT+H5qDRPELnGJW0/mM0G8ICCxZM95ZghbVOLl43+sELa8xOQfM9ggbEWgC16y Q/TqSdyYOoUNwtaWWLbwNTPEDYISJ2c+YYGol5Q4uOIGywRGiVlI1s1C0j4LSfssJO0LGFlW MYqXFhfnplcUG+ellusVJ+YWl+al6yXn525iBCaG0/8Ox+xgvHfro94hRiYOxkOMEhzMSiK8 hjH7UoR4UxIrq1KL8uOLSnNSiw8xSnOwKInzesROjBcSSE8sSc1OTS1ILYLJMnFwSjUwHWKX FpNO+W16vPPxs1l250+LLuZkX6jxYPWi7ab3ThpmTHGsUPV3l/Oq6F0f9cFmaZK4PP/Z1d88 8+7vndbVvXa1qNfriBebV0ceSjy2v2Wqhnua66r9lzvVt0+8zit/t+npurZVHh9jQoWqK4/m Kk361dBi/ve8INvkAwyb92TPCTZ2WlHi7eL8YtPc2Tez5ugenHEmUU37T0LI3tzde9ItbqvJ TtqwozRnI/uKKezsR63EEuU/vLbOc3HjaLl3WkSx02rvjWWCH3sTfpdNXWpzZMoGJl9DK85N n7fqrHdNmrSxPY7xZPb0RZx7lE7oiJe7fLZUzXupID7507S7Pf0tChm9qnEb3ZPW/Fb5rsRS nJFoqMVcVJwIAMihyZp7AwAA X-CMS-MailID: 20230724162324uscas1p1004474b4ac5267f90a97a6eeabe68db8 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162324uscas1p1004474b4ac5267f90a97a6eeabe68db8 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Per CXL spec 3.0, two mailbox commands are implemented: Add Dynamic Capacity Response (Opcode 4802h) 8.2.9.8.9.3, and Release Dynamic Capacity (Opcode 4803h) 8.2.9.8.9.4. Signed-off-by: Fan Ni --- hw/cxl/cxl-mailbox-utils.c | 253 ++++++++++++++++++++++++++++++++++++ include/hw/cxl/cxl_device.h | 3 +- 2 files changed, 255 insertions(+), 1 deletion(-) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 754ab68b78..d547385ba7 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -84,6 +84,8 @@ enum { DCD_CONFIG = 0x48, /*r3.0: 8.2.9.8.9*/ #define GET_DC_CONFIG 0x0 #define GET_DYN_CAP_EXT_LIST 0x1 + #define ADD_DYN_CAP_RSP 0x2 + #define RELEASE_DYN_CAP 0x3 PHYSICAL_SWITCH = 0x51 #define IDENTIFY_SWITCH_DEVICE 0x0 }; @@ -1086,6 +1088,251 @@ static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } +/* + * Check whether the bits at addr between [nr, nr+size) are all set, + * return 1 if all 1s, else return 0 + */ +static inline int test_bits(const unsigned long *addr, int nr, int size) +{ + unsigned long res = find_next_zero_bit(addr, size + nr, nr); + + return (res >= nr + size) ? 1 : 0; +} + +/* + * Find dynamic capacity region id based on dpa range [dpa, dpa+len) + */ +static uint8_t find_region_id(struct CXLType3Dev *dev, uint64_t dpa, + uint64_t len) +{ + int8_t i = dev->dc.num_regions - 1; + + while (i > 0 && dpa < dev->dc.regions[i].base) { + i--; + } + + if (dpa < dev->dc.regions[i].base + || dpa + len > dev->dc.regions[i].base + dev->dc.regions[i].len) { + return dev->dc.num_regions; + } + + return i; +} + +static void insert_extent_to_extent_list(CXLDCDExtentList *list, uint64_t dpa, + uint64_t len, uint8_t *tag, uint16_t shared_seq) +{ + CXLDCD_Extent *extent; + extent = g_new0(CXLDCD_Extent, 1); + extent->start_dpa = dpa; + extent->len = len; + if (tag) { + memcpy(extent->tag, tag, 0x10); + } else { + memset(extent->tag, 0, 0x10); + } + extent->shared_seq = shared_seq; + + QTAILQ_INSERT_TAIL(list, extent, node); +} + +typedef struct updated_dc_extent_list_in_pl { + uint32_t num_entries_updated; + uint8_t rsvd[4]; + struct { /* r3.0: Table 8-130 */ + uint64_t start_dpa; + uint64_t len; + uint8_t rsvd[8]; + } QEMU_PACKED updated_entries[]; +} QEMU_PACKED updated_dc_extent_list_in_pl; + +/* + * The function only check the input extent list against itself. + */ +static CXLRetCode detect_malformed_extent_list(CXLType3Dev *dev, + const updated_dc_extent_list_in_pl *in) +{ + unsigned long *blk_bitmap; + uint64_t min_block_size = dev->dc.regions[0].block_size; + struct CXLDCD_Region *region = &dev->dc.regions[0]; + uint32_t i; + uint64_t dpa, len; + uint8_t rid; + CXLRetCode ret; + + for (i = 1; i < dev->dc.num_regions; i++) { + region = &dev->dc.regions[i]; + if (min_block_size > region->block_size) { + min_block_size = region->block_size; + } + } + + blk_bitmap = bitmap_new((region->len + region->base + - dev->dc.regions[0].base) / min_block_size); + + for (i = 0; i < in->num_entries_updated; i++) { + dpa = in->updated_entries[i].start_dpa; + len = in->updated_entries[i].len; + + rid = find_region_id(dev, dpa, len); + if (rid == dev->dc.num_regions) { + ret = CXL_MBOX_INVALID_PA; + goto out; + } + + region = &dev->dc.regions[rid]; + if (dpa % region->block_size || len % region->block_size) { + ret = CXL_MBOX_INVALID_EXTENT_LIST; + goto out; + } + /* the dpa range already covered by some other extents in the list */ + if (test_bits(blk_bitmap, dpa / min_block_size, len / min_block_size)) { + ret = CXL_MBOX_INVALID_EXTENT_LIST; + goto out; + } + bitmap_set(blk_bitmap, dpa / min_block_size, len / min_block_size); + } + + ret = CXL_MBOX_SUCCESS; + +out: + g_free(blk_bitmap); + return ret; +} + +/* + * cxl spec 3.0: 8.2.9.8.9.3 + * Add Dynamic Capacity Response (opcode 4802h) + * Assume an extent is added only after the response is processed successfully + * TODO: for better extent list validation, a better solution would be + * maintaining a pending extent list and use it to verify the extent list in + * the response. + */ +static CXLRetCode cmd_dcd_add_dyn_cap_rsp(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, uint16_t *len_unused) +{ + updated_dc_extent_list_in_pl *in = (void *)cmd->payload; + struct CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, + cxl_dstate); + CXLDCDExtentList *extent_list = &ct3d->dc.extents; + CXLDCD_Extent *ent; + uint32_t i; + uint64_t dpa, len; + CXLRetCode ret; + + if (in->num_entries_updated == 0) { + ret = CXL_MBOX_SUCCESS; + goto out; + } + + ret = detect_malformed_extent_list(ct3d, in); + if (ret != CXL_MBOX_SUCCESS) { + goto out; + } + + for (i = 0; i < in->num_entries_updated; i++) { + dpa = in->updated_entries[i].start_dpa; + len = in->updated_entries[i].len; + + /* + * Check if the DPA range of the to-be-added extent overlaps with + * existing extent list maintained by the device. + */ + QTAILQ_FOREACH(ent, extent_list, node) { + if (ent->start_dpa == dpa && ent->len == len) { + ret = CXL_MBOX_INVALID_PA; + goto out; + } else if (ent->start_dpa <= dpa + && dpa + len <= ent->start_dpa + ent->len) { + ret = CXL_MBOX_INVALID_PA; + goto out; + } else if ((dpa < ent->start_dpa + ent->len + && dpa + len > ent->start_dpa + ent->len) + || (dpa < ent->start_dpa && dpa + len > ent->start_dpa)) { + ret = CXL_MBOX_INVALID_PA; + goto out; + } + } + + /* + * TODO: add a pending extent list based on event log record and verify + * the input response + */ + + insert_extent_to_extent_list(extent_list, dpa, len, NULL, 0); + } + ret = CXL_MBOX_SUCCESS; + +out: + return ret; +} + +/* + * Spec 3.0: 8.2.9.8.9.4 + * Release Dynamic Capacity (opcode 4803h) + **/ +static CXLRetCode cmd_dcd_release_dyn_cap(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len_unused) +{ + updated_dc_extent_list_in_pl *in = (void *)cmd->payload; + struct CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, + cxl_dstate); + CXLDCDExtentList *extent_list = &ct3d->dc.extents; + CXLDCD_Extent *ent; + uint32_t i; + uint64_t dpa, len; + CXLRetCode ret; + + if (in->num_entries_updated == 0) { + return CXL_MBOX_INVALID_INPUT; + } + + ret = detect_malformed_extent_list(ct3d, in); + if (ret != CXL_MBOX_SUCCESS) { + return ret; + } + + for (i = 0; i < in->num_entries_updated; i++) { + dpa = in->updated_entries[i].start_dpa; + len = in->updated_entries[i].len; + + QTAILQ_FOREACH(ent, extent_list, node) { + if (ent->start_dpa == dpa && ent->len == len) { + break; + } else if (ent->start_dpa < dpa + && dpa + len <= ent->start_dpa + ent->len) { + /* remove partial extent */ + uint64_t len1 = dpa - ent->start_dpa; + uint64_t len2 = ent->start_dpa + ent->len - dpa - len; + + if (len1) { + insert_extent_to_extent_list(extent_list, ent->start_dpa, + len1, NULL, 0); + } + if (len2) { + insert_extent_to_extent_list(extent_list, dpa + len, len2, + NULL, 0); + } + break; + } else if ((dpa < ent->start_dpa + ent->len + && dpa + len > ent->start_dpa + ent->len) + || (dpa < ent->start_dpa && dpa + len > ent->start_dpa)) + return CXL_MBOX_INVALID_EXTENT_LIST; + } + + if (ent) { + QTAILQ_REMOVE(extent_list, ent, node); + g_free(ent); + } else { + /* Try to remove a non-existing extent */ + return CXL_MBOX_INVALID_PA; + } + } + + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_DATA_CHANGE (1 << 2) #define IMMEDIATE_POLICY_CHANGE (1 << 3) @@ -1129,6 +1376,12 @@ static struct cxl_cmd cxl_cmd_set[256][256] = { [DCD_CONFIG][GET_DYN_CAP_EXT_LIST] = { "DCD_GET_DYNAMIC_CAPACITY_EXTENT_LIST", cmd_dcd_get_dyn_cap_ext_list, 8, 0 }, + [DCD_CONFIG][ADD_DYN_CAP_RSP] = { + "ADD_DCD_DYNAMIC_CAPACITY_RESPONSE", cmd_dcd_add_dyn_cap_rsp, + ~0, IMMEDIATE_DATA_CHANGE }, + [DCD_CONFIG][RELEASE_DYN_CAP] = { + "RELEASE_DCD_DYNAMIC_CAPACITY", cmd_dcd_release_dyn_cap, + ~0, IMMEDIATE_DATA_CHANGE }, }; static struct cxl_cmd cxl_cmd_set_sw[256][256] = { diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index a9cfe4e904..5bf1dd4024 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -130,7 +130,8 @@ typedef enum { CXL_MBOX_INCORRECT_PASSPHRASE = 0x14, CXL_MBOX_UNSUPPORTED_MAILBOX = 0x15, CXL_MBOX_INVALID_PAYLOAD_LENGTH = 0x16, - CXL_MBOX_MAX = 0x17 + CXL_MBOX_INVALID_EXTENT_LIST = 0x1E, /* cxl r3.0: Table 8-34*/ + CXL_MBOX_MAX = 0x1F } CXLRetCode; struct cxl_cmd; From patchwork Mon Jul 24 16:23:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324964 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 729D9C04A94 for ; Mon, 24 Jul 2023 16:23:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229771AbjGXQXd (ORCPT ); Mon, 24 Jul 2023 12:23:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230232AbjGXQXa (ORCPT ); Mon, 24 Jul 2023 12:23:30 -0400 Received: from mailout1.w2.samsung.com (mailout1.w2.samsung.com [211.189.100.11]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE7B71B8 for ; Mon, 24 Jul 2023 09:23:25 -0700 (PDT) Received: from uscas1p2.samsung.com (unknown [182.198.245.207]) by mailout1.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162325usoutp013ad86b8cd639e139b63fba3e5b716e4b~02lHQlxW12613826138usoutp01R; Mon, 24 Jul 2023 16:23:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w2.samsung.com 20230724162325usoutp013ad86b8cd639e139b63fba3e5b716e4b~02lHQlxW12613826138usoutp01R DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215805; bh=qdfqQW1bn/vhvlMZzfNI8DuF/HeSyUHBbOTbODKacy0=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=WKMsY7dGmEoiCrf4jlSMxBlWEzABotz5xV+OTumwEFPXsbW2K26/4EXSSn10C/+qr 2ZUzM6NZsLLi8f4ILyOg7crugTMAxtwObf1ny8QobynMDi7kHn3uoPOLNFtowqgYVt 3scNf5rYAtCpEeqOXd0nBWJ0IuGXjn8otzR9+L9E= Received: from ussmges1new.samsung.com (u109.gpu85.samsung.co.kr [203.254.195.109]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p239e624b31ea5e3239f836cb6acc57b1b~02lHFjh5S0635306353uscas1p2T; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) Received: from uscas1p1.samsung.com ( [182.198.245.206]) by ussmges1new.samsung.com (USCPEMTA) with SMTP id 50.15.51475.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from ussmgxs3new.samsung.com (u92.gpu85.samsung.co.kr [203.254.195.92]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p25916a52440d357dcec1675c8a62aa6fa~02lGuq8pB0599105991uscas1p2N; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) X-AuditID: cbfec36d-635ff7000001c913-9a-64bea57cf34c Received: from SSI-EX3.ssi.samsung.com ( [105.128.2.146]) by ussmgxs3new.samsung.com (USCPEXMTA) with SMTP id 33.D1.64580.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX3.ssi.samsung.com (105.128.2.228) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:23 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:23 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents Thread-Topic: [Qemu PATCH RESEND 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents Thread-Index: AQHZvksqg57PbbEm3UyZPz+aianBiA== Date: Mon, 24 Jul 2023 16:23:23 +0000 Message-ID: <20230724162313.34196-9-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJKsWRmVeSWpSXmKPExsWy7djXc7o1S/elGEzdaWTRfX4Do8X0qRcY LVbfXMNo0dD0iMWiZfd7Jov9T5+zWKxaeI3N4vysUywWzyc+Z7JYuuQRs8Xx3h0sDtweFyZP YPVY3ODqsXPWXXaPliNvgbw9L5k8Nn78z+7x5NpmJo/Nr18we0ydXe/xeZNcAFcUl01Kak5m WWqRvl0CV8a7r71MBX/cK1ZOb2RsYHxq2sXIwSEhYCLRccGri5GLQ0hgJaPEstk3WCCcViaJ 1ptL2LoYOcGKrv84zQ6RWMso8evhabCEkMAnRomHZzIgEssYJR7seMwMkmATUJTY17UdrEhE wFji2OElzCBFzAJvWSQ+rnnDApIQFsiROLR+IytEUaHExhuTmCBsPYnfsxaygdzHIqAqcXRR HEiYV8Bc4sjC+2CtnAIWEhsunQBrZRQQk/h+ag1YK7OAuMStJ/OZIK4WlFg0ew8zhC0m8W/X Q6hv5CUm/5gBZStK3P/+kh2iV0/ixtQpbBC2tsSyha+ZIfYKSpyc+YQFol5S4uAKSBBJCEzm lGh6A3GEhICLRMvVNihbWmL6mssskPBNllj1kQsinCMxf8kWqDnWEgv/rGeawKgyC8nZs5Cc MQvJGbOQnLGAkWUVo3hpcXFuemqxYV5quV5xYm5xaV66XnJ+7iZGYGo7/e9w7g7GHbc+6h1i ZOJgPMQowcGsJMJrGLMvRYg3JbGyKrUoP76oNCe1+BCjNAeLkjivoe3JZCGB9MSS1OzU1ILU IpgsEwenVAPTxj2ndaWCTu2UvZscvXhK2ydN0eRXFhY8GyxeVu2JkBc/YXjgy/NVR4I1BM++ 0bW7uuXPPn6phCUxJ+5sN6gpPMvM+3zO1f7U50YvnVafyFPe1FbIIvH6IEtw9j9e8YwVQXvl ApZlLfKUYRJJfellWiuqL8hzs/z919qA2Vv1UucFvjc6N3uybtLjI0471FQ7dtzYcnmC51/R qCvve9h/9L3Zw7soeuJ/nfa9X+e+OCC7UVv22bzOd0lekcUBDyZW2bUuf7FASUfm27Z401cn a+dq7vguHspwSU9R9GTJoYMOxy9v3P2Bqb9gsor5suXrH5be2meyYX/Aj4RPvTJ9i87vv9Sc /yY6129PouAWYyWW4oxEQy3mouJEAHFq1ZfcAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBIsWRmVeSWpSXmKPExsWS2cA0Sbdm6b4Ug/sNUhbd5zcwWkyfeoHR YvXNNYwWDU2PWCxadr9nstj/9DmLxaqF19gszs86xWLxfOJzJoulSx4xWxzv3cHiwO1xYfIE Vo/FDa4eO2fdZfdoOfIWyNvzkslj48f/7B5Prm1m8tj8+gWzx9TZ9R6fN8kFcEVx2aSk5mSW pRbp2yVwZbz72stU8Me9YuX0RsYGxqemXYycHBICJhLXf5xm72Lk4hASWM0o8eTXFRYI5xOj RPftucwQzjJGib5TW9hBWtgEFCX2dW1nA7FFBIwljh1ewgxiMwu8ZpH4dpEbxBYWyJE4tH4j K0RNocTxppXMELaexO9ZC4F6OThYBFQlji6KAwnzCphLHFl4nwXEFgKyz2zaD7aKU8BCYsOl E2BjGAXEJL6fWsMEsUpc4taT+UwQHwhILNlznhnCFpV4+fgfK4QtLzH5xww2CFtR4v73l+wQ vXoSN6ZOYYOwtSWWLXzNDHGDoMTJmU9YIOolJQ6uuMEygVFiFpJ1s5C0z0LSPgtJ+wJGllWM 4qXFxbnpFcXGeanlesWJucWleel6yfm5mxiBieH0v8MxOxjv3fqod4iRiYPxEKMEB7OSCK9h zL4UId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rwesRPjhQTSE0tSs1NTC1KLYLJMHJxSDUwXe2+k O+UzXf9sE8WgIc2oO+uxx6J3a213ut4Nsr/4cb9/i33EQ+W/Tsdv66breEzq4Nib2M5fcd/x X3XM9WcnNTbnW6xc1xNgIBSQVyIpadH6YJFm7K9T3KHLLVqPzXQtmvhXekd3ctI/b9alxmv3 Phd/ek7z2rtXDF7mkSs3dJ14feTjr0yZx7tOhLquvl00IW++qZr+5dTUSuEqTpUNL9pldm1f +Vbg/+PnSxoZ7NSmsB+eGXRL14KjWHNdRPt07qrVQpvci3+mzn3IN/+EEM+BQxbaKbcijqz7 rr99RdtsFV1bgYnLxRLNP5XG/PjRrB7IrbjrpOIUoePLJTNus1Q9r2cTecTybs6O3D4lluKM REMt5qLiRADBVgvPewMAAA== X-CMS-MailID: 20230724162324uscas1p25916a52440d357dcec1675c8a62aa6fa CMS-TYPE: 301P X-CMS-RootMailID: 20230724162324uscas1p25916a52440d357dcec1675c8a62aa6fa References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Since fabric manager emulation is not supported yet, the change implements the functions to add/release dynamic capacity extents as QMP interfaces. 1. Add dynamic capacity extents: For example, the command to add two continuous extents (each is 128MB long) to region 0 (starting at dpa offset 0 and 128MB) looks like below: { "execute": "qmp_capabilities" } { "execute": "cxl-add-dynamic-capacity-event", "arguments": { "path": "/machine/peripheral/cxl-dcd0", "extents": [ { "region-id": 0, "dpa": 0, "len": 128 }, { "region-id": 0, "dpa": 128, "len": 128 } ] } } 2. Release dynamic capacity extents: For example, the command to release an extent of size 128MB from region 0 (starting at dpa offset 128MB) look like below: { "execute": "cxl-release-dynamic-capacity-event", "arguments": { "path": "/machine/peripheral/cxl-dcd0", "extents": [ { "region-id": 0, "dpa": 128, "len": 128 } ] } } Signed-off-by: Fan Ni --- hw/mem/cxl_type3.c | 145 ++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3_stubs.c | 6 ++ include/hw/cxl/cxl_events.h | 16 ++++ qapi/cxl.json | 49 ++++++++++++ 4 files changed, 216 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 608063ac52..cb1f9182e6 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1811,6 +1811,151 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log, } } +static const QemuUUID dynamic_capacity_uuid = { + .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f, + 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a), +}; + +/* + * cxl r3.0: Table 8-47 + * 00h: add capacity + * 01h: release capacity + * 02h: forced capacity release + * 03h: region configuration updated + * 04h: Add capacity response + * 05h: capacity released + */ +enum DC_Event_Type { + DC_EVENT_ADD_CAPACITY, + DC_EVENT_RELEASE_CAPACITY, + DC_EVENT_FORCED_RELEASE_CAPACITY, + DC_EVENT_REGION_CONFIG_UPDATED, + DC_EVENT_ADD_CAPACITY_RSP, + DC_EVENT_CAPACITY_RELEASED, + DC_EVENT_NUM +}; + +#define MEM_BLK_SIZE_MB 128 +static void qmp_cxl_process_dynamic_capacity_event(const char *path, + CxlEventLog log, enum DC_Event_Type type, + uint16_t hid, CXLDCExtentRecordList *records, Error **errp) +{ + Object *obj = object_resolve_path(path, NULL); + CXLEventDynamicCapacity dCap; + CXLEventRecordHdr *hdr = &dCap.hdr; + CXLDeviceState *cxlds; + CXLType3Dev *dcd; + uint8_t flags = 1 << CXL_EVENT_TYPE_INFO; + uint32_t num_extents = 0; + CXLDCExtentRecordList *list = records; + CXLDCExtent_raw *extents; + uint64_t dpa, len; + uint8_t rid; + int i; + + if (!obj) { + error_setg(errp, "Unable to resolve path"); + return; + } + if (!object_dynamic_cast(obj, TYPE_CXL_TYPE3)) { + error_setg(errp, "Path not point to a valid CXL type3 device"); + return; + } + + dcd = CXL_TYPE3(obj); + cxlds = &dcd->cxl_dstate; + memset(&dCap, 0, sizeof(dCap)); + + if (!dcd->dc.num_regions) { + error_setg(errp, "No dynamic capacity support from the device"); + return; + } + + while (list) { + dpa = list->value->dpa * 1024 * 1024; + len = list->value->len * 1024 * 1024; + rid = list->value->region_id; + + if (rid >= dcd->dc.num_regions) { + error_setg(errp, "region id is too large"); + return; + } + + if (dpa % dcd->dc.regions[rid].block_size + || len % dcd->dc.regions[rid].block_size) { + error_setg(errp, "dpa or len is not aligned to region block size"); + return; + } + + if (dpa + len > dcd->dc.regions[rid].decode_len * 256 * 1024 * 1024) { + error_setg(errp, "extent range is beyond the region end"); + return; + } + + num_extents++; + list = list->next; + } + + i = 0; + list = records; + extents = g_new0(CXLDCExtent_raw, num_extents); + while (list) { + dpa = list->value->dpa * 1024 * 1024; + len = list->value->len * 1024 * 1024; + rid = list->value->region_id; + + extents[i].start_dpa = dpa + dcd->dc.regions[rid].base; + extents[i].len = len; + memset(extents[i].tag, 0, 0x10); + extents[i].shared_seq = 0; + + list = list->next; + i++; + } + + /* + * 8.2.9.1.5 + * All Dynamic Capacity event records shall set the Event Record + * Severity field in the Common Event Record Format to Informational + * Event. All Dynamic Capacity related events shall be logged in the + * Dynamic Capacity Event Log. + */ + cxl_assign_event_header(hdr, &dynamic_capacity_uuid, flags, sizeof(dCap), + cxl_device_get_timestamp(&dcd->cxl_dstate)); + + dCap.type = type; + stw_le_p(&dCap.host_id, hid); + /* only valid for DC_REGION_CONFIG_UPDATED event */ + dCap.updated_region_id = rid; + for (i = 0; i < num_extents; i++) { + memcpy(&dCap.dynamic_capacity_extent, &extents[i] + , sizeof(CXLDCExtent_raw)); + + if (cxl_event_insert(cxlds, CXL_EVENT_TYPE_DYNAMIC_CAP, + (CXLEventRecordRaw *)&dCap)) { + cxl_event_irq_assert(dcd); + } + } + + g_free(extents); +} + +void qmp_cxl_add_dynamic_capacity_event(const char *path, + struct CXLDCExtentRecordList *records, + Error **errp) +{ + qmp_cxl_process_dynamic_capacity_event(path, CXL_EVENT_LOG_INFORMATIONAL, + DC_EVENT_ADD_CAPACITY, 0, records, errp); +} + +void qmp_cxl_release_dynamic_capacity_event(const char *path, + struct CXLDCExtentRecordList *records, + Error **errp) +{ + qmp_cxl_process_dynamic_capacity_event(path, CXL_EVENT_LOG_INFORMATIONAL, + DC_EVENT_RELEASE_CAPACITY, 0, records, errp); +} + static void ct3_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c index f3e4a9fa72..482229f3bd 100644 --- a/hw/mem/cxl_type3_stubs.c +++ b/hw/mem/cxl_type3_stubs.c @@ -56,3 +56,9 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type, { error_setg(errp, "CXL Type 3 support is not compiled in"); } + +void qmp_cxl_add_dynamic_capacity_event(const char *path, + struct CXLDCExtentRecordList *records, Error **errp) {} + +void qmp_cxl_release_dynamic_capacity_event(const char *path, + struct CXLDCExtentRecordList *records, Error **errp) {} diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h index 089ba2091f..3baf745f8d 100644 --- a/include/hw/cxl/cxl_events.h +++ b/include/hw/cxl/cxl_events.h @@ -165,4 +165,20 @@ typedef struct CXLEventMemoryModule { uint8_t reserved[0x3d]; } QEMU_PACKED CXLEventMemoryModule; +/* + * Dynamic Capacity Event Record + * CXL Rev 3.0 Section 8.2.9.2.1.5: Table 8-47 + * All fields little endian. + */ +typedef struct CXLEventDynamicCapacity { + CXLEventRecordHdr hdr; + uint8_t type; + uint8_t reserved1; + uint16_t host_id; + uint8_t updated_region_id; + uint8_t reserved2[3]; + uint8_t dynamic_capacity_extent[0x28]; /* defined in cxl_device.h */ + uint8_t reserved[0x20]; +} QEMU_PACKED CXLEventDynamicCapacity; + #endif /* CXL_EVENTS_H */ diff --git a/qapi/cxl.json b/qapi/cxl.json index 05c560cfe5..fb04ec4c41 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -369,3 +369,52 @@ ## {'command': 'cxl-inject-correctable-error', 'data': {'path': 'str', 'type': 'CxlCorErrorType'}} + +## +# @CXLDCExtentRecord: +# +# Record of a single extent to add/release +# +# @region-id: id of the region where the extent to add/release +# @dpa: start dpa (in MiB) of the extent, related to region base address +# @len: extent size (in MiB) +# +# Since: 8.0 +## +{ 'struct': 'CXLDCExtentRecord', + 'data': { + 'region-id': 'uint8', + 'dpa':'uint64', + 'len': 'uint64' + } +} + +## +# @cxl-add-dynamic-capacity-event: +# +# Command to add dynamic capacity extent event +# +# @path: CXL DCD canonical QOM path +# @extents: Extents to add +# +## +{ 'command': 'cxl-add-dynamic-capacity-event', + 'data': { 'path': 'str', + 'extents': [ 'CXLDCExtentRecord' ] + } +} + +## +# @cxl-release-dynamic-capacity-event: +# +# Command to release dynamic capacity extent event +# +# @path: CXL DCD canonical QOM path +# @extents: Extents to release +# +## +{ 'command': 'cxl-release-dynamic-capacity-event', + 'data': { 'path': 'str', + 'extents': [ 'CXLDCExtentRecord' ] + } +} From patchwork Mon Jul 24 16:23:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fan Ni X-Patchwork-Id: 13324969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2244DC04FDF for ; Mon, 24 Jul 2023 16:23:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230162AbjGXQXh (ORCPT ); Mon, 24 Jul 2023 12:23:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230080AbjGXQXc (ORCPT ); Mon, 24 Jul 2023 12:23:32 -0400 Received: from mailout2.w2.samsung.com (mailout2.w2.samsung.com [211.189.100.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1DC319F for ; Mon, 24 Jul 2023 09:23:30 -0700 (PDT) Received: from uscas1p1.samsung.com (unknown [182.198.245.206]) by mailout2.w2.samsung.com (KnoxPortal) with ESMTP id 20230724162325usoutp02fa3a52a5ee42051a707743f9fb0765ed~02lHd4YT81330613306usoutp02x; Mon, 24 Jul 2023 16:23:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w2.samsung.com 20230724162325usoutp02fa3a52a5ee42051a707743f9fb0765ed~02lHd4YT81330613306usoutp02x DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1690215805; bh=bLMxAjBAZdbCpVqPKl5Hm275HdjbtWNyWIeKHx1+BWU=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=ZYCU8Vn46ccI68nhfY5EOn5HE2cXG+iiSj6PisDfFWMvIiHGBP1yCqAQUS39D7epV EhrcGm66kZ8UiUSLrhmYkeNdLNOTsMVYbVF/OU1iqP8Y0KsoH3BIO5zQ76omBpJV26 N+VjljFMPlrhzTO2NwK8pjFPP8C5FT/5ZfJ04rtQ= Received: from ussmges3new.samsung.com (u112.gpu85.samsung.co.kr [203.254.195.112]) by uscas1p2.samsung.com (KnoxPortal) with ESMTP id 20230724162325uscas1p29d37defd143779f4bfeeb2b1583a8b6e~02lHMR9eS0598705987uscas1p2R; Mon, 24 Jul 2023 16:23:25 +0000 (GMT) Received: from uscas1p2.samsung.com ( [182.198.245.207]) by ussmges3new.samsung.com (USCPEMTA) with SMTP id 35.A5.62237.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from ussmgxs3new.samsung.com (u92.gpu85.samsung.co.kr [203.254.195.92]) by uscas1p1.samsung.com (KnoxPortal) with ESMTP id 20230724162324uscas1p13cc0d1ad05aa272df2b118d7a2477d18~02lG6LC1R1471614716uscas1p1C; Mon, 24 Jul 2023 16:23:24 +0000 (GMT) X-AuditID: cbfec370-823ff7000001f31d-36-64bea57c0f0b Received: from SSI-EX2.ssi.samsung.com ( [105.128.2.145]) by ussmgxs3new.samsung.com (USCPEXMTA) with SMTP id 53.D1.64580.C75AEB46; Mon, 24 Jul 2023 12:23:24 -0400 (EDT) Received: from SSI-EX2.ssi.samsung.com (105.128.2.227) by SSI-EX2.ssi.samsung.com (105.128.2.227) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.1.2375.24; Mon, 24 Jul 2023 09:23:23 -0700 Received: from SSI-EX2.ssi.samsung.com ([105.128.2.227]) by SSI-EX2.ssi.samsung.com ([105.128.2.227]) with mapi id 15.01.2375.024; Mon, 24 Jul 2023 09:23:23 -0700 From: Fan Ni To: "qemu-devel@nongnu.org" CC: "jonathan.cameron@huawei.com" , "linux-cxl@vger.kernel.org" , "gregory.price@memverge.com" , "hchkuo@avery-design.com.tw" , "cbrowy@avery-design.com" , "ira.weiny@intel.com" , "dan.j.williams@intel.com" , Adam Manzanares , "dave@stgolabs.net" , "nmtadam.samsung@gmail.com" , "nifan@outlook.com" , Fan Ni Subject: [Qemu PATCH RESEND 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions Thread-Topic: [Qemu PATCH RESEND 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions Thread-Index: AQHZvksq06BUate0j0Ohda1LoX59zw== Date: Mon, 24 Jul 2023 16:23:23 +0000 Message-ID: <20230724162313.34196-10-fan.ni@samsung.com> In-Reply-To: <20230724162313.34196-1-fan.ni@samsung.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.25.1 x-originating-ip: [105.128.2.176] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBKsWRmVeSWpSXmKPExsWy7djX87o1S/elGDyda23RfX4Do8X0qRcY LVbfXMNo0dD0iMWiZfd7Jov9T5+zWKxaeI3N4vysUywWzyc+Z7JYuuQRs8Xx3h0sDtweFyZP YPVY3ODqsXPWXXaPliNvgbw9L5k8Nn78z+7x5NpmJo/Nr18we0ydXe/xeZNcAFcUl01Kak5m WWqRvl0CV8ap/YeZC87bVOzvbmVvYOzU6WLk5JAQMJHYtf8vYxcjF4eQwEpGidNf77JAOK1M Em9unWHqYuQAq1r31AQivpZRovvJIVaQbiGBT4wSa+9DNSxjlHiw4zEzSIJNQFFiX9d2NhBb RMBY4tjhJcwgRcwCb1kkPq55wwKSEBbIkPjZeJwRoihXYsOkZ1ANehIvb51jB9nMIqAqcXRR HEiYV8BCYsrpaWCLOYHsDZdOgNmMAmIS30+tYQKxmQXEJW49mc8E8ZqgxKLZe5ghbDGJf7se skHY8hKTf8yAshUl7n9/yQ7RqydxY+oUNghbW2LZwtfMEHsFJU7OfMICUS8pcXDFDbCHJQQm c0qsOniKBRJCLhLvVlZB1EhLTF9zGSqcLLHqIxdEOEdi/pItUGOsJRb+Wc80gVFlFpKrZyG5 YhaSK2YhuWIBI8sqRvHS4uLc9NRi47zUcr3ixNzi0rx0veT83E2MwMR2+t/hgh2Mt2591DvE yMTBeIhRgoNZSYTXMGZfihBvSmJlVWpRfnxRaU5q8SFGaQ4WJXFeQ9uTyUIC6YklqdmpqQWp RTBZJg5OqQamZdHHnaQz5idsU5p2bUrjhpbQpfIveY8/PNlqsc9poo0Ua93khzNnROi+fX/r E8NX/u9mt3fZf+pftSE0/9B0bW7OFSsSd5+aMnOXe0+Ryfv4+2v/RMiv36QZbSm7uovnCu/1 bvudx4zEdwn1WntlnJXeePXDyR0vs08lfwnvP7Yxwo/73DOPP046n4P9DVMFJ3xWDNnaMlfl m8T9zY7B+3MMJ/w5JL3V3LRI+3gNd8Wy5nZj7rMMWZtSJsyz/+e24f+FksVXkrNLc1V/fyqa 5SE19ZGUe3PPh8dWyWVzQ3OmSy6JWiTFWfs4ov8B7zWewB0NbWZJNsv3dXRKn6t4s+Dj6Znv lTzqO76bRc1+p8RSnJFoqMVcVJwIAATEorDbAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGIsWRmVeSWpSXmKPExsWS2cA0Ubdm6b4Ug6NdKhbd5zcwWkyfeoHR YvXNNYwWDU2PWCxadr9nstj/9DmLxaqF19gszs86xWLxfOJzJoulSx4xWxzv3cHiwO1xYfIE Vo/FDa4eO2fdZfdoOfIWyNvzkslj48f/7B5Prm1m8tj8+gWzx9TZ9R6fN8kFcEVx2aSk5mSW pRbp2yVwZZzaf5i54LxNxf7uVvYGxk6dLkYODgkBE4l1T026GLk4hARWM0rsaP/DBuF8YpSY u3gfM4SzjFGi79QW9i5GTg42AUWJfV3b2UBsEQFjiWOHlzCD2MwCr1kkvl3kBrGFBTIkfjYe ZwTZICKQKzF1pQ5EuZ7Ey1vn2EHCLAKqEkcXxYGEeQUsJKacnsYKYgsJmEuc2bQfbBMnUHzD pRNgcUYBMYnvp9YwQWwSl7j1ZD6YLSEgILFkz3lmCFtU4uXjf6wQtrzE5B8z2CBsRYn731+y Q/TqSdyYOoUNwtaWWLbwNTPEDYISJ2c+YYGol5Q4uOIGywRGiVlI1s1C0j4LSfssJO0LGFlW MYqXFhfnplcUG+ellusVJ+YWl+al6yXn525iBCaF0/8Ox+xgvHfro94hRiYOxkOMEhzMSiK8 hjH7UoR4UxIrq1KL8uOLSnNSiw8xSnOwKInzesROjBcSSE8sSc1OTS1ILYLJMnFwSjUwXbRp KXNZumcKv0VkYw+bIks9w7w1E/s3dU04+3AXd8brR7NyOmVfSrlff+C54J+q2eeHK7rzXzmV n1p6OVgpuTDq8fblWw74pft6nfMJzOspXrxX20TcPMHk84bfVqs5Gxc4Mm2LvvuBTaHnZtGG 2zul/OfPsZHL6Hrm38v6L6v+XZFkhpi67zO1FH3GlFyu/wvudbDYzHa/VXPA022f6/15aia3 3HeUdkf3i/9TO3bkpJHTq9x4m9V909bOUt5ewHxnL5vd7Y2ZW3u3rom0LS+6Lrm+Y/LNRY2v QiarTFxnsrp82cEVmi89u7Omfom4sP+3qeeE7x8nNX9uXvN7s7t1YPfsJSv3ZP5sXWuVoMRS nJFoqMVcVJwIAA2d1E55AwAA X-CMS-MailID: 20230724162324uscas1p13cc0d1ad05aa272df2b118d7a2477d18 CMS-TYPE: 301P X-CMS-RootMailID: 20230724162324uscas1p13cc0d1ad05aa272df2b118d7a2477d18 References: <20230724162313.34196-1-fan.ni@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Fan Ni Not all dpa range in the dc regions is valid to access until an extent covering the range has been added. Add a bitmap for each region to record whether a dc block in the region has been backed by dc extent. For the bitmap, a bit in the bitmap represents a dc block. When a dc extent is added, all the bits of the blocks in the extent will be set, which will be cleared when the extent is released. Signed-off-by: Fan Ni --- hw/mem/cxl_type3.c | 155 ++++++++++++++++++++++++++++++++++++ include/hw/cxl/cxl_device.h | 1 + 2 files changed, 156 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index cb1f9182e6..e673287804 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -787,13 +787,37 @@ static int cxl_create_dc_regions(CXLType3Dev *ct3d) /* dsmad_handle is set when creating cdat table entries */ region->flags = 0; + region->blk_bitmap = bitmap_new(region->len / region->block_size); + if (!region->blk_bitmap) { + break; + } + region_base += region->len; } + + if (i < ct3d->dc.num_regions) { + while (--i >= 0) { + g_free(ct3d->dc.regions[i].blk_bitmap); + } + return -1; + } + QTAILQ_INIT(&ct3d->dc.extents); return 0; } +static void cxl_destroy_dc_regions(CXLType3Dev *ct3d) +{ + int i; + struct CXLDCD_Region *region; + + for (i = 0; i < ct3d->dc.num_regions; i++) { + region = &ct3d->dc.regions[i]; + g_free(region->blk_bitmap); + } +} + static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp) { DeviceState *ds = DEVICE(ct3d); @@ -1021,6 +1045,7 @@ err_free_special_ops: g_free(regs->special_ops); err_address_space_free: if (ct3d->dc.host_dc) { + cxl_destroy_dc_regions(ct3d); address_space_destroy(&ct3d->dc.host_dc_as); } if (ct3d->hostpmem) { @@ -1043,6 +1068,7 @@ static void ct3_exit(PCIDevice *pci_dev) spdm_sock_fini(ct3d->doe_spdm.socket); g_free(regs->special_ops); if (ct3d->dc.host_dc) { + cxl_destroy_dc_regions(ct3d); address_space_destroy(&ct3d->dc.host_dc_as); } if (ct3d->hostpmem) { @@ -1053,6 +1079,110 @@ static void ct3_exit(PCIDevice *pci_dev) } } +/* + * This function will marked the dpa range [dpa, dap + len) to be backed and + * accessible, this happens when a dc extent is added and accepted by the + * host. + */ +static void set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa, + uint64_t len) +{ + int i; + CXLDCD_Region *region = &ct3d->dc.regions[0]; + + if (dpa < region->base + || dpa >= region->base + ct3d->dc.total_capacity) + return; + + /* + * spec 3.0 9.13.3: Regions are used in increasing-DPA order, with + * Region 0 being used for the lowest DPA of Dynamic Capacity and + * Region 7 for the highest DPA. + * So we check from the last region to find where the dpa belongs. + * access across multiple regions is not allowed. + **/ + for (i = ct3d->dc.num_regions - 1; i >= 0; i--) { + region = &ct3d->dc.regions[i]; + if (dpa >= region->base) { + break; + } + } + + bitmap_set(region->blk_bitmap, (dpa - region->base) / region->block_size, + len / region->block_size); +} + +/* + * This function check whether a dpa range [dpa, dpa + len) has been backed + * with dc extents, used when validating read/write to dc regions + */ +static bool test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa, + uint64_t len) +{ + int i; + CXLDCD_Region *region = &ct3d->dc.regions[0]; + uint64_t nbits; + long nr; + + if (dpa < region->base + || dpa >= region->base + ct3d->dc.total_capacity) + return false; + + /* + * spec 3.0 9.13.3: Regions are used in increasing-DPA order, with + * Region 0 being used for the lowest DPA of Dynamic Capacity and + * Region 7 for the highest DPA. + * So we check from the last region to find where the dpa belongs. + * access across multiple regions is not allowed. + */ + for (i = ct3d->dc.num_regions - 1; i >= 0; i--) { + region = &ct3d->dc.regions[i]; + if (dpa >= region->base) { + break; + } + } + + nr = (dpa - region->base) / region->block_size; + nbits = len / region->block_size; + return find_next_zero_bit(region->blk_bitmap, nbits, nr) >= nr + nbits; +} + +/* + * This function will marked the dpa range [dpa, dap + len) to be unbacked and + * inaccessible, this happens when a dc extent is added and accepted by the + * host. + */ +static void clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa, + uint64_t len) +{ + int i; + CXLDCD_Region *region = &ct3d->dc.regions[0]; + uint64_t nbits; + long nr; + + if (dpa < region->base + || dpa >= region->base + ct3d->dc.total_capacity) + return; + + /* + * spec 3.0 9.13.3: Regions are used in increasing-DPA order, with + * Region 0 being used for the lowest DPA of Dynamic Capacity and + * Region 7 for the highest DPA. + * So we check from the last region to find where the dpa belongs. + * access across multiple regions is not allowed. + */ + for (i = ct3d->dc.num_regions - 1; i >= 0; i--) { + region = &ct3d->dc.regions[i]; + if (dpa >= region->base) { + break; + } + } + + nr = (dpa - region->base) / region->block_size; + nbits = len / region->block_size; + bitmap_clear(region->blk_bitmap, nr, nbits); +} + static bool cxl_type3_dpa(CXLType3Dev *ct3d, hwaddr host_addr, uint64_t *dpa) { uint32_t *cache_mem = ct3d->cxl_cstate.crb.cache_mem_registers; @@ -1145,6 +1275,10 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d, *as = &ct3d->hostpmem_as; *dpa_offset -= vmr_size; } else { + if (!test_region_block_backed(ct3d, *dpa_offset, size)) { + return -ENODEV; + } + *as = &ct3d->dc.host_dc_as; *dpa_offset -= (vmr_size + pmr_size); } @@ -1938,6 +2072,27 @@ static void qmp_cxl_process_dynamic_capacity_event(const char *path, } g_free(extents); + + /* Another choice is to do the set/clear after getting mailbox response*/ + list = records; + while (list) { + dpa = list->value->dpa * 1024 * 1024; + len = list->value->len * 1024 * 1024; + rid = list->value->region_id; + + switch (type) { + case DC_EVENT_ADD_CAPACITY: + set_region_block_backed(dcd, dpa, len); + break; + case DC_EVENT_RELEASE_CAPACITY: + clear_region_block_backed(dcd, dpa, len); + break; + default: + error_setg(errp, "DC event type not handled yet"); + break; + } + list = list->next; + } } void qmp_cxl_add_dynamic_capacity_event(const char *path, diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h index 5bf1dd4024..40ae96d824 100644 --- a/include/hw/cxl/cxl_device.h +++ b/include/hw/cxl/cxl_device.h @@ -411,6 +411,7 @@ typedef struct CXLDCD_Region { uint64_t block_size; uint32_t dsmadhandle; uint8_t flags; + unsigned long *blk_bitmap; } CXLDCD_Region; struct CXLType3Dev {