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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:30 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 1/6] RISC-V: KVM: return ENOENT in *_one_reg() when reg is unknown Date: Mon, 31 Jul 2023 09:04:15 -0300 Message-ID: <20230731120420.91007-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org get_one_reg() and set_one_reg() are returning EINVAL errors for almost everything: if a reg doesn't exist, if a reg ID is malformatted, if the associated CPU extension that implements the reg isn't present in the host, and for set_one_reg() if the value being written is invalid. This isn't wrong according to the existing KVM API docs (EINVAL can be used when there's no such register) but adding more ENOENT instances will make easier for userspace to understand what went wrong. Existing userspaces can be affected by this error code change. We checked a few. As of current upstream code, crosvm doesn't check for any particular errno code when using kvm_(get|set)_one_reg(). Neither does QEMU. rust-vmm doesn't have kvm-riscv support yet. Thus we have a good chance of changing these error codes now while the KVM RISC-V ecosystem is still new, minimizing user impact. Change all get_one_reg() and set_one_reg() implementations to return -ENOENT at all "no such register" cases. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/aia.c | 4 ++-- arch/riscv/kvm/vcpu_fp.c | 12 ++++++------ arch/riscv/kvm/vcpu_onereg.c | 30 +++++++++++++++--------------- arch/riscv/kvm/vcpu_sbi.c | 16 +++++++++------- arch/riscv/kvm/vcpu_timer.c | 8 ++++---- 5 files changed, 36 insertions(+), 34 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 585a3b42c52c..74bb27440527 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -176,7 +176,7 @@ int kvm_riscv_vcpu_aia_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; *out_val = 0; if (kvm_riscv_aia_available()) @@ -192,7 +192,7 @@ int kvm_riscv_vcpu_aia_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (kvm_riscv_aia_available()) { ((unsigned long *)csr)[reg_num] = val; diff --git a/arch/riscv/kvm/vcpu_fp.c b/arch/riscv/kvm/vcpu_fp.c index 9d8cbc42057a..08ba48a395aa 100644 --- a/arch/riscv/kvm/vcpu_fp.c +++ b/arch/riscv/kvm/vcpu_fp.c @@ -96,7 +96,7 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -109,9 +109,9 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -141,7 +141,7 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -154,9 +154,9 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_from_user(reg_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 0dc2c2cecb45..ba63522be060 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -153,7 +153,7 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, reg_val = vcpu->arch.mimpid; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -235,7 +235,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, return -EBUSY; break; default: - return -EINVAL; + return -ENOENT; } return 0; @@ -255,7 +255,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc)) reg_val = cntx->sepc; @@ -266,7 +266,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, reg_val = (cntx->sstatus & SR_SPP) ? KVM_RISCV_MODE_S : KVM_RISCV_MODE_U; else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -288,7 +288,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -304,7 +304,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, else cntx->sstatus &= ~SR_SPP; } else - return -EINVAL; + return -ENOENT; return 0; } @@ -316,7 +316,7 @@ static int kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { kvm_riscv_vcpu_flush_interrupts(vcpu); @@ -335,7 +335,7 @@ static int kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { reg_val &= VSIP_VALID_MASK; @@ -374,7 +374,7 @@ static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, ®_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -413,7 +413,7 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -430,7 +430,7 @@ static int riscv_vcpu_get_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; *reg_val = 0; host_isa_ext = kvm_isa_ext_arr[reg_num]; @@ -448,7 +448,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) @@ -547,7 +547,7 @@ static int kvm_riscv_vcpu_get_reg_isa_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; @@ -585,7 +585,7 @@ static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -652,5 +652,5 @@ int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, break; } - return -EINVAL; + return -ENOENT; } diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 7b46e04fb667..9cd97091c723 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -140,8 +140,10 @@ static int riscv_vcpu_set_sbi_ext_single(struct kvm_vcpu *vcpu, const struct kvm_riscv_sbi_extension_entry *sext = NULL; struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; - if (reg_num >= KVM_RISCV_SBI_EXT_MAX || - (reg_val != 1 && reg_val != 0)) + if (reg_num >= KVM_RISCV_SBI_EXT_MAX) + return -ENOENT; + + if (reg_val != 1 && reg_val != 0) return -EINVAL; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { @@ -175,7 +177,7 @@ static int riscv_vcpu_get_sbi_ext_single(struct kvm_vcpu *vcpu, struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; if (reg_num >= KVM_RISCV_SBI_EXT_MAX) - return -EINVAL; + return -ENOENT; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { if (sbi_ext[i].ext_idx == reg_num) { @@ -206,7 +208,7 @@ static int riscv_vcpu_set_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for_each_set_bit(i, ®_val, BITS_PER_LONG) { ext_id = i + reg_num * BITS_PER_LONG; @@ -226,7 +228,7 @@ static int riscv_vcpu_get_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id, ext_val; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for (i = 0; i < BITS_PER_LONG; i++) { ext_id = i + reg_num * BITS_PER_LONG; @@ -272,7 +274,7 @@ int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_sbi_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -307,7 +309,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 3ac2ff6a65da..527d269cafff 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -170,7 +170,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): @@ -187,7 +187,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, KVM_RISCV_TIMER_STATE_OFF; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -211,7 +211,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -233,7 +233,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, ret = kvm_riscv_vcpu_timer_cancel(t); break; default: - ret = -EINVAL; + ret = -ENOENT; break; } From patchwork Mon Jul 31 12:04:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13334484 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8AB8C001DC for ; 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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:33 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 2/6] RISC-V: KVM: use ENOENT in *_one_reg() when extension is unavailable Date: Mon, 31 Jul 2023 09:04:16 -0300 Message-ID: <20230731120420.91007-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Following a similar logic as the previous patch let's minimize the EINVAL usage in *_one_reg() APIs by using ENOENT when an extension that implements the reg is not available. For consistency we're also replacing an EOPNOTSUPP instance that should be an ENOENT since it's an "extension is not available" error. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index ba63522be060..e630a68e4f27 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -135,12 +135,12 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cbom_block_size; break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cboz_block_size; break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): @@ -452,7 +452,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) - return -EOPNOTSUPP; + return -ENOENT; if (!vcpu->arch.ran_atleast_once) { /* From patchwork Mon Jul 31 12:04:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13334485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99BDDC001DF for ; Mon, 31 Jul 2023 12:04:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232204AbjGaMEj (ORCPT ); Mon, 31 Jul 2023 08:04:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232226AbjGaMEh (ORCPT ); Mon, 31 Jul 2023 08:04:37 -0400 Received: from mail-oi1-x230.google.com (mail-oi1-x230.google.com [IPv6:2607:f8b0:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE3E510D5 for ; Mon, 31 Jul 2023 05:04:36 -0700 (PDT) Received: by mail-oi1-x230.google.com with SMTP id 5614622812f47-3a44cccbd96so3006458b6e.3 for ; Mon, 31 Jul 2023 05:04:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1690805076; x=1691409876; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AIucR+Sjo1L1b52bma92ee9wHRVqNY7UNJqfHapIUO8=; b=eAAVNloP9p+8BWzpb+GCeyEqZre3HkYr+w7Wldlxy8JC2pOPcvfcfsAReK8/lp6+FO 2GHUqukJ3POTBxEAHlsd+40caRTdkCqpoKxXXvGPFgNt0Qq/W962EwqFg/UTTfa9yd6t GpfwfNZLqBcP1X3Ctz0tMIcl0snYkAZ9vBimx8uInovpB3LaeWt42mLJ9KvX2nsHhfhA F9eyHTfo0s42IS3A4DjvWh7p3ziFGMXGk8zh9fqVKc+iuiZvaKVMu8ogFhYPV5loLwus SAsIgIrYHwElnvhV9X4XrbaOGZ7PVC0cPdxBzlnEKRSu5qXuMGGKl2HK7iV82mkGb8od Zh0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690805076; x=1691409876; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AIucR+Sjo1L1b52bma92ee9wHRVqNY7UNJqfHapIUO8=; b=HN3wH88UnO9RUjpDet/HkXVCuIlWdvfhqbswZcmfVkB2pGP6MdJqUyrmu6aI3BL3Mv V+86oHuUMCLfJvUQA8DRLczcujb42TIkfgrLig6W3o9FO6s4mlpud7+/rUUY5/l9T4jS h+OJBhAw0fqtNTIEgkb4Dlpo9AFOE3fPyxP3sDZKQMDKFfCagbbG8Skyyb+u0e09eI6q +yzEsZVueW6IT8s3t4p3xO+bxxHe3SloaRln0d61LjMj4NzVfOntvc7NRVbizZKW8Yea 9u8zNzWbmzmptLsh4gCb9oSsZ0k2kU+U31c5bgl/DfGzU7Jvq2Djf4ZIYUbFc7s1vJop EVyg== X-Gm-Message-State: ABy/qLbpdoqSfoQDp1a56I8WCSuVWw8pUKpEGCldgPWVF1EtakhkCtB4 huHbkSymA/tXCHSYSr0h9hGSzw== X-Google-Smtp-Source: APBJJlFF1X9useGPToJKkpTy0AkH3xIA5EFERBBIFwAku2kDhpMk0eZE6+trW1uN+35617iGK2V/hw== X-Received: by 2002:a05:6808:1689:b0:3a4:633:44d2 with SMTP id bb9-20020a056808168900b003a4063344d2mr11844680oib.18.1690805076179; Mon, 31 Jul 2023 05:04:36 -0700 (PDT) Received: from grind.. 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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:35 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 3/6] RISC-V: KVM: do not EOPNOTSUPP in set_one_reg() zicbo(m|z) Date: Mon, 31 Jul 2023 09:04:17 -0300 Message-ID: <20230731120420.91007-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org zicbom_block_size and zicboz_block_size have a peculiar API: they can be read via get_one_reg() but any write will return a EOPNOTSUPP. It makes sense to return a 'not supported' error since both values can't be changed, but as far as userspace goes they're regs that are throwing the same EOPNOTSUPP error even if they were read beforehand via get_one_reg(), even if the same read value is being written back. EOPNOTSUPP is also returned even if ZICBOM/ZICBOZ aren't enabled in the host. Change both to work more like their counterparts in get_one_reg() and return -ENOENT if their respective extensions aren't available. After that, check if the userspace is written a valid value (i.e. the host value). Throw an -EINVAL if that's not case, let it slide otherwise. This allows both regs to be read/written by userspace in a 'lazy' manner, as long as the userspace doesn't change the reg vals. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index e630a68e4f27..42bf01ab6a8f 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -213,9 +213,17 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) + return -ENOENT; + if (reg_val != riscv_cbom_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) + return -ENOENT; + if (reg_val != riscv_cboz_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): if (!vcpu->arch.ran_atleast_once) vcpu->arch.mvendorid = reg_val; From patchwork Mon Jul 31 12:04:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13334486 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEFBFC001DF for ; Mon, 31 Jul 2023 12:04:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232249AbjGaMEm (ORCPT ); Mon, 31 Jul 2023 08:04:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232244AbjGaMEk (ORCPT ); Mon, 31 Jul 2023 08:04:40 -0400 Received: from mail-oi1-x232.google.com (mail-oi1-x232.google.com [IPv6:2607:f8b0:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D37510DF for ; Mon, 31 Jul 2023 05:04:39 -0700 (PDT) Received: by mail-oi1-x232.google.com with SMTP id 5614622812f47-3a44cccbd96so3006491b6e.3 for ; Mon, 31 Jul 2023 05:04:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1690805079; x=1691409879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=g4gInOMTxn59VtKRdWRuCB+Fh+tnWH+7LdkxQpWmTylm7nz17XQSSKvmEY5WRaWl8H I4GSHiXpC4fy3IBYqPSf43xr0NNUoYm6s47jI5hBYpTCzHQb7WZofiBBo/ehpMOPtRaX gw8JqpC5PAy35MOXYZsXG7Mqh0Mc/y1rKu0X1779bCw86L57Oxw+mmL+UhYRavs0CPW6 nqTGsDt5gPWj/l31RS0Hauweum49LharASB0dmKGX9xp578CTTnzw5gogNOQfQHxsO8L /xNDfaUpLKdVvKFkAjZLKcHdTnytpg+iCCq6wy2nlVVaFDBoDP4h+X65gXmukM39k5wW 1zog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690805079; x=1691409879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=GbtZ0XuobscBTQ1p5ea+ZrsPQc6uRJIMyUGk3pIbscBVKGG0SclZnOrXEkhBZiooLJ xNyPCCEmRM8fu6eXf77zTr3z5kmKeISkBdS7GejZb+o0Yx/PAuaAkfWkAJjKiAqhVbNz sfFNjr7TZLhg738jw56ca5/WY6Je1UYrwn5F/0uCg8F+3rRyRZy1mlp2Cg8349dosjEz doN7ErOt0Bw3lxnO+/EzKKfzbD/yA4bcDpyTS/tpwd6FcZ+ejG9eWQQ0jFurwojdfonx 2UZyv/ge7qu+13EQ1VVrmnKqalrjf6CKoxchA7u0Hi1UIv+tn5UOZMMclBMI9QPNrynU mNZw== X-Gm-Message-State: ABy/qLb3bY3Hnbr9tRt1XIuEPgypemTtaShGXmAXWoCxEoRyO7PVUygT 3Ghk3nr0smPnjS1pXhoTNJZqzQ== X-Google-Smtp-Source: APBJJlEQkjl0l6suCrkTFYT7TTJL9N41YjLsPcoLRfAZ7n+fD7jS7ThVU6PP2ELRqXqEQrDWGzNkdA== X-Received: by 2002:a05:6808:428c:b0:3a3:6364:2b73 with SMTP id dq12-20020a056808428c00b003a363642b73mr9202732oib.52.1690805078937; Mon, 31 Jul 2023 05:04:38 -0700 (PDT) Received: from grind.. (201-69-66-110.dial-up.telesp.net.br. [201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:38 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 4/6] RISC-V: KVM: do not EOPNOTSUPP in set KVM_REG_RISCV_TIMER_REG Date: Mon, 31 Jul 2023 09:04:18 -0300 Message-ID: <20230731120420.91007-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The KVM_REG_RISCV_TIMER_REG can be read via get_one_reg(). But trying to write anything in this reg via set_one_reg() results in an EOPNOTSUPP. Change the API to behave like cbom_block_size: instead of always erroring out with EOPNOTSUPP, allow userspace to write the same value (riscv_timebase) back, throwing an EINVAL if a different value is attempted. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 527d269cafff..75486b25ac45 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -218,7 +218,8 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): - ret = -EOPNOTSUPP; + if (reg_val != riscv_timebase) + return -EINVAL; break; case KVM_REG_RISCV_TIMER_REG(time): gt->time_delta = reg_val - get_cycles64(); From patchwork Mon Jul 31 12:04:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13334487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E2A7C04FDF for ; Mon, 31 Jul 2023 12:04:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232244AbjGaMEp (ORCPT ); Mon, 31 Jul 2023 08:04:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232258AbjGaMEn (ORCPT ); Mon, 31 Jul 2023 08:04:43 -0400 Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51F3F10EA for ; Mon, 31 Jul 2023 05:04:42 -0700 (PDT) Received: by mail-oi1-x231.google.com with SMTP id 5614622812f47-3a7293bb9daso696766b6e.1 for ; Mon, 31 Jul 2023 05:04:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1690805081; x=1691409881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K/G0IwVJLR2t3toGYLVhTTy1luMUvUk5+J3HPr91WKI=; b=jdB0bZjCbnhEc6O9ewJ5xaBpeZCo5G3llR4i2db5ONdCF93K0gd/AL53RIoiLOkmnk eGo1BDBUXqQZ8ZMNU03TfIHGxQROjYL6umpAANjBWPCQmH42hrMu8G3wv1kyWpmsqNHj lFxfP8tJX/zCoiGO9odyKjQgNxl76izXDyROtT2yMwQYo8GlNo8ylOM0+OnLjBmZ7tt7 g2+3DhXDbpa+7XFzE+Z/cV9l9wG/Wu9wFkqQD6blPvYpPNVseMlLE7GoTYWbfp02gjgk OXZlx+VesQ3/d+O+9GtGgO0mjb6fccvt2mVVSCHh6D0eBQiCN79dvOPKDB6tYlSSQKLf 8e5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690805081; x=1691409881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K/G0IwVJLR2t3toGYLVhTTy1luMUvUk5+J3HPr91WKI=; b=OxD3JNbGuIUPAd38ACkBtYxEoVtdMKayxocJm8gFl48d5gQ+eHbuuZBm/MUWscvB5h NZU9NBFCQMNdnQtAo1a8j7Hq75PgV5zt1yrGHQAB0K0e6Z/GIYZCENUV+h4eky2SSGMX NpXOWoPbG37hnzgNW4GqOm6j7c0u7ZERBDGDzwTnntDqQySzfKQh3RvHMXczPDwN7WtE P5sdawApHqKlQMqWOxdmi+4n9E/8xZjHaLAfPNOWqJuZvPKBseeESxVK8CuOXgbxukZK vSJTB32Pg+1gj5TKahkZsI75EyNsOwYm/+bNjd9fdbkzJUpgkVkP9SVEOZPHYPwGwyZy d8Lg== X-Gm-Message-State: ABy/qLbZVakJLuQkS97cxnqzpjXKx4erykaUKTHv966v8TmLFjYj2Nxo S3yWDJDRVHdTVPn5pUgwluITVQ== X-Google-Smtp-Source: APBJJlHIHCqrSrjtB30WJ6r7S8ELH+xlN95Tp7EtN4g6xbD+5HemVufzJTifbbVdLravlyptBlBv9w== X-Received: by 2002:a05:6808:20a5:b0:3a7:37ae:4a47 with SMTP id s37-20020a05680820a500b003a737ae4a47mr2710551oiw.12.1690805081564; Mon, 31 Jul 2023 05:04:41 -0700 (PDT) Received: from grind.. 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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:41 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 5/6] RISC-V: KVM: use EBUSY when !vcpu->arch.ran_atleast_once Date: Mon, 31 Jul 2023 09:04:19 -0300 Message-ID: <20230731120420.91007-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org vcpu_set_reg_config() and vcpu_set_reg_isa_ext() is throwing an EOPNOTSUPP error when !vcpu->arch.ran_atleast_once. In similar cases we're throwing an EBUSY error, like in mvendorid/marchid/mimpid set_reg(). EOPNOTSUPP has a conotation of finality. EBUSY is more adequate in this case since its a condition/error related to the vcpu lifecycle. Change these EOPNOTSUPP instances to EBUSY. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 42bf01ab6a8f..07ce747620f9 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -209,7 +209,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, vcpu->arch.isa[0] = reg_val; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): @@ -477,7 +477,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, return -EINVAL; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } return 0; From patchwork Mon Jul 31 12:04:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13334488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EBDDC001DC for ; Mon, 31 Jul 2023 12:04:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232403AbjGaMEy (ORCPT ); Mon, 31 Jul 2023 08:04:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232308AbjGaMEp (ORCPT ); Mon, 31 Jul 2023 08:04:45 -0400 Received: from mail-oi1-x233.google.com (mail-oi1-x233.google.com [IPv6:2607:f8b0:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1C5910EA for ; Mon, 31 Jul 2023 05:04:44 -0700 (PDT) Received: by mail-oi1-x233.google.com with SMTP id 5614622812f47-3a7293bb9daso696795b6e.1 for ; Mon, 31 Jul 2023 05:04:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1690805084; x=1691409884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5g6ezAcbcDbpiKHj+AEdPKnGvpfWwAjfnv3+ZuFJ5r4=; b=gbBcnmgdij70CZuNsemzv6OiZ62y/nqSLVfJuBjt56UG8eTsfqEcQ5H0O9hvulUTuo TsBmBA4snnIblsOueHwJ7KEk7XORWZrMUGtCktF0b+7KUcf51BqSn4m8k9vNb6mh7Z3X EA1rhX1hmSNpoylzN1u1mEmHfCxw4s1XQ9Us3ezPorKU6ypgsv3NRQm2GABUBULG1U+S skX4nx28Jzb2VXpL/Ct1+0cRdC6Y7uTW1Jxcpt3V4Bk2AK8CMUFj28tlg0nThapDHaJm TD7kANuoyXYCm2XPQczXHTiGigNBNZI9OX7IXipnIKjJwuixKYEQFV6VjoFdq6GEvKdL PAXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690805084; x=1691409884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5g6ezAcbcDbpiKHj+AEdPKnGvpfWwAjfnv3+ZuFJ5r4=; b=gx4KyTD9QCXMyO2k6c/g0LeHuekYlanESxjonCpq3WG8jN5vDoS54rI8Zv61jSiYX4 ABsnLCuxb/BZjj79tImzVjnjXYCStUFI0CjlnVyRGMdguQb0owVdQnl4By9c4UP5PAyU otsJ0RP9YOVaO5ukS6q70dZbhmSFeheWdM9opaunu8ySZOkmM4xYf5KdanRmTJWUpiBo Bu3TNlmlhFl3OYbOcWvvjh3JNnwXX3MhJKmA38M+Boz5sYKPwTP5CleGd93l9eqEoKsu grM/3Q5HLPZR3cvgePuk7qleM8/PnN6GPj7OufHp0b1XlHnpBVrP8oTGFANIuSDhQGJx p9gA== X-Gm-Message-State: ABy/qLZmKVzI4SG/b7waTiKPRSPdnNKcTLdPmLWb/JHHlFNRoJZII6Dx OeCbm6jKgArGpPIoTb5P2fNlrg== X-Google-Smtp-Source: APBJJlEK140Sqf3PZqEO+ojsGo00HTDQQSk+USiO73L/HrwOAD+v54PVGva7arYeyJ8WWOtMWFVgxQ== X-Received: by 2002:a54:4714:0:b0:3a7:4f8:eb76 with SMTP id k20-20020a544714000000b003a704f8eb76mr7414240oik.24.1690805084090; Mon, 31 Jul 2023 05:04:44 -0700 (PDT) Received: from grind.. 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[201.69.66.110]) by smtp.gmail.com with ESMTPSA id a12-20020aca1a0c000000b003a41484b23dsm3959316oia.46.2023.07.31.05.04.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jul 2023 05:04:43 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 6/6] docs: kvm: riscv: document EBUSY in KVM_SET_ONE_REG Date: Mon, 31 Jul 2023 09:04:20 -0300 Message-ID: <20230731120420.91007-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230731120420.91007-1-dbarboza@ventanamicro.com> References: <20230731120420.91007-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The EBUSY errno is being used for KVM_SET_ONE_REG as a way to tell userspace that a given reg can't be written after the vcpu started. Signed-off-by: Daniel Henrique Barboza --- Documentation/virt/kvm/api.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index c0ddd3035462..229e7cc091c8 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2259,6 +2259,8 @@ Errors: EINVAL invalid register ID, or no such register or used with VMs in protected virtualization mode on s390 EPERM (arm64) register access not allowed before vcpu finalization + EBUSY (riscv) register access not allowed after the vcpu has run + at least once ====== ============================================================ (These error codes are indicative only: do not rely on a specific error