From patchwork Wed Aug 2 01:15:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13337474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1DA9EB64DD for ; Wed, 2 Aug 2023 01:16:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231193AbjHBBQA (ORCPT ); Tue, 1 Aug 2023 21:16:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230493AbjHBBP7 (ORCPT ); Tue, 1 Aug 2023 21:15:59 -0400 Received: from mail-yw1-x1133.google.com (mail-yw1-x1133.google.com [IPv6:2607:f8b0:4864:20::1133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F6B52701; Tue, 1 Aug 2023 18:15:58 -0700 (PDT) Received: by mail-yw1-x1133.google.com with SMTP id 00721157ae682-5860c7fc2fcso34732137b3.2; Tue, 01 Aug 2023 18:15:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690938957; x=1691543757; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SHHvH1R50hlGEwDWy54Ftr/XiT00eGPxCBa6hf7d2fM=; b=SIcWnJf24oD6MrHfeBaGhZ5Tx9q8YYX5WmPvGDKYmdSECpgrvc5/I96wis28eBoaC7 8NsSiSbdF2JBhIejFF+5Zo5rJmJP8SNpOeAmh7gnm6FQAQ1UWutSBZIXw3nsL1XM9+9/ mRMo1NmSiJAXgNPfw10sCAtzODgsGZvF8Yq/fpwxVIIR8QipjlkaQC8d71Kn09RdluhW 50mg3HafYO2YMJSq9mwP2DVZ/ayNnTfNzZUxet7yX9jShrqjLW+Ux9YZrKqLIRGzA4as 2eH3V2ovzNqUNc1rJcm8HIADynmWknQejhXNslAUNo7zgE9YKoWk4cX2QGMFX6Wd0a6m nWFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690938957; x=1691543757; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SHHvH1R50hlGEwDWy54Ftr/XiT00eGPxCBa6hf7d2fM=; b=SiV3BT4ANDaQtcua3oOwlLPhposnXknk27bPdj71vYGvATZaDvLycs9k6VvZ+bwUJR lbJqfr9cmkkLB2pHZCU7qOnN6uqS3LlzXmGRlDhYV0JNbiALef/hVB0rUgBOYGRy102k +vbbk6shPDtWNX8BBnjijNBrbkJJ49fVKyGPYGzZrPulYKUdlPeaVTt7tVue3eb1H52r mGifRQ26hjlY+bT2PjQ4vxyTmy5upemLlAQFOxvRuKlvBk8udNF/Ky64Se19o3U4fGNG 7wrQ/X6t3gfeVLPNLvoj0C8ZbJNVsx1d9pa8ZEHvlkv84ztTDBA45oqGjin77cFscVNh Q4wg== X-Gm-Message-State: ABy/qLbuE1sDrJErw0BZYUN9rnN0UcJEMZw7el7RQgw1wu+4MPqwzEsx +hRDFgD0YfQFAl1x4j5ZjG8= X-Google-Smtp-Source: APBJJlFjuizQSKZg1Hxg9u4prcGpuwNtMRBtiJCzlQjIZpNQrXEkvTAeONS08cHiLKmAC+JC5y/qAA== X-Received: by 2002:a0d:e647:0:b0:576:91e0:b8c5 with SMTP id p68-20020a0de647000000b0057691e0b8c5mr11842132ywe.0.1690938957494; Tue, 01 Aug 2023 18:15:57 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::7cda]) by smtp.gmail.com with ESMTPSA id d79-20020a814f52000000b00583e52232f1sm4165519ywb.112.2023.08.01.18.15.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Aug 2023 18:15:57 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 1/4] dt-bindings: interconnect: add SDM670 OSM L3 compatible Date: Tue, 1 Aug 2023 21:15:49 -0400 Message-ID: <20230802011548.387519-7-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230802011548.387519-6-mailingradian@gmail.com> References: <20230802011548.387519-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the compatible for the OSM L3 interconnect used in the Snapdragon 670. Signed-off-by: Richard Acayan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 9d0a98d77ae9..21dae0b92819 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -21,6 +21,7 @@ properties: - enum: - qcom,sc7180-osm-l3 - qcom,sc8180x-osm-l3 + - qcom,sdm670-osm-l3 - qcom,sdm845-osm-l3 - qcom,sm6350-osm-l3 - qcom,sm8150-osm-l3 From patchwork Wed Aug 2 01:15:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13337475 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82C9DC04FE1 for ; Wed, 2 Aug 2023 01:16:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230198AbjHBBQC (ORCPT ); Tue, 1 Aug 2023 21:16:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231133AbjHBBQB (ORCPT ); Tue, 1 Aug 2023 21:16:01 -0400 Received: from mail-yw1-x112f.google.com (mail-yw1-x112f.google.com [IPv6:2607:f8b0:4864:20::112f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 275DEDA; Tue, 1 Aug 2023 18:16:00 -0700 (PDT) Received: by mail-yw1-x112f.google.com with SMTP id 00721157ae682-58419517920so71466507b3.0; Tue, 01 Aug 2023 18:16:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690938959; x=1691543759; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3mbRRe9sD99e8aEwE3pk6AUAMTqeEcIKbHf41jMy50A=; b=dM2vrnKgbDBQ6GQ1a9zozB4Kq4Dk2kIW1LJd1tS+rKFdt499gchQdf5o3jgGjgBUSU KwPttqMS9aUu4BdQv0sbC3a1hphgNuDk8WC5U6NGvJiah6rzGVR2QkGY5Wv2g+utsxy1 Qo7pawYfGsXYwE1b/xlHbMVYGT0C/R4oCVDLhZTamV4uS76QFxceo1bzhcFEmSZB5RqE zE5X1U7SJOYl38omsTWkihuYNl2d2nVzaQWDQdKr3nyxBSH2FEMTQRkr6el7Du/E2tVr ibAfxYruhwk3bBY6NSrOGKCoejd2O8KCmaDTJlYCFRiW7vSVNy7vzVz7qQgzGnNbmcC8 250g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690938959; x=1691543759; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3mbRRe9sD99e8aEwE3pk6AUAMTqeEcIKbHf41jMy50A=; b=RGxnn/NCve2dotrVlRtTV3mnycoTW5oSy+ahrLxgGzMXrAKdFc3rGuU5He+gSXYptg rVGdO/i180O6tilErNdU70BcNmLCqCb3tAtxNZMUQEoLTs6+kfOmgRUSVw8lgyGBpitr KZUR7OF81V2OKDkcx78uyQiNRWyw3Mai4RLVxXazpEvgb0zRwEabGLeLu1TWXVDNDgyC 8d3Rhv0oaexyDykljM5WLvh1WE52BbVec58yfMzpiVbPPuqQ4wG8/qkVAwKRaZALSse6 OaBE8fkmHFJYCrruK659It91jTWiItEhrRk9Bk6vAbrC22ZQsJSHphzdIxklLjlPcERe oEMw== X-Gm-Message-State: ABy/qLa5nj7HT7GSS3svzl3WqlXzzG5mnKHADMsIe3VVCHX9lTBBcV28 Szw7M1SbtW6EpjYuMaJlOeLjbqFz5ZXnZA== X-Google-Smtp-Source: APBJJlH9aev4mUO794G0FKKfKs+lL+twnp2cV6tNYmgCxnNKsSTqfzJM2bvSGAZGexDsuf1aTmdjug== X-Received: by 2002:a81:4943:0:b0:576:c543:2a5f with SMTP id w64-20020a814943000000b00576c5432a5fmr17800207ywa.4.1690938959381; Tue, 01 Aug 2023 18:15:59 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::7cda]) by smtp.gmail.com with ESMTPSA id g67-20020a816b46000000b00576c534115bsm4189583ywc.34.2023.08.01.18.15.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Aug 2023 18:15:58 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 2/4] arm64: dts: qcom: sdm670: add osm l3 Date: Tue, 1 Aug 2023 21:15:50 -0400 Message-ID: <20230802011548.387519-8-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230802011548.387519-6-mailingradian@gmail.com> References: <20230802011548.387519-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the interconnect node for L3 cache on SDM670. Signed-off-by: Richard Acayan Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index a1c207c0266d..45f9633d2d2c 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1354,5 +1354,15 @@ intc: interrupt-controller@17a00000 { interrupts = ; #interrupt-cells = <3>; }; + + osm_l3: interconnect@17d41000 { + compatible = "qcom,sdm670-osm-l3", "qcom,osm-l3"; + reg = <0 0x17d41000 0 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; }; }; From patchwork Wed Aug 2 01:15:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13337476 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26DB1C001E0 for ; Wed, 2 Aug 2023 01:16:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231133AbjHBBQG (ORCPT ); Tue, 1 Aug 2023 21:16:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231301AbjHBBQE (ORCPT ); Tue, 1 Aug 2023 21:16:04 -0400 Received: from mail-yw1-x1130.google.com (mail-yw1-x1130.google.com [IPv6:2607:f8b0:4864:20::1130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 603FF2708; Tue, 1 Aug 2023 18:16:02 -0700 (PDT) Received: by mail-yw1-x1130.google.com with SMTP id 00721157ae682-58419517920so71466777b3.0; Tue, 01 Aug 2023 18:16:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690938961; x=1691543761; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vUttVkYPVUVU3N89+Zx8zJHpQPnjY7KVRIbxNy+rJtI=; b=re6KF/msUSgy1SZJn5mnslj89vAbvAunZ9CDmOPyyY7irQHYMW0VWKRod+nYn3ji4S 8gTPTUks9ti/A/5CySdoCKwtngVdMSTDS98t0fRUkJZTaPO6UgJ9SHJGtRx3JOtPHjI0 N9LXTx32l+vP8IiolCfqeLmVwH9rxu06M3isgHHll9ME5zI0f5K9Wnn631uN94MBknHA hO0m4xv4iRW0ueBnqk4b3tjB+GE+/HOVEov4GVTEqk/Rh8sXZlPWIYqGnlebaG2DYKck Crj8I6ZjtovbTmjaaa246UuMcUwnwLb1tbufY/N8mHuc6wuNE8OVP8zcq+f98lLUit5c W5Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690938961; x=1691543761; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vUttVkYPVUVU3N89+Zx8zJHpQPnjY7KVRIbxNy+rJtI=; b=KLQB6NFpOl2Xq0QpeiBZFsynmAcr22R13jJhLowplpuhMJNEZt9mTn+hiGm24GNSkd udLzdePhaH81zHpsS+naZlb/WBITsJqQqrCKz0WYP1XMipvzJ5pznAsXu63ILZG+2ePu eRSiK/P6Xaf3jgJQYco6aJSmvbE3aZfACTAKKnAzvS89I7ZHC5K4oabr/q23d9I5CJGI EHbTfe7HZk2LMZ7dr72xqLdrKAXcPtUfnG1BUQca2kWFItTg6bxWQTvJty+ngBIANWNl TrweqIRPNP9lhK1znusdL80rVnkk2XjYYP331fVUeID1YIGiGuxBnhok1/HeiwEu6PeR bsqw== X-Gm-Message-State: ABy/qLbzXZFbD9A+H6MDgCgC0qaI/dQCQiU+EX2t/O97vqSbNsYyWcD3 3bts+M0/NLyMPNmOGpo/4hc= X-Google-Smtp-Source: APBJJlG+T+48cDWQgSBCXMYe60+rbAbSTSNBpFGPnI5bXY+fR2FnjJ53siN5dBNvVTf6HoWFk+JPTg== X-Received: by 2002:a81:6c56:0:b0:56c:f916:a8a9 with SMTP id h83-20020a816c56000000b0056cf916a8a9mr16851289ywc.22.1690938961516; Tue, 01 Aug 2023 18:16:01 -0700 (PDT) Received: from localhost ([2607:fea8:529e:7800::7cda]) by smtp.gmail.com with ESMTPSA id x3-20020a814a03000000b0057d24f8278bsm4141383ywa.104.2023.08.01.18.16.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Aug 2023 18:16:00 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 3/4] arm64: dts: qcom: sdm670: add cpu frequency scaling Date: Tue, 1 Aug 2023 21:15:51 -0400 Message-ID: <20230802011548.387519-9-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230802011548.387519-6-mailingradian@gmail.com> References: <20230802011548.387519-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add CPU frequency scaling, and also add the corresponding memory and cache bandwidths for each frequency. Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 149 +++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 45f9633d2d2c..e1ef3fc2ace0 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,10 @@ CPU0: cpu@0 { compatible = "qcom,kryo360"; reg = <0x0 0x0>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; next-level-cache = <&L2_0>; @@ -56,6 +61,10 @@ CPU1: cpu@100 { compatible = "qcom,kryo360"; reg = <0x0 0x100>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; next-level-cache = <&L2_100>; @@ -72,6 +81,10 @@ CPU2: cpu@200 { compatible = "qcom,kryo360"; reg = <0x0 0x200>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; next-level-cache = <&L2_200>; @@ -88,6 +101,10 @@ CPU3: cpu@300 { compatible = "qcom,kryo360"; reg = <0x0 0x300>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; next-level-cache = <&L2_300>; @@ -104,6 +121,10 @@ CPU4: cpu@400 { compatible = "qcom,kryo360"; reg = <0x0 0x400>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD4>; power-domain-names = "psci"; next-level-cache = <&L2_400>; @@ -120,6 +141,10 @@ CPU5: cpu@500 { compatible = "qcom,kryo360"; reg = <0x0 0x500>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD5>; power-domain-names = "psci"; next-level-cache = <&L2_500>; @@ -136,6 +161,10 @@ CPU6: cpu@600 { compatible = "qcom,kryo360"; reg = <0x0 0x600>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD6>; power-domain-names = "psci"; next-level-cache = <&L2_600>; @@ -152,6 +181,10 @@ CPU7: cpu@700 { compatible = "qcom,kryo360"; reg = <0x0 0x700>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu6_opp_table>; + interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; power-domains = <&CPU_PD7>; power-domain-names = "psci"; next-level-cache = <&L2_700>; @@ -246,6 +279,111 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + cpu0_opp1: opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <400000 4800000>; + }; + + cpu0_opp2: opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <400000 4800000>; + }; + + cpu0_opp3: opp-748800000 { + opp-hz = /bits/ 64 <748800000>; + opp-peak-kBps = <1200000 4800000>; + }; + + cpu0_opp4: opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + opp-peak-kBps = <1804000 8908800>; + }; + + cpu0_opp5: opp-1209600000 { + opp-hz = /bits/ 64 <1209600000>; + opp-peak-kBps = <2188000 8908800>; + }; + + cpu0_opp6: opp-1324800000 { + opp-hz = /bits/ 64 <1324800000>; + opp-peak-kBps = <2188000 13516800>; + }; + + cpu0_opp7: opp-1516800000 { + opp-hz = /bits/ 64 <1516800000>; + opp-peak-kBps = <3072000 15052800>; + }; + + cpu0_opp8: opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <3072000 22118400>; + }; + + cpu0_opp9: opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <4068000 23040000>; + }; + }; + + cpu6_opp_table: opp-table-cpu6 { + compatible = "operating-points-v2"; + opp-shared; + + cpu6_opp1: opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-peak-kBps = <400000 4800000>; + }; + + cpu6_opp2: opp-652800000 { + opp-hz = /bits/ 64 <652800000>; + opp-peak-kBps = <400000 4800000>; + }; + + cpu6_opp3: opp-825600000 { + opp-hz = /bits/ 64 <825600000>; + opp-peak-kBps = <1200000 4800000>; + }; + + cpu6_opp4: opp-979200000 { + opp-hz = /bits/ 64 <979200000>; + opp-peak-kBps = <1200000 4800000>; + }; + + cpu6_opp5: opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-peak-kBps = <2188000 8908800>; + }; + + cpu6_opp6: opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-peak-kBps = <4068000 12902400>; + }; + + cpu6_opp7: opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <4068000 12902400>; + }; + + cpu6_opp8: opp-1747200000 { + opp-hz = /bits/ 64 <1747200000>; + opp-peak-kBps = <4068000 15052800>; + }; + + cpu6_opp9: opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <4068000 15052800>; + }; + + cpu6_opp10: opp-1996800000 { + opp-hz = /bits/ 64 <1996800000>; + opp-peak-kBps = <6220000 19046400>; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -1364,5 +1502,16 @@ osm_l3: interconnect@17d41000 { #interconnect-cells = <1>; }; + + cpufreq_hw: cpufreq@17d43000 { + compatible = "qcom,cpufreq-hw"; + reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>; + reg-names = "freq-domain0", "freq-domain1"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; }; }; From patchwork Wed Aug 2 01:15:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13337477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEB6BC04E69 for ; Wed, 2 Aug 2023 01:16:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231269AbjHBBQH (ORCPT ); Tue, 1 Aug 2023 21:16:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231163AbjHBBQG (ORCPT ); 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Tue, 01 Aug 2023 18:16:03 -0700 (PDT) From: Richard Acayan To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 4/4] arm64: dts: qcom: sdm670: add frequency profile Date: Tue, 1 Aug 2023 21:15:52 -0400 Message-ID: <20230802011548.387519-10-mailingradian@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230802011548.387519-6-mailingradian@gmail.com> References: <20230802011548.387519-6-mailingradian@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the coefficients for the CPU frequencies to aid in frequency scaling. Profiling setup: - freqbench (https://github.com/kdrag0n/freqbench) - LineageOS kernel, android_kernel_google_msm-4.9 - recommended configuration options by freqbench - disabled options that require clang or 32-bit compilers - mmc governor switched from simple_ondemand to powersave Frequency domains: cpu1 cpu6 Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 Sampling power every 1000 ms Baseline power usage: 445 mW ===== CPU 1 ===== Frequencies: 300 576 748 998 1209 1324 1516 1612 1708 300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s 576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s 748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s 998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s 1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s 1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s 1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s 1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s 1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s ===== CPU 6 ===== Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996 300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s 652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s 825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s 979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s 1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s 1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s 1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s 1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s 1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s 1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s Signed-off-by: Richard Acayan --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index e1ef3fc2ace0..0ac39d3d68ca 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -36,6 +36,8 @@ CPU0: cpu@0 { compatible = "qcom,kryo360"; reg = <0x0 0x0>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -61,6 +63,8 @@ CPU1: cpu@100 { compatible = "qcom,kryo360"; reg = <0x0 0x100>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -81,6 +85,8 @@ CPU2: cpu@200 { compatible = "qcom,kryo360"; reg = <0x0 0x200>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -101,6 +107,8 @@ CPU3: cpu@300 { compatible = "qcom,kryo360"; reg = <0x0 0x300>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -121,6 +129,8 @@ CPU4: cpu@400 { compatible = "qcom,kryo360"; reg = <0x0 0x400>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -141,6 +151,8 @@ CPU5: cpu@500 { compatible = "qcom,kryo360"; reg = <0x0 0x500>; enable-method = "psci"; + capacity-dmips-mhz = <610>; + dynamic-power-coefficient = <203>; qcom,freq-domain = <&cpufreq_hw 0>; operating-points-v2 = <&cpu0_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -161,6 +173,8 @@ CPU6: cpu@600 { compatible = "qcom,kryo360"; reg = <0x0 0x600>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <393>; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>, @@ -181,6 +195,8 @@ CPU7: cpu@700 { compatible = "qcom,kryo360"; reg = <0x0 0x700>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <393>; qcom,freq-domain = <&cpufreq_hw 1>; operating-points-v2 = <&cpu6_opp_table>; interconnects = <&gladiator_noc MASTER_AMPSS_M0 3 &mem_noc SLAVE_EBI_CH0 3>,