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Thu, 3 Aug 2023 06:50:24 -0500 From: Thippeswamy Havalige To: , , , CC: , , , , , Thippeswamy Havalige Subject: [PATCH] PCI: xilinx-nwl: Remove unnecessary code and updating ecam default value. Date: Thu, 3 Aug 2023 17:20:16 +0530 Message-ID: <20230803115016.4266-1-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DC:EE_|IA0PR12MB7698:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e53c711-81a1-4c21-d0a7-08db9417d4e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2aWX0cktiEN21bPayGpqGrWPWuIUUJmYkEBNw+hSGwCE6uM6II3yJ36t2ICcfCdtT4pFM8gCOpfuox2zCT7CqjfmIEDPpeVKljqwfhekJPhnCUfKAKlM1B4BhV0BJ41cmQwaGX2hZa7czpthM3F3lZ8YYW5hYwiOZnxOXYUYH+rEKaU0i3x7pr+wu7aupLoPlqqcbQw3nAfKwxNV8kBiA1TgE3hCJPznu2MAbsF47n5xQEfEBXp2ymE8UZtd1FTFj9G7BoVAvEaS4RnEhw20mREwBFWHLItUE7KR0lUVoKWnvO50VhyY2a9b7VoOfUc6pWtF00Ks/J+vv4WdZZt+DSNxSaCaDsmtlZKQyZROMCl9u85n6ClAukQ+sEVwLU5rXjKm7ksZFLMXsLgpdA0+VBrxfn4nWigLRdT/MocNFy1g5n2LVu2m/Ixkwy9WkyPQyzr4VSDKKhZiy3vOHfAgegq99jekTW4iSkBzkuPmBeNiNX2lX/GIiTmr+dW4PQgX58rK+hyPNUDUklcGB6Mrh6nBSBDmx72nz4n+CuFi99yL+j+cWOqnc/wOwHADWuAkPG4ptYV/RS33gDZTR3LqsSb2k8ELX+SBkQuerpz/Fd5JXk9eEvvlAHlNKEkNhi9SzCbF02VIcorpSymx6tICyYHwct8jxL6llZEzR/iUVFM2iaOuUgXTfkhkTVDTSoxKhscpLFsyMw2qom3Cp/D7jVY4ZrdXQLetOyyu00e6udYyoUY+FlHlmCuZtjDm2E0jGmKPo5YzSR1ETTH5Qebqwg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(396003)(346002)(376002)(39860400002)(451199021)(82310400008)(36840700001)(46966006)(40470700004)(41300700001)(40460700003)(8936002)(8676002)(36860700001)(83380400001)(47076005)(336012)(186003)(1076003)(26005)(86362001)(2616005)(426003)(81166007)(356005)(82740400003)(316002)(6666004)(40480700001)(110136005)(54906003)(478600001)(36756003)(4326008)(70586007)(70206006)(2906002)(5660300002)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Aug 2023 11:50:27.8625 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e53c711-81a1-4c21-d0a7-08db9417d4e0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7698 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_045040_094872_72B91256 X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove reduntant code. Change NWL_ECAM_VALUE_DEFAULT to 16 to support maximum 256 buses. Signed-off-by: Thippeswamy Havalige --- drivers/pci/controller/pcie-xilinx-nwl.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 176686b..6d40543 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -126,7 +126,7 @@ #define E_ECAM_CR_ENABLE BIT(0) #define E_ECAM_SIZE_LOC GENMASK(20, 16) #define E_ECAM_SIZE_SHIFT 16 -#define NWL_ECAM_VALUE_DEFAULT 12 +#define NWL_ECAM_VALUE_DEFAULT 16 #define CFG_DMA_REG_BAR GENMASK(2, 0) #define CFG_PCIE_CACHE GENMASK(7, 0) @@ -683,15 +683,6 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) nwl_bridge_writel(pcie, upper_32_bits(pcie->phys_ecam_base), E_ECAM_BASE_HI); - /* Get bus range */ - ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL); - pcie->last_busno = (ecam_val & E_ECAM_SIZE_LOC) >> E_ECAM_SIZE_SHIFT; - /* Write primary, secondary and subordinate bus numbers */ - ecam_val = first_busno; - ecam_val |= (first_busno + 1) << 8; - ecam_val |= (pcie->last_busno << E_ECAM_SIZE_SHIFT); - writel(ecam_val, (pcie->ecam_base + PCI_PRIMARY_BUS)); - if (nwl_pcie_link_up(pcie)) dev_info(dev, "Link is UP\n"); else