From patchwork Thu Aug 3 16:32:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340312 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E67C4EB64DD for ; Thu, 3 Aug 2023 16:33:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236094AbjHCQdT (ORCPT ); Thu, 3 Aug 2023 12:33:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237433AbjHCQdQ (ORCPT ); Thu, 3 Aug 2023 12:33:16 -0400 Received: from mail-oa1-x2d.google.com (mail-oa1-x2d.google.com [IPv6:2001:4860:4864:20::2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F2ED30E2 for ; Thu, 3 Aug 2023 09:33:12 -0700 (PDT) Received: by mail-oa1-x2d.google.com with SMTP id 586e51a60fabf-1bf0a1134d6so788977fac.3 for ; Thu, 03 Aug 2023 09:33:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080391; x=1691685191; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=US2zdq/tIHnGcM98HjdKSGw1xllfeBdBbDmstB2Y/1A=; b=G5V20V98yafmTTzAS6fKNdzV0zv0/1C3M27Yy2afXWAaBGkNnsT43mabIZLzqBQZRX uz+0tJiXDh/kMmDcmkGSZb18ZZ+zP7behdb1tDmurJBEUgv3K06zCUnqv9+UQl92VM4A CuSjiRhLjalQmOq7xtNiMFLtslA4JGGUQ76gLxdBBWX0X1xDNJ4/kZM9PV+0PZTQuUKg AByc1k6fg0Zuu/XEzOGY1LPMBxnmfkqQsqS66HrY2Z/1kFzRQKkhc8CliWg3+QUyeazV hpIHGceMmSGwMLwkvD/j+WcE9r+Bl43u22SzAzU5Wh9ffJPHSysFJmMH3HhEku6m1M4Y haXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080391; x=1691685191; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=US2zdq/tIHnGcM98HjdKSGw1xllfeBdBbDmstB2Y/1A=; b=FKwxloshInGeyo2yYJmOi2ClUJxpLpgPFJhSmcMPdbX+BimEpotyeERoTQgAenMEl2 cOh2KxLqOaA04cbb8a393vPuMslkB/nC2kVseQuwivAt4kaUw4u/hIsqH7wueXhNrPgC /yt2iSYUgEP5KIFhGD6lNMjOeOpoN6lnyw5/SkuP8Ubp8/mFoRj08DqfimnuoKIYl8y0 HgEhw1r6MmbvOLmGvjd8xl92MjvOwEl7aW4mniTWT1tOQLMKG2fWlJGQx1ZlyyxUw7NR Gmsdgx2tDB1obKlAszZXpZjVMk15TS5gk7Y5EDp0rM6nlUO5iXt97Vv/i2IeLT5UW2vZ rw8g== X-Gm-Message-State: ABy/qLaVMsyNAzJCQYH1lH+QCIJLXFS6FOtZYwGdcaVQI7kUiykkt+d1 0mjmyThw1rEl1kZA+1CC2ubGNQ== X-Google-Smtp-Source: APBJJlHhCTyLkztyA7oyo63LQw96Y/GkUsnwq8vUWzGnkQwicnOUTN6ahBpc6Hl36zCyLO6Tq4cBpQ== X-Received: by 2002:a05:6870:4150:b0:1be:ccce:7991 with SMTP id r16-20020a056870415000b001beccce7991mr17631935oad.13.1691080391465; Thu, 03 Aug 2023 09:33:11 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:11 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 01/10] RISC-V: KVM: return ENOENT in *_one_reg() when reg is unknown Date: Thu, 3 Aug 2023 13:32:53 -0300 Message-ID: <20230803163302.445167-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org get_one_reg() and set_one_reg() are returning EINVAL errors for almost everything: if a reg doesn't exist, if a reg ID is malformatted, if the associated CPU extension that implements the reg isn't present in the host, and for set_one_reg() if the value being written is invalid. This isn't wrong according to the existing KVM API docs (EINVAL can be used when there's no such register) but adding more ENOENT instances will make easier for userspace to understand what went wrong. Existing userspaces can be affected by this error code change. We checked a few. As of current upstream code, crosvm doesn't check for any particular errno code when using kvm_(get|set)_one_reg(). Neither does QEMU. rust-vmm doesn't have kvm-riscv support yet. Thus we have a good chance of changing these error codes now while the KVM RISC-V ecosystem is still new, minimizing user impact. Change all get_one_reg() and set_one_reg() implementations to return -ENOENT at all "no such register" cases. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/aia.c | 4 ++-- arch/riscv/kvm/vcpu_fp.c | 12 ++++++------ arch/riscv/kvm/vcpu_onereg.c | 36 ++++++++++++++++++------------------ arch/riscv/kvm/vcpu_sbi.c | 16 +++++++++------- arch/riscv/kvm/vcpu_timer.c | 8 ++++---- 5 files changed, 39 insertions(+), 37 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 585a3b42c52c..74bb27440527 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -176,7 +176,7 @@ int kvm_riscv_vcpu_aia_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; *out_val = 0; if (kvm_riscv_aia_available()) @@ -192,7 +192,7 @@ int kvm_riscv_vcpu_aia_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (kvm_riscv_aia_available()) { ((unsigned long *)csr)[reg_num] = val; diff --git a/arch/riscv/kvm/vcpu_fp.c b/arch/riscv/kvm/vcpu_fp.c index 9d8cbc42057a..08ba48a395aa 100644 --- a/arch/riscv/kvm/vcpu_fp.c +++ b/arch/riscv/kvm/vcpu_fp.c @@ -96,7 +96,7 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -109,9 +109,9 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -141,7 +141,7 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -154,9 +154,9 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_from_user(reg_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 85773e858120..456e9f31441a 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -156,7 +156,7 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, reg_val = satp_mode >> SATP_MODE_SHIFT; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -242,7 +242,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, return -EINVAL; break; default: - return -EINVAL; + return -ENOENT; } return 0; @@ -262,7 +262,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc)) reg_val = cntx->sepc; @@ -273,7 +273,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, reg_val = (cntx->sstatus & SR_SPP) ? KVM_RISCV_MODE_S : KVM_RISCV_MODE_U; else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -295,7 +295,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -311,7 +311,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, else cntx->sstatus &= ~SR_SPP; } else - return -EINVAL; + return -ENOENT; return 0; } @@ -323,7 +323,7 @@ static int kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { kvm_riscv_vcpu_flush_interrupts(vcpu); @@ -342,7 +342,7 @@ static int kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { reg_val &= VSIP_VALID_MASK; @@ -381,7 +381,7 @@ static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, ®_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -420,7 +420,7 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -437,7 +437,7 @@ static int riscv_vcpu_get_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; *reg_val = 0; host_isa_ext = kvm_isa_ext_arr[reg_num]; @@ -455,7 +455,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) @@ -489,7 +489,7 @@ static int riscv_vcpu_get_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id, ext_val; if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for (i = 0; i < BITS_PER_LONG; i++) { ext_id = i + reg_num * BITS_PER_LONG; @@ -512,7 +512,7 @@ static int riscv_vcpu_set_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id; if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for_each_set_bit(i, ®_val, BITS_PER_LONG) { ext_id = i + reg_num * BITS_PER_LONG; @@ -554,7 +554,7 @@ static int kvm_riscv_vcpu_get_reg_isa_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; @@ -592,7 +592,7 @@ static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -627,7 +627,7 @@ int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, break; } - return -EINVAL; + return -ENOENT; } int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, @@ -659,5 +659,5 @@ int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, break; } - return -EINVAL; + return -ENOENT; } diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 7b46e04fb667..9cd97091c723 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -140,8 +140,10 @@ static int riscv_vcpu_set_sbi_ext_single(struct kvm_vcpu *vcpu, const struct kvm_riscv_sbi_extension_entry *sext = NULL; struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; - if (reg_num >= KVM_RISCV_SBI_EXT_MAX || - (reg_val != 1 && reg_val != 0)) + if (reg_num >= KVM_RISCV_SBI_EXT_MAX) + return -ENOENT; + + if (reg_val != 1 && reg_val != 0) return -EINVAL; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { @@ -175,7 +177,7 @@ static int riscv_vcpu_get_sbi_ext_single(struct kvm_vcpu *vcpu, struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; if (reg_num >= KVM_RISCV_SBI_EXT_MAX) - return -EINVAL; + return -ENOENT; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { if (sbi_ext[i].ext_idx == reg_num) { @@ -206,7 +208,7 @@ static int riscv_vcpu_set_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for_each_set_bit(i, ®_val, BITS_PER_LONG) { ext_id = i + reg_num * BITS_PER_LONG; @@ -226,7 +228,7 @@ static int riscv_vcpu_get_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id, ext_val; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for (i = 0; i < BITS_PER_LONG; i++) { ext_id = i + reg_num * BITS_PER_LONG; @@ -272,7 +274,7 @@ int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_sbi_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -307,7 +309,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 3ac2ff6a65da..527d269cafff 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -170,7 +170,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): @@ -187,7 +187,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, KVM_RISCV_TIMER_STATE_OFF; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -211,7 +211,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -233,7 +233,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, ret = kvm_riscv_vcpu_timer_cancel(t); break; default: - ret = -EINVAL; + ret = -ENOENT; break; } From patchwork Thu Aug 3 16:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D848C04FDF for ; Thu, 3 Aug 2023 16:33:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235662AbjHCQdV (ORCPT ); Thu, 3 Aug 2023 12:33:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237440AbjHCQdR (ORCPT ); Thu, 3 Aug 2023 12:33:17 -0400 Received: from mail-oa1-x31.google.com (mail-oa1-x31.google.com [IPv6:2001:4860:4864:20::31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA61A3AA3 for ; Thu, 3 Aug 2023 09:33:14 -0700 (PDT) Received: by mail-oa1-x31.google.com with SMTP id 586e51a60fabf-1bb69c0070dso798599fac.1 for ; Thu, 03 Aug 2023 09:33:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080394; x=1691685194; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Se2JbaEVYLXjTL+pjhDmFAfPctGeuPvLnZbRGMw0k0A=; b=b4rf82DOOXLAo6uXuOPKsQdJ7VimE8510z42ayRg4RsS1w9OSeVvKZNaAglixIl7SY tSv4f5vykKGjEmVqyCzXRP5Tu8eseQr2wcSecarFNdVy+TICVxg3JsxM28azIhKMXWX5 lqqH17GN1xoOcY02EDZPFeK5VxnG94CEFcK9RFoRlDyDm3nrFPigASPwoMG+68oXJ+hi X5viSYt/tCkPCc1Hr7VS88atC8bCtnLmRgzM26+eWShJyrbXGAESEc/+bAOo5HQF713u kyLwSgHc5RKPXoEzbE42igH22frMLNfy/AQ9IUPUl+rDcd6gQkNbcbQntDXIuyH1tKVk ZsvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080394; x=1691685194; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Se2JbaEVYLXjTL+pjhDmFAfPctGeuPvLnZbRGMw0k0A=; b=e/H5rD9W6T2YuELnuYh3uZ2U0dUh2wDO8NPm88AiXGzmZq28pgbiE9+Zd2HEuJdYvr 7zUMtzTprdP7/KBIuzqgKdETJUGRjMgsw8Hh4RmQbxW9zqI9pljgailEL4Uy3264CWHT Q5MoONgq6mov5RiOarby9U/zC+Nx6Ovjhu48WqMi1+YQOWFVdAFQ/YwVWWK2rAF85FrR kjkbp23XPlztt7A0j7kwMIDJKpJjIpzTxc6/ODxMevkc2aMk9YtDOKyzmgp9MZCYOslp Y3L6HkqTUdzCplDY7sdFCMU19q2rBSCjwxBGTr1cfnIYl2J8zA89/08NUaD/lMEwOk8D eeWg== X-Gm-Message-State: ABy/qLY9ke8qqXMLDwTW4cCjGbJlBhjRvQpm+A7yY7ucGdkZsZ0tDAfD /WPk/RsMkf7p6rjAVfAw9OKUnw== X-Google-Smtp-Source: APBJJlFGD5MMq2Hoaz5rq9/cnX5nwZ7QsFelzBO/SLhIYURmphmt1RQt1A03YSPSmHlaKbGw6A5SAQ== X-Received: by 2002:a05:6870:4182:b0:1ad:4c06:15c with SMTP id y2-20020a056870418200b001ad4c06015cmr20868299oac.18.1691080394134; Thu, 03 Aug 2023 09:33:14 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:13 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 02/10] RISC-V: KVM: use ENOENT in *_one_reg() when extension is unavailable Date: Thu, 3 Aug 2023 13:32:54 -0300 Message-ID: <20230803163302.445167-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Following a similar logic as the previous patch let's minimize the EINVAL usage in *_one_reg() APIs by using ENOENT when an extension that implements the reg is not available. For consistency we're also replacing an EOPNOTSUPP instance that should be an ENOENT since it's an "extension is not available" error. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 456e9f31441a..1ffd8ac3800a 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -135,12 +135,12 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cbom_block_size; break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cboz_block_size; break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): @@ -459,7 +459,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) - return -EOPNOTSUPP; + return -ENOENT; if (!vcpu->arch.ran_atleast_once) { /* From patchwork Thu Aug 3 16:32:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF140EB64DD for ; Thu, 3 Aug 2023 16:33:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235674AbjHCQdX (ORCPT ); Thu, 3 Aug 2023 12:33:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235350AbjHCQdS (ORCPT ); Thu, 3 Aug 2023 12:33:18 -0400 Received: from mail-oa1-x29.google.com (mail-oa1-x29.google.com [IPv6:2001:4860:4864:20::29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88830E77 for ; Thu, 3 Aug 2023 09:33:17 -0700 (PDT) Received: by mail-oa1-x29.google.com with SMTP id 586e51a60fabf-1bb575a6ed3so821171fac.2 for ; Thu, 03 Aug 2023 09:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080397; x=1691685197; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9fx5RruSr8XX/h9I2AtxnZ2PV0E5AQnOItUyD2ZQGSo=; b=OXVlIvxqZq/ugA1tq8HnCrf89IYbUi3eCY5Lw7klgG72620m39mehcGvLdVyg8XyzC m2SoQpwziTq7cySZd+Q4LKeLr6ZjPVep9YuOuiRsYcHZ21oia+3/B58NVbFXThBSXxro +ZftTWsJA6qUlshZf0K89f4vgs4nFbHNvi1Auv3VxjtLAOLCtIrHJl4b6vHKM8GyhiJD q9xMGGPOqIKCLnOvkIwOmKEs4NVy0KTcsN2vxA8omyt2IF3/7+U0kZomC/Aojok5VYn7 MWVlAumDQBlubFvgBOpBgQoQfJ/ApYfWdm/sXjcZ/eC8VLaUDFFrYDkQaUmff8ziH8Cu Iw+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080397; x=1691685197; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9fx5RruSr8XX/h9I2AtxnZ2PV0E5AQnOItUyD2ZQGSo=; b=B1KHgLM58dTLbUenxZ0yd/rzym7QgCyIwy86v32YdhokE5LL5sdnfMO8uaA5ey3Ubf o33INV6rpXoTvNkY7mmcodu+ImnueJG21crEfHTE+pfeZ6ncWDFDBUOKjN/ScBRcjziJ Pyobqw8L/oGy8fFUgDzOMgcgaSu2givWyX2XSzDwU5zoG4pE4G6gI7qKINGLpMbX6fMN bpFPNKcZK58pCEJA9vA/wTgnvanVgCyd/1QSoIFiCJq0GRc3K3KnrTdfKsvEDjLKwTiO z2nZUcmT3hXUA5BjtOnOwXLQ/4ghzFsBEDQ1lCigvjO61cTa6vdDV4MZcroa1fjXdT8Z cb4w== X-Gm-Message-State: ABy/qLY9YRrk2ghC4YPdi/rS03YV6/PTAjLpkMLx7WWqanh6O7ZVxqhS JOngp/FtiOpAvb+daUgzqh3clQ== X-Google-Smtp-Source: APBJJlGcRltldAfni3BfR3KZMxmiX5SNdIToiZOXvm/eqO5x/Ld7sy5xC6M5vBBDuRjgsANoD+hfWQ== X-Received: by 2002:a05:6870:4251:b0:1ba:199a:984a with SMTP id v17-20020a056870425100b001ba199a984amr21455947oac.55.1691080396728; Thu, 03 Aug 2023 09:33:16 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:16 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 03/10] RISC-V: KVM: do not EOPNOTSUPP in set_one_reg() zicbo(m|z) Date: Thu, 3 Aug 2023 13:32:55 -0300 Message-ID: <20230803163302.445167-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org zicbom_block_size and zicboz_block_size have a peculiar API: they can be read via get_one_reg() but any write will return a EOPNOTSUPP. It makes sense to return a 'not supported' error since both values can't be changed, but as far as userspace goes they're regs that are throwing the same EOPNOTSUPP error even if they were read beforehand via get_one_reg(), even if the same read value is being written back. EOPNOTSUPP is also returned even if ZICBOM/ZICBOZ aren't enabled in the host. Change both to work more like their counterparts in get_one_reg() and return -ENOENT if their respective extensions aren't available. After that, check if the userspace is written a valid value (i.e. the host value). Throw an -EINVAL if that's not case, let it slide otherwise. This allows both regs to be read/written by userspace in a 'lazy' manner, as long as the userspace doesn't change the reg vals. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 1ffd8ac3800a..e06256dd8d24 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -216,9 +216,17 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) + return -ENOENT; + if (reg_val != riscv_cbom_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) + return -ENOENT; + if (reg_val != riscv_cboz_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): if (!vcpu->arch.ran_atleast_once) vcpu->arch.mvendorid = reg_val; From patchwork Thu Aug 3 16:32:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61C43C04FDF for ; Thu, 3 Aug 2023 16:33:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236879AbjHCQd0 (ORCPT ); Thu, 3 Aug 2023 12:33:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235834AbjHCQdY (ORCPT ); Thu, 3 Aug 2023 12:33:24 -0400 Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F299AE5E for ; Thu, 3 Aug 2023 09:33:19 -0700 (PDT) Received: by mail-ot1-x32e.google.com with SMTP id 46e09a7af769-6bcae8c4072so938214a34.1 for ; Thu, 03 Aug 2023 09:33:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080399; x=1691685199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=layCgJMKTMdCi6CUwpGdosiF30u+gDMVAdsZicD45LuGPmu3PhVeuMEJrwDZikHCtY EtTtmqb7C2PaHl1fI73JUHKLNRChtqT12pdd82mW5dNPh/3mKpRlTKZ2/livS7Q6LaG4 LNh1FJ911hXWY+2HRLipzSeGe+ljI/mHCIltzEsUGGlDMY+QPdq/dXsKlN0kTezY6xVk tigGCb/4o2r4pQJo2q+eRLeEqmJeh2Zzxsjsam74y7Gm+ssjSi/wKl1BoAwkMGu7fcfk f9U1nYn2rPLB/TurCeF8Fit9kMuuLkpon/D/6/YmFiskWAeAXANYohA2ypdHxieUG9XT KOKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080399; x=1691685199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=Z4ZKMaQzaKs6JfSBM93tyzaZLQRwS/a4qxdj9e5NP3SsnFllqRYS09VWlvglxdazlU QGPareM0qk+9fcl2BFylAQvozbVYRt8LiDIk0MKltp6lJhJNB2gBFy3dRMPel2ZFkM3m 3r/+9MY6woBP2NQGS1YvOu46jtruaoRCCRQoPX/KlCSmzefoapNNgmvQ4WnaqqPugU0y jifOv/GR2W0gM8u/srEo1yFi3piLB3e2VTIjpFEHjEnFr6uZeek9gU6lPeEYouPotpp+ H1+RyuSuO1kP2uKM7M1M7cy3Mgnm8Y2MZWKHOKdJ+b4kWV8RccxJTmqVzSscPMrKNrC1 SoaA== X-Gm-Message-State: ABy/qLa5etzMBGhhbBYhMH+YHwX+Mjx50vnkEgAq+fz40pZQCzdilq9V I00EBIaR6g4FbVBtv3r9n+HhYQ== X-Google-Smtp-Source: APBJJlG0rs3nKhuYYR5c82UKA4Dk+/x0du7zwqROz1SCshYkrDRGHKOreX+5liY/Az2sNnl2PH+VLg== X-Received: by 2002:a05:6870:a90b:b0:1be:f721:db04 with SMTP id eq11-20020a056870a90b00b001bef721db04mr11116042oab.4.1691080399322; Thu, 03 Aug 2023 09:33:19 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:18 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 04/10] RISC-V: KVM: do not EOPNOTSUPP in set KVM_REG_RISCV_TIMER_REG Date: Thu, 3 Aug 2023 13:32:56 -0300 Message-ID: <20230803163302.445167-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The KVM_REG_RISCV_TIMER_REG can be read via get_one_reg(). But trying to write anything in this reg via set_one_reg() results in an EOPNOTSUPP. Change the API to behave like cbom_block_size: instead of always erroring out with EOPNOTSUPP, allow userspace to write the same value (riscv_timebase) back, throwing an EINVAL if a different value is attempted. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 527d269cafff..75486b25ac45 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -218,7 +218,8 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): - ret = -EOPNOTSUPP; + if (reg_val != riscv_timebase) + return -EINVAL; break; case KVM_REG_RISCV_TIMER_REG(time): gt->time_delta = reg_val - get_cycles64(); From patchwork Thu Aug 3 16:32:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B43FC001DF for ; Thu, 3 Aug 2023 16:33:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236264AbjHCQd1 (ORCPT ); Thu, 3 Aug 2023 12:33:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236978AbjHCQdY (ORCPT ); Thu, 3 Aug 2023 12:33:24 -0400 Received: from mail-oo1-xc2d.google.com (mail-oo1-xc2d.google.com [IPv6:2607:f8b0:4864:20::c2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E453930E5 for ; Thu, 3 Aug 2023 09:33:22 -0700 (PDT) Received: by mail-oo1-xc2d.google.com with SMTP id 006d021491bc7-55b8f1c930eso764283eaf.3 for ; Thu, 03 Aug 2023 09:33:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080402; x=1691685202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JEYaOjRkNiCc5Arsd3SH+zFXne751CxcbC3uwvEPq2E=; b=nDqgSReQn24+I/TOy7vw45dSl5z0FFfSL4cVqGNwP0d0zlHKuSGsFLdlXng8abhd7q J/hIudebRlWXVsf5f0chJQEScgO6UFi5gVeNqlnnZiv2ktY3ija7neMd+GJvW0qGS1Jb DN/Lkjj+so6bSseF3VG9x1Iv5wSJBqV+r3vRnBaSLqTlALDqRIrv/SE7nwNjFfVks0le MlS1wKRpXnFKpEXXvZGPXh19Q5Z/jg4quL0E7sJ78ZvGrILu4tBaq1VWB52uM6PC8OR5 0+S6IpNYUS9AuCti4m7DjFcI+0YMKAxr4QchZW+qSPitKjCVCr6b19wKbYHvRzS8qPk/ x1QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080402; x=1691685202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEYaOjRkNiCc5Arsd3SH+zFXne751CxcbC3uwvEPq2E=; b=Xbpbhss36F2w91L5au4cHdPGI/4bwtPi/rWqr8kxaon0hhvQYhVVaZJzD02XbWyPwU RwIuM9KChVJdFZNlq84M15SCXQhKoRdT2NO9xQtRckruZaPTWfjEt3o45GTiRDkAuLFj CpYyAOgf1B2S0SRJHwUvVZJqNDZ+qCJ2e3N8tHImSWI4yTLBXx9cUDiaio0dUKP/1rN9 RpJ/6/afrb8L6vpkn85e7Kmn8F1WfH3hYrcZkAoil+RfXn8gJiMekQwNLL6jvpf0iXwP t2mfooN5GkRkVGigzP3Hh8FxrQ8oCu9hjildV3bHYsy1cj24BjE9CEIS55pU1YB8IpOW HQug== X-Gm-Message-State: ABy/qLZnObQ7UK0KVN7pBSTJEh/iE5+F5nDMmd+kifSv9wwOAudWM9V4 z0cLO1/kmHE85uehs29SZ3IKmg== X-Google-Smtp-Source: APBJJlGKhxjt9ppMdXXgRQCK3rogM/kWokH5xOaV/O6CG2pZlKZm+depQdkRXmyceKMNzwj0pPo86Q== X-Received: by 2002:a05:6808:1144:b0:3a7:4cf6:f0cb with SMTP id u4-20020a056808114400b003a74cf6f0cbmr10603918oiu.21.1691080402043; Thu, 03 Aug 2023 09:33:22 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:21 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 05/10] RISC-V: KVM: use EBUSY when !vcpu->arch.ran_atleast_once Date: Thu, 3 Aug 2023 13:32:57 -0300 Message-ID: <20230803163302.445167-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org vcpu_set_reg_config() and vcpu_set_reg_isa_ext() is throwing an EOPNOTSUPP error when !vcpu->arch.ran_atleast_once. In similar cases we're throwing an EBUSY error, like in mvendorid/marchid/mimpid set_reg(). EOPNOTSUPP has a conotation of finality. EBUSY is more adequate in this case since its a condition/error related to the vcpu lifecycle. Change these EOPNOTSUPP instances to EBUSY. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index e06256dd8d24..971a2eb83180 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -212,7 +212,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, vcpu->arch.isa[0] = reg_val; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): @@ -484,7 +484,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, return -EINVAL; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } return 0; From patchwork Thu Aug 3 16:32:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CA40C001DF for ; Thu, 3 Aug 2023 16:33:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237123AbjHCQda (ORCPT ); Thu, 3 Aug 2023 12:33:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237177AbjHCQd1 (ORCPT ); Thu, 3 Aug 2023 12:33:27 -0400 Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE98C30E2 for ; Thu, 3 Aug 2023 09:33:25 -0700 (PDT) Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-1bbb4bddd5bso813247fac.2 for ; Thu, 03 Aug 2023 09:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080404; x=1691685204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mu19x8hfUH10MYfTjpP1RF1Ut52SK1pMVXhmwflqSgo=; b=TpvWicxWFYBiktBxgQXprDfHQhi710ZNwh4iGPKDpbCU/Bvhfjek9JiF1dQ2N3M/fS Ph39nnqBvjqk+T1167JKk+ymWTagirpcR2W3t9daD/GyK/yB5qEDfw0L7YEg1AzITc4H Q3okzjb0hoB55w56MJp7/rUu9OMylkceruThMCRTUQw5doWxdoeOOh8CX5bHRipt0pjq +ecomc3SRll5frP13G8eqWLz6x/Ln1sDXaIMCP7UXAZgIKkYxre/m3CqJCFAmgmxyUVd s9U2tYKlZozhRjwUXaFzen8vTx3VI+Z3Hq1X3dP4pO7my5+oU0awjlkxQHx1BNofnJrS svHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080404; x=1691685204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mu19x8hfUH10MYfTjpP1RF1Ut52SK1pMVXhmwflqSgo=; b=lCVKGVQtm/rSIM4iUn5Fj0WrwAVV6LPTf4DNqT1fB1ydSRQFQKSiEoiPQ/D/lee2CO XgOK6rm66pBKJH3+bAZ2DkAsgj5RTtF1jKIV7LkwdBfpxxfqamOFe+TPiF6cyASPPgIE Cc7NJNvKhTwbKaAscueqKIquglzO/Qd2mOpYIt1/fh/v+IjLSkSv1KNmvi6AayM49lDo y6SwprMXHY9sBA4hmYQZ3oOPIyAphkNBTW1+2S8r3o2N0vWFZv+Gpa422aS0oLYwXXo6 D5Azpfm+X0oVl/zTOm7X7+x/aj9FnvbwkWG8Mc+QKUjmHwhCl1ONuaYJjk1QIMxTqNQG jS2A== X-Gm-Message-State: ABy/qLbq4bUIf0a0/NEaYuNtga2bpEtRo7h3ly46eT/8kGz3/3tfU347 xgqkTw6mbhPGUfK6tYW2AGhcIA== X-Google-Smtp-Source: APBJJlG263MxMOlhWr+lUKGc/wweZv2EVJn1qhDZ7kk7BlzsBVSKt9RLtfuD9s11IUfZLBrI6BZ4Pg== X-Received: by 2002:a05:6870:970f:b0:1b7:1904:1ad9 with SMTP id n15-20020a056870970f00b001b719041ad9mr22111121oaq.53.1691080404645; Thu, 03 Aug 2023 09:33:24 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:24 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 06/10] RISC-V: KVM: avoid EBUSY when writing same ISA val Date: Thu, 3 Aug 2023 13:32:58 -0300 Message-ID: <20230803163302.445167-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org kvm_riscv_vcpu_set_reg_config() will return -EBUSY if the ISA config reg is being written after the VCPU ran at least once. The same restriction isn't placed in kvm_riscv_vcpu_get_reg_config(), so there's a chance that we'll -EBUSY out on an ISA config reg write even if the userspace intended no changes to it. We'll allow the same form of 'lazy writing' that registers such as zicbom/zicboz_block_size supports: avoid erroring out if userspace made no changes to the ISA config reg. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 971a2eb83180..a0b0364b038f 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -190,6 +190,13 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, if (fls(reg_val) >= RISCV_ISA_EXT_BASE) return -EINVAL; + /* + * Return early (i.e. do nothing) if reg_val is the same + * value retrievable via kvm_riscv_vcpu_get_reg_config(). + */ + if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK)) + break; + if (!vcpu->arch.ran_atleast_once) { /* Ignore the enable/disable request for certain extensions */ for (i = 0; i < RISCV_ISA_EXT_BASE; i++) { From patchwork Thu Aug 3 16:32:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2333EB64DD for ; Thu, 3 Aug 2023 16:33:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235531AbjHCQdd (ORCPT ); Thu, 3 Aug 2023 12:33:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233534AbjHCQd3 (ORCPT ); Thu, 3 Aug 2023 12:33:29 -0400 Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55EA130E5 for ; Thu, 3 Aug 2023 09:33:28 -0700 (PDT) Received: by mail-oa1-x36.google.com with SMTP id 586e51a60fabf-1bbb4bde76dso770441fac.2 for ; Thu, 03 Aug 2023 09:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080407; x=1691685207; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qX6uX+zjhMvlxZ1l4PideJKUAkuckmjO6QKloArzLfk=; b=R94Jg27ghBMe+8pXyv0yNEDs0bC953tVdWKPFV6vA4TGK6rzvTc09Y52RVPgfdp0mG /6RpDcjZJW5laVWp2iBMOuPs7dwUeHIQtpV5sa9d9dlTN46QrCnnjJj9ru1HkA4X352q yc/y/mPR/WIKSfMgrK8ovU1adcSD6tkSp40mcP9J7vrEGVnAmmhfkSZXzfXrwd3n7X/t gzrPj9TuiW6ucIgg4GJ1+QGG50bQEbJBTUPNS0y9nhC5FmNRMHevTeDy+1nHyRKbh9c1 X0GCHHwVFuZUWQvVbYcCldacF/7YPRwWHAzsjpNDxUZ3pS2+6S61CZgDWf7oYL4Yb04h +SXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080407; x=1691685207; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qX6uX+zjhMvlxZ1l4PideJKUAkuckmjO6QKloArzLfk=; b=hX05b0leb/lB0s5/kGNxYYl17muAW081L20K6wkWvr1vyC7DLLDfkI/YT6VDGESuqk PrEXmTbbEqNlNXZ5BGEYUDcOBftIUMFdEA8zz+t0cWMr4qJcTmnyu+5VM8345FmLN2Qg OS5SLiiassExc/LsOPr888dQZq5CWG+Y3xjKFENWy81d+4pzWb5wOkq0hiRU9DY7+HXe KO7w/AyYGkBt0UPB1oLGlLX/x13pgRfUVI8BKxA7+xAyTQz9vaFymK4KZuQ7LKzWBbfF 2NwC/rmn6LwE4jUCyMeH1Hu14H+q65MovcQvdhH0DPsSP0Teq6hxRWSM3xL9kTSKR/yJ SatQ== X-Gm-Message-State: ABy/qLbEitFrg/iMHQ+wDwT36E+lIF8E69OBsywZYGb/6JfL9dg18VAE zf5sSbTho6++gXYoqJ29q3Oorg== X-Google-Smtp-Source: APBJJlF4UpvVSQIIhQhdxGLDKP5P6kayfkJ70CHnvKXEJ6xr3Aa4W68v/I+nOVn2bKwzsQK9klklyA== X-Received: by 2002:a05:6870:f583:b0:1ba:f2eb:baa3 with SMTP id eh3-20020a056870f58300b001baf2ebbaa3mr21860578oab.3.1691080407296; Thu, 03 Aug 2023 09:33:27 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:26 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 07/10] RISC-V: KVM: avoid EBUSY when writing the same machine ID val Date: Thu, 3 Aug 2023 13:32:59 -0300 Message-ID: <20230803163302.445167-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Right now we do not allow any write in mvendorid/marchid/mimpid if the vcpu already started, preventing these regs to be changed. However, if userspace doesn't change them, an alternative is to consider the reg write a no-op and avoid erroring out altogether. Userpace can then be oblivious about KVM internals if no changes were intended in the first place. Allow the same form of 'lazy writing' that registers such as zicbom/zicboz_block_size supports: avoid erroring out if userspace makes no changes in mvendorid/marchid/mimpid during reg write. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index a0b0364b038f..81cb6b2784db 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -235,18 +235,24 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, return -EINVAL; break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): + if (reg_val == vcpu->arch.mvendorid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.mvendorid = reg_val; else return -EBUSY; break; case KVM_REG_RISCV_CONFIG_REG(marchid): + if (reg_val == vcpu->arch.marchid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.marchid = reg_val; else return -EBUSY; break; case KVM_REG_RISCV_CONFIG_REG(mimpid): + if (reg_val == vcpu->arch.mimpid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.mimpid = reg_val; else From patchwork Thu Aug 3 16:33:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A28EAEB64DD for ; Thu, 3 Aug 2023 16:33:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236596AbjHCQdi (ORCPT ); Thu, 3 Aug 2023 12:33:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236679AbjHCQdf (ORCPT ); Thu, 3 Aug 2023 12:33:35 -0400 Received: from mail-oa1-x31.google.com (mail-oa1-x31.google.com [IPv6:2001:4860:4864:20::31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E50833C28 for ; Thu, 3 Aug 2023 09:33:30 -0700 (PDT) Received: by mail-oa1-x31.google.com with SMTP id 586e51a60fabf-1bb7297c505so824565fac.1 for ; Thu, 03 Aug 2023 09:33:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080410; x=1691685210; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Uu7FCUVMhVtaI44cD7BULzw6bJMgB622Gr+5DTVj+Bo=; b=e12fuyl/YeJW953kPJERxGswpaMryJfjjQq5sl9Yem3wu5CKheDWM4PHRd9wrva1/v 4sYjysYxyTzeleQoRLmGAoIrz6i53KB+5pN6QEBvd8YGCnmqAOwXRvk5TL1Fzvrad8NZ ztbHG14xtJX9GlwW/5i12PKzkbjbEq6nfInqEgx6E5fd48liIlI8S4OdfhvWCBR67rYq MWhWNtPXtZXtA/bHvzvlxSHgdSLNJZvV2LUCzFG+I+clFEb0kwbpKgzJN/DPJDsR77G9 b5Yhc+yuvmgyx8fhHM1LNsOkHTADyBKnOe0cxx1yCnmadGe/wMkfpiLrk4uVmD2WGAQh vwCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080410; x=1691685210; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Uu7FCUVMhVtaI44cD7BULzw6bJMgB622Gr+5DTVj+Bo=; b=jLGVY7H9XL9EuiT1987sDjlDPyEEnK88NVLbxyhmOvPyWVFn+cDC6rvEUzYPAAayAP FafYm2S4ir7otjO4UC1BwPgEZN15PPNRgJmdbUvrN81Sl9pWx9LlEramo3MPg7n+9i3x C89ZG07MEiNFakoL/qsuRi7newjb4nVkPBAtDG8TAj4KaAHOx/jsWYeK2+G8mNaUMXV0 H1YWSpT4kStWDjxYgfK7wmzuO22L0nsQCR4Rv5i2U49Uhds2khV0bG5iPWkCcVFK/rdc a2BFZD1mmQPFOM7ciI7aSPN+KQb0AoYDq96j2qmY3+vmMwrcwBVqt6g5WJFo4KJgrmYn DXzQ== X-Gm-Message-State: ABy/qLYRfdNGe/+S4uc8ww8lMtdPOeN0AIaL/ZGncRefaNS5ONSNKHA6 5mTLeZN5xPFa64/Jo1579ZRMhg== X-Google-Smtp-Source: APBJJlGwoCOFRPCchOHL4r61LhHvmGfZ6gIxkUR9qlClLMHYy95T1Eeoqxo6LJktGRsLHTWo1iCCLg== X-Received: by 2002:a05:6871:283:b0:1bb:5af8:701f with SMTP id i3-20020a056871028300b001bb5af8701fmr17924948oae.23.1691080409822; Thu, 03 Aug 2023 09:33:29 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:29 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 08/10] RISC-V: KVM: avoid EBUSY when writing the same isa_ext val Date: Thu, 3 Aug 2023 13:33:00 -0300 Message-ID: <20230803163302.445167-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org riscv_vcpu_set_isa_ext_single() will prevent any write of isa_ext regs if the vcpu already started spinning. But if there's no extension state (enabled/disabled) made by the userspace, there's no need to -EBUSY out - we can treat the operation as a no-op. zicbom/zicboz_block_size, ISA config reg and mvendorid/march/mimpid already works in a more permissive manner w.r.t userspace writes being a no-op, so let's do the same with isa_ext writes. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 81cb6b2784db..989ea32dbcbe 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -482,6 +482,9 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, if (!__riscv_isa_extension_available(NULL, host_isa_ext)) return -ENOENT; + if (reg_val == test_bit(host_isa_ext, vcpu->arch.isa)) + return 0; + if (!vcpu->arch.ran_atleast_once) { /* * All multi-letter extension and a few single letter From patchwork Thu Aug 3 16:33:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD4ABC001DF for ; Thu, 3 Aug 2023 16:33:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236018AbjHCQdm (ORCPT ); Thu, 3 Aug 2023 12:33:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232507AbjHCQdk (ORCPT ); Thu, 3 Aug 2023 12:33:40 -0400 Received: from mail-oo1-xc33.google.com (mail-oo1-xc33.google.com [IPv6:2607:f8b0:4864:20::c33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90F1E4205 for ; Thu, 3 Aug 2023 09:33:33 -0700 (PDT) Received: by mail-oo1-xc33.google.com with SMTP id 006d021491bc7-56c8757d45bso735962eaf.2 for ; Thu, 03 Aug 2023 09:33:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080412; x=1691685212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EkwDk8dXju8I9w7KpYFAws21Qd1+OBzn/0afxgdVQLI=; b=N6eD3D+2ZGDTGKs0uoKUQflxUg0CRszU0wYcEX1ODl11fo+EjpZB5bT8npzJM5ItSe 9OKx0XMOTuDUsslrgxtturtBHw7YNozWeasDIk+elGxIOUREq4cDP0XBzmmlL5qkMagz niXg4nabm1nFAYLle3gbBiYpYT0CLVnpxBCdVwDAr3xvO+nlp6ptob8r90iCHhj9yFro RqLfhQ3aC5xruAhvY5WjGP1ejgj93gqrtelZcVdCGOBvrNJ6W2G5BjRt53sfnu/biBJC UOrdkP+U29Ha2CplC/nEgI07aZRZUB+umL+Tzw9iDcAyE04EC1VPn8aZ4KvMRqqkT39v L7PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080412; x=1691685212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EkwDk8dXju8I9w7KpYFAws21Qd1+OBzn/0afxgdVQLI=; b=cRKk6abwtBrNTu8M0K6QrJGjtzvtd7wah//5r32PHUoO5wHx0WJsTjy/D7deCONyk6 Nmh7GEnEh572Gvz8KnKbtdiPDL9fOoUOP4DDukwyQqxeeozLhjvIhknCFUwZvnTFdCML ACMfwK2d6HfYX1KMSYMKnBMpVUfCm9XX9v4/p7vNH/7lUJjT+OLy/KUXrCzJ1ySA/gY0 p23qhsciGYgSZii54DkAVpQz6cV+o43geLHLnRVe5okXPGC5E4XiB623/T14TF1iS4gO lbFYBWEQIelpZAekEp4MBoj+6VgNQqRAlU3LDbV9H0lNQKDD/dM/tgLS4fwII5O+Au+5 EfFw== X-Gm-Message-State: ABy/qLZ4JoFU2Pal3fLuFMLjhZIkczzrZa08k5ly8J18r44U710Gyxsf j5tthRIjd/rzPXaU86IplsPBrA== X-Google-Smtp-Source: APBJJlEq0uC7OWZ+6nYyMbSifB7fjfEM6gJvhiWUQN3f23VfZ00dVOJUMOBYDODSu4FG2ATfbt524w== X-Received: by 2002:a05:6808:f11:b0:3a1:dd99:8158 with SMTP id m17-20020a0568080f1100b003a1dd998158mr23751679oiw.6.1691080412183; Thu, 03 Aug 2023 09:33:32 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:31 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com Subject: [PATCH v4 09/10] RISC-V: KVM: Improve vector save/restore errors Date: Thu, 3 Aug 2023 13:33:01 -0300 Message-ID: <20230803163302.445167-10-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Andrew Jones kvm_riscv_vcpu_(get/set)_reg_vector() now returns ENOENT if V is not available, EINVAL if reg type is not of VECTOR type, and any error that might be thrown by kvm_riscv_vcpu_vreg_addr(). Signed-off-by: Andrew Jones --- arch/riscv/kvm/vcpu_vector.c | 60 ++++++++++++++++++++---------------- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/arch/riscv/kvm/vcpu_vector.c b/arch/riscv/kvm/vcpu_vector.c index edd2eecbddc2..39c5bceb4d1b 100644 --- a/arch/riscv/kvm/vcpu_vector.c +++ b/arch/riscv/kvm/vcpu_vector.c @@ -91,44 +91,44 @@ void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu) } #endif -static void *kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, +static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, unsigned long reg_num, - size_t reg_size) + size_t reg_size, + void **reg_val) { struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; - void *reg_val; size_t vlenb = riscv_v_vsize / 32; if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) { if (reg_size != sizeof(unsigned long)) - return NULL; + return -EINVAL; switch (reg_num) { case KVM_REG_RISCV_VECTOR_CSR_REG(vstart): - reg_val = &cntx->vector.vstart; + *reg_val = &cntx->vector.vstart; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vl): - reg_val = &cntx->vector.vl; + *reg_val = &cntx->vector.vl; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vtype): - reg_val = &cntx->vector.vtype; + *reg_val = &cntx->vector.vtype; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr): - reg_val = &cntx->vector.vcsr; + *reg_val = &cntx->vector.vcsr; break; case KVM_REG_RISCV_VECTOR_CSR_REG(datap): default: - return NULL; + return -ENOENT; } } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) { if (reg_size != vlenb) - return NULL; - reg_val = cntx->vector.datap + return -EINVAL; + *reg_val = cntx->vector.datap + (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb; } else { - return NULL; + return -ENOENT; } - return reg_val; + return 0; } int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, @@ -141,17 +141,20 @@ int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | rtype); - void *reg_val = NULL; size_t reg_size = KVM_REG_SIZE(reg->id); + void *reg_val; + int rc; - if (rtype == KVM_REG_RISCV_VECTOR && - riscv_isa_extension_available(isa, v)) { - reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size); - } - - if (!reg_val) + if (rtype != KVM_REG_RISCV_VECTOR) return -EINVAL; + if (!riscv_isa_extension_available(isa, v)) + return -ENOENT; + + rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_val); + if (rc) + return rc; + if (copy_to_user(uaddr, reg_val, reg_size)) return -EFAULT; @@ -168,17 +171,20 @@ int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu, unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | rtype); - void *reg_val = NULL; size_t reg_size = KVM_REG_SIZE(reg->id); + void *reg_val; + int rc; - if (rtype == KVM_REG_RISCV_VECTOR && - riscv_isa_extension_available(isa, v)) { - reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size); - } - - if (!reg_val) + if (rtype != KVM_REG_RISCV_VECTOR) return -EINVAL; + if (!riscv_isa_extension_available(isa, v)) + return -ENOENT; + + rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_val); + if (rc) + return rc; + if (copy_from_user(reg_val, uaddr, reg_size)) return -EFAULT; From patchwork Thu Aug 3 16:33:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEC8BEB64DD for ; Thu, 3 Aug 2023 16:33:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234899AbjHCQdz (ORCPT ); Thu, 3 Aug 2023 12:33:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235559AbjHCQdx (ORCPT ); Thu, 3 Aug 2023 12:33:53 -0400 Received: from mail-oo1-xc36.google.com (mail-oo1-xc36.google.com [IPv6:2607:f8b0:4864:20::c36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF90B30E9 for ; Thu, 3 Aug 2023 09:33:35 -0700 (PDT) Received: by mail-oo1-xc36.google.com with SMTP id 006d021491bc7-56ccdb2c7bbso771725eaf.1 for ; Thu, 03 Aug 2023 09:33:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080415; x=1691685215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hAcynScOpmJJpAgbkOZYKn6ILQea1aDVBL6bd0lWO7g=; b=haTj4cAaQ8nuB3BJwgKbtJ0OIMlsmmaqEEgNYuTKVDphVbgFKb31Tab8roRlGPx8yS 2+i3SxJmvxI18SSZFmw8saZXidRJaMXNk3MxrdIdrW80ipC7CMKWW8PrGgFNULu+T/G0 FGVNORNa6WQ57Jo4xMIqxYSkNRoZl8PNtog1Sz+kWiI1ySJZ921HTMFPZdpX2nqFwqBe frOfwlP5XxNtAeIc2v97jbah4yiS5op25qjzwojLXkohpBpoAHiyZTotkANqvsCFYC0S qpUKNWj2iB52yBoSlrkE7kHWeQgp8Y0oS97eTb/qWKkfpErro9kJAII6ZsCuzOWn7h0q e7sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080415; x=1691685215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hAcynScOpmJJpAgbkOZYKn6ILQea1aDVBL6bd0lWO7g=; b=FgCjcQvK0QH6X+ytOVl0YSiDg0JRcqzuhfkZwAtv2oiUpz0tlFMUlUsa2wr2/judei x3yguLgHtDLba1e0+lNjlSQeHRdy0ocjKBw1Q7xcBDMY7VrfzDIwqpGSnevKqU4va4K6 hBwBNcLIH64BVDxjftjRDeaTpbQmhZY5GyXGUFOAgSiohbN65SEGA5zjDYKWHVnUbv9Y wweiWGf2mIV0K7HRPaHgbveGxEmlQVC/9gQVmectXFxqRSdVTsYkVKRm/XaRHOXYkG/z JepUuSihsmLnppVd2nsanpMlhYyrapvslZQvvfBGUQjEuVs38i0tcWcJIYbEYp5BCI+h cBDQ== X-Gm-Message-State: ABy/qLYYwwiwyPMboKh2V4bwDgYKwHiBl4zyPUn3USNO2Yfs1QRMDC1S yglDkIf4/wFVPxTpJmq4ulI7gw== X-Google-Smtp-Source: APBJJlHc0cp5LnSyKvcl8/Xw+xNk5PdlUVq5hrHnfnlDK7OkPy8wfOEtmrs1AxZnyGAB9fvEQliycA== X-Received: by 2002:a05:6808:e87:b0:3a3:ed69:331 with SMTP id k7-20020a0568080e8700b003a3ed690331mr23614574oil.6.1691080414812; Thu, 03 Aug 2023 09:33:34 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:34 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 10/10] docs: kvm: riscv: document EBUSY in KVM_SET_ONE_REG Date: Thu, 3 Aug 2023 13:33:02 -0300 Message-ID: <20230803163302.445167-11-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The EBUSY errno is being used for KVM_SET_ONE_REG as a way to tell userspace that a given reg can't be changed after the vcpu started. Signed-off-by: Daniel Henrique Barboza --- Documentation/virt/kvm/api.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index c0ddd3035462..3249fb56cc69 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2259,6 +2259,8 @@ Errors: EINVAL invalid register ID, or no such register or used with VMs in protected virtualization mode on s390 EPERM (arm64) register access not allowed before vcpu finalization + EBUSY (riscv) changing register value not allowed after the vcpu + has run at least once ====== ============================================================ (These error codes are indicative only: do not rely on a specific error