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([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:11 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 01/10] RISC-V: KVM: return ENOENT in *_one_reg() when reg is unknown Date: Thu, 3 Aug 2023 13:32:53 -0300 Message-ID: <20230803163302.445167-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093314_674566_35918811 X-CRM114-Status: GOOD ( 19.68 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org get_one_reg() and set_one_reg() are returning EINVAL errors for almost everything: if a reg doesn't exist, if a reg ID is malformatted, if the associated CPU extension that implements the reg isn't present in the host, and for set_one_reg() if the value being written is invalid. This isn't wrong according to the existing KVM API docs (EINVAL can be used when there's no such register) but adding more ENOENT instances will make easier for userspace to understand what went wrong. Existing userspaces can be affected by this error code change. We checked a few. As of current upstream code, crosvm doesn't check for any particular errno code when using kvm_(get|set)_one_reg(). Neither does QEMU. rust-vmm doesn't have kvm-riscv support yet. Thus we have a good chance of changing these error codes now while the KVM RISC-V ecosystem is still new, minimizing user impact. Change all get_one_reg() and set_one_reg() implementations to return -ENOENT at all "no such register" cases. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/aia.c | 4 ++-- arch/riscv/kvm/vcpu_fp.c | 12 ++++++------ arch/riscv/kvm/vcpu_onereg.c | 36 ++++++++++++++++++------------------ arch/riscv/kvm/vcpu_sbi.c | 16 +++++++++------- arch/riscv/kvm/vcpu_timer.c | 8 ++++---- 5 files changed, 39 insertions(+), 37 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 585a3b42c52c..74bb27440527 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -176,7 +176,7 @@ int kvm_riscv_vcpu_aia_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; *out_val = 0; if (kvm_riscv_aia_available()) @@ -192,7 +192,7 @@ int kvm_riscv_vcpu_aia_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (kvm_riscv_aia_available()) { ((unsigned long *)csr)[reg_num] = val; diff --git a/arch/riscv/kvm/vcpu_fp.c b/arch/riscv/kvm/vcpu_fp.c index 9d8cbc42057a..08ba48a395aa 100644 --- a/arch/riscv/kvm/vcpu_fp.c +++ b/arch/riscv/kvm/vcpu_fp.c @@ -96,7 +96,7 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -109,9 +109,9 @@ int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -141,7 +141,7 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) reg_val = &cntx->fp.f.f[reg_num]; else - return -EINVAL; + return -ENOENT; } else if ((rtype == KVM_REG_RISCV_FP_D) && riscv_isa_extension_available(vcpu->arch.isa, d)) { if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { @@ -154,9 +154,9 @@ int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu, return -EINVAL; reg_val = &cntx->fp.d.f[reg_num]; } else - return -EINVAL; + return -ENOENT; } else - return -EINVAL; + return -ENOENT; if (copy_from_user(reg_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 85773e858120..456e9f31441a 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -156,7 +156,7 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, reg_val = satp_mode >> SATP_MODE_SHIFT; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -242,7 +242,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, return -EINVAL; break; default: - return -EINVAL; + return -ENOENT; } return 0; @@ -262,7 +262,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc)) reg_val = cntx->sepc; @@ -273,7 +273,7 @@ static int kvm_riscv_vcpu_get_reg_core(struct kvm_vcpu *vcpu, reg_val = (cntx->sstatus & SR_SPP) ? KVM_RISCV_MODE_S : KVM_RISCV_MODE_U; else - return -EINVAL; + return -ENOENT; if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -295,7 +295,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -311,7 +311,7 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu, else cntx->sstatus &= ~SR_SPP; } else - return -EINVAL; + return -ENOENT; return 0; } @@ -323,7 +323,7 @@ static int kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { kvm_riscv_vcpu_flush_interrupts(vcpu); @@ -342,7 +342,7 @@ static int kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu, struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long)) - return -EINVAL; + return -ENOENT; if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) { reg_val &= VSIP_VALID_MASK; @@ -381,7 +381,7 @@ static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, ®_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -420,7 +420,7 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu, rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val); break; default: - rc = -EINVAL; + rc = -ENOENT; break; } if (rc) @@ -437,7 +437,7 @@ static int riscv_vcpu_get_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; *reg_val = 0; host_isa_ext = kvm_isa_ext_arr[reg_num]; @@ -455,7 +455,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, if (reg_num >= KVM_RISCV_ISA_EXT_MAX || reg_num >= ARRAY_SIZE(kvm_isa_ext_arr)) - return -EINVAL; + return -ENOENT; host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) @@ -489,7 +489,7 @@ static int riscv_vcpu_get_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id, ext_val; if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for (i = 0; i < BITS_PER_LONG; i++) { ext_id = i + reg_num * BITS_PER_LONG; @@ -512,7 +512,7 @@ static int riscv_vcpu_set_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id; if (reg_num > KVM_REG_RISCV_ISA_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for_each_set_bit(i, ®_val, BITS_PER_LONG) { ext_id = i + reg_num * BITS_PER_LONG; @@ -554,7 +554,7 @@ static int kvm_riscv_vcpu_get_reg_isa_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; @@ -592,7 +592,7 @@ static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -627,7 +627,7 @@ int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, break; } - return -EINVAL; + return -ENOENT; } int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, @@ -659,5 +659,5 @@ int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, break; } - return -EINVAL; + return -ENOENT; } diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 7b46e04fb667..9cd97091c723 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -140,8 +140,10 @@ static int riscv_vcpu_set_sbi_ext_single(struct kvm_vcpu *vcpu, const struct kvm_riscv_sbi_extension_entry *sext = NULL; struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; - if (reg_num >= KVM_RISCV_SBI_EXT_MAX || - (reg_val != 1 && reg_val != 0)) + if (reg_num >= KVM_RISCV_SBI_EXT_MAX) + return -ENOENT; + + if (reg_val != 1 && reg_val != 0) return -EINVAL; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { @@ -175,7 +177,7 @@ static int riscv_vcpu_get_sbi_ext_single(struct kvm_vcpu *vcpu, struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; if (reg_num >= KVM_RISCV_SBI_EXT_MAX) - return -EINVAL; + return -ENOENT; for (i = 0; i < ARRAY_SIZE(sbi_ext); i++) { if (sbi_ext[i].ext_idx == reg_num) { @@ -206,7 +208,7 @@ static int riscv_vcpu_set_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for_each_set_bit(i, ®_val, BITS_PER_LONG) { ext_id = i + reg_num * BITS_PER_LONG; @@ -226,7 +228,7 @@ static int riscv_vcpu_get_sbi_ext_multi(struct kvm_vcpu *vcpu, unsigned long i, ext_id, ext_val; if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) - return -EINVAL; + return -ENOENT; for (i = 0; i < BITS_PER_LONG; i++) { ext_id = i + reg_num * BITS_PER_LONG; @@ -272,7 +274,7 @@ int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_SBI_MULTI_DIS: return riscv_vcpu_set_sbi_ext_multi(vcpu, reg_num, reg_val, false); default: - return -EINVAL; + return -ENOENT; } return 0; @@ -307,7 +309,7 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu, reg_val = ~reg_val; break; default: - rc = -EINVAL; + rc = -ENOENT; } if (rc) return rc; diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 3ac2ff6a65da..527d269cafff 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -170,7 +170,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): @@ -187,7 +187,7 @@ int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu, KVM_RISCV_TIMER_STATE_OFF; break; default: - return -EINVAL; + return -ENOENT; } if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) @@ -211,7 +211,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, if (KVM_REG_SIZE(reg->id) != sizeof(u64)) return -EINVAL; if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) - return -EINVAL; + return -ENOENT; if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) return -EFAULT; @@ -233,7 +233,7 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, ret = kvm_riscv_vcpu_timer_cancel(t); break; default: - ret = -EINVAL; + ret = -ENOENT; break; } From patchwork Thu Aug 3 16:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 31093C04FE2 for ; Thu, 3 Aug 2023 16:33:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:13 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 02/10] RISC-V: KVM: use ENOENT in *_one_reg() when extension is unavailable Date: Thu, 3 Aug 2023 13:32:54 -0300 Message-ID: <20230803163302.445167-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093316_064277_A54B485C X-CRM114-Status: GOOD ( 11.94 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Following a similar logic as the previous patch let's minimize the EINVAL usage in *_one_reg() APIs by using ENOENT when an extension that implements the reg is not available. For consistency we're also replacing an EOPNOTSUPP instance that should be an ENOENT since it's an "extension is not available" error. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 456e9f31441a..1ffd8ac3800a 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -135,12 +135,12 @@ static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu, break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cbom_block_size; break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) - return -EINVAL; + return -ENOENT; reg_val = riscv_cboz_block_size; break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): @@ -459,7 +459,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, host_isa_ext = kvm_isa_ext_arr[reg_num]; if (!__riscv_isa_extension_available(NULL, host_isa_ext)) - return -EOPNOTSUPP; + return -ENOENT; if (!vcpu->arch.ran_atleast_once) { /* From patchwork Thu Aug 3 16:32:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88F19C04A6A for ; Thu, 3 Aug 2023 16:33:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=H9iD7DfvOs9ze3vy18thfoDV7qxVTAvmYi+kcHZQpos=; b=gwNYfIEIEKV+t6 hknrmwAmLIQRXB+AvbKFWJA8KLLTcqbFR1g/x+gTrua0SBvEShvqNxTdBOX8PtA1YlabGRKYgRwTd DSM38qHyl93bhZ0E0BkQ3zWYyitUBXpLxqyz71wQIn7gdrNb8QWO2T3TuPlZJctaMkGrV5ODxrpB8 99Q6iFHWwuKRc7NYtJnXNDoIt/ZV5RlJIrHCy+ZXq5f9zK8XBzgcIU1gtpWODK23L6iL3GL+FuU6L 7nhDI1hzNySf3oNciR1HvnuOcKVJ50UQ4U2pVMzjp+DCq/rRkBWsN2ZgD7TNt9546dMErB2/akgPx WDmOrAuW22cJB+UZsARw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGM-00AKYG-0X; Thu, 03 Aug 2023 16:33:22 +0000 Received: from mail-oa1-x2d.google.com ([2001:4860:4864:20::2d]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGI-00AKTz-3B for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:20 +0000 Received: by mail-oa1-x2d.google.com with SMTP id 586e51a60fabf-1bb7d1f7aeaso826047fac.1 for ; Thu, 03 Aug 2023 09:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080397; x=1691685197; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9fx5RruSr8XX/h9I2AtxnZ2PV0E5AQnOItUyD2ZQGSo=; b=OXVlIvxqZq/ugA1tq8HnCrf89IYbUi3eCY5Lw7klgG72620m39mehcGvLdVyg8XyzC m2SoQpwziTq7cySZd+Q4LKeLr6ZjPVep9YuOuiRsYcHZ21oia+3/B58NVbFXThBSXxro +ZftTWsJA6qUlshZf0K89f4vgs4nFbHNvi1Auv3VxjtLAOLCtIrHJl4b6vHKM8GyhiJD q9xMGGPOqIKCLnOvkIwOmKEs4NVy0KTcsN2vxA8omyt2IF3/7+U0kZomC/Aojok5VYn7 MWVlAumDQBlubFvgBOpBgQoQfJ/ApYfWdm/sXjcZ/eC8VLaUDFFrYDkQaUmff8ziH8Cu Iw+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080397; x=1691685197; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9fx5RruSr8XX/h9I2AtxnZ2PV0E5AQnOItUyD2ZQGSo=; b=HrfsTmpnVJ8TxJ1Taa1lFDzLOhyznfK6M0x1zQeNYGecSxB3JMSMLNjpJFu1qQnTAT N8EMomTaS61n+sE+JhjWaTzonA+DCDhgOF+ke5l/DJvT0Pbqvv5qtV8txPRnIKxz7MCH Fv+yeUqHc4Ogcug41DmFEr3yPVqOzrWQzRP1Tm/GXRaQ4Wu+3Gm6f+mK/PJsOn7CY6pC 0mvzhxcP3EEghtlN3cVBox29s3+sAufCTiuL//Eo66itXNKqTApCFhPW7AsEXNQdK8uZ zH3BfG1DysfJgT6oT/YTLT2Wxx8AxBTxjED2ssBTlX5A1FWVYmV6B2eyrhxEFtm9pPmK fBYg== X-Gm-Message-State: ABy/qLYgInZDTgqRrIZpNVD6fRtv3ruaHrZtI8UaTY3uAd47kxe0k6Z6 /wg3GGLi6ZyNudy5RHAzjEUGlg== X-Google-Smtp-Source: APBJJlGcRltldAfni3BfR3KZMxmiX5SNdIToiZOXvm/eqO5x/Ld7sy5xC6M5vBBDuRjgsANoD+hfWQ== X-Received: by 2002:a05:6870:4251:b0:1ba:199a:984a with SMTP id v17-20020a056870425100b001ba199a984amr21455947oac.55.1691080396728; Thu, 03 Aug 2023 09:33:16 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:16 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 03/10] RISC-V: KVM: do not EOPNOTSUPP in set_one_reg() zicbo(m|z) Date: Thu, 3 Aug 2023 13:32:55 -0300 Message-ID: <20230803163302.445167-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093319_024459_F8E4E082 X-CRM114-Status: GOOD ( 12.60 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org zicbom_block_size and zicboz_block_size have a peculiar API: they can be read via get_one_reg() but any write will return a EOPNOTSUPP. It makes sense to return a 'not supported' error since both values can't be changed, but as far as userspace goes they're regs that are throwing the same EOPNOTSUPP error even if they were read beforehand via get_one_reg(), even if the same read value is being written back. EOPNOTSUPP is also returned even if ZICBOM/ZICBOZ aren't enabled in the host. Change both to work more like their counterparts in get_one_reg() and return -ENOENT if their respective extensions aren't available. After that, check if the userspace is written a valid value (i.e. the host value). Throw an -EINVAL if that's not case, let it slide otherwise. This allows both regs to be read/written by userspace in a 'lazy' manner, as long as the userspace doesn't change the reg vals. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 1ffd8ac3800a..e06256dd8d24 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -216,9 +216,17 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) + return -ENOENT; + if (reg_val != riscv_cbom_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(zicboz_block_size): - return -EOPNOTSUPP; + if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ)) + return -ENOENT; + if (reg_val != riscv_cboz_block_size) + return -EINVAL; + break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): if (!vcpu->arch.ran_atleast_once) vcpu->arch.mvendorid = reg_val; From patchwork Thu Aug 3 16:32:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC96CEB64DD for ; Thu, 3 Aug 2023 16:33:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9Rndzeg5n4kzBwGk0QqSLLjHTJZ0Um2wDIBv87Wjiqk=; b=vrp3kzmz0YMToP hYLkBCSobUPsaI54/anziUBizLp851SyzgZ4IT9MnZvxLv+VXj8jY2ognkzPgiFRJWQGmTKkAcHD5 rlgb0CgtFOD3FtrMdyrSM9y2Ead74QmDzF0mKVtd1lkV8AKYEBH/7tMaqqWZ8PJPHgBNfFsJCv7aS 6wjrqu8aXSE+jYKG41cnWMqavlWwfeIqILegN2nYkHHIPlzEt3FRN+vWXiBC+fYY+F9H+67nfWIi/ TgKXXCytBawn/kiK5UCuSQ4N4Zh9zFyho9UKP0/QyVGexnHA+2luj6StQOrNBg2oynracLfU4eSON uEWxUyO8aq6hqiBecWbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGP-00AKcB-2w; Thu, 03 Aug 2023 16:33:25 +0000 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGM-00AKWO-18 for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:24 +0000 Received: by mail-ot1-x32c.google.com with SMTP id 46e09a7af769-6bb231f1817so928098a34.3 for ; Thu, 03 Aug 2023 09:33:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080399; x=1691685199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=layCgJMKTMdCi6CUwpGdosiF30u+gDMVAdsZicD45LuGPmu3PhVeuMEJrwDZikHCtY EtTtmqb7C2PaHl1fI73JUHKLNRChtqT12pdd82mW5dNPh/3mKpRlTKZ2/livS7Q6LaG4 LNh1FJ911hXWY+2HRLipzSeGe+ljI/mHCIltzEsUGGlDMY+QPdq/dXsKlN0kTezY6xVk tigGCb/4o2r4pQJo2q+eRLeEqmJeh2Zzxsjsam74y7Gm+ssjSi/wKl1BoAwkMGu7fcfk f9U1nYn2rPLB/TurCeF8Fit9kMuuLkpon/D/6/YmFiskWAeAXANYohA2ypdHxieUG9XT KOKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080399; x=1691685199; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fgDQfKgZT9Ai5Y6MxDXe+dFoAViK+yC0G5UtB2DQuPI=; b=AuMnQZxgwqKDMPvFFsPAHjFW0BUapL3U5af9BdrQQTmkMcTh5nFhuAe2z03wNCWOVg RQeHIrRsaPTpVnd+KL3A1xhT95oy6tuSrFkykxlLJx/wO5SRrVzYuColVBInC/eu+cjL Jx950Yrm1hpFDXzaMg97BJxPe2mSc3bi5hY+P4c0pnH5qIhz4McV0e6/zb4bBNSkUu51 k08jMXA0v28K3KJDRgO57IHJpT0rkh4cPM7INzJNOnvGWFHuC7GCqZfgEYY0JQCvnK8s LRDdgtHJ9htnc5gdse4x6x0o9nKj+yWZfV7ELI9EjTk8tCL1mNQCK80zBs2GBAarhWe+ HA+Q== X-Gm-Message-State: ABy/qLYYkxcShCPlpjrlCxJ3BtIQtruPg0Dhe/wuO4E3Wo6lws1wqnus HlrhQNUa74cxvlQ1aKha30hMMg== X-Google-Smtp-Source: APBJJlG0rs3nKhuYYR5c82UKA4Dk+/x0du7zwqROz1SCshYkrDRGHKOreX+5liY/Az2sNnl2PH+VLg== X-Received: by 2002:a05:6870:a90b:b0:1be:f721:db04 with SMTP id eq11-20020a056870a90b00b001bef721db04mr11116042oab.4.1691080399322; Thu, 03 Aug 2023 09:33:19 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:18 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 04/10] RISC-V: KVM: do not EOPNOTSUPP in set KVM_REG_RISCV_TIMER_REG Date: Thu, 3 Aug 2023 13:32:56 -0300 Message-ID: <20230803163302.445167-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093322_451852_35C50850 X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The KVM_REG_RISCV_TIMER_REG can be read via get_one_reg(). But trying to write anything in this reg via set_one_reg() results in an EOPNOTSUPP. Change the API to behave like cbom_block_size: instead of always erroring out with EOPNOTSUPP, allow userspace to write the same value (riscv_timebase) back, throwing an EINVAL if a different value is attempted. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 527d269cafff..75486b25ac45 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -218,7 +218,8 @@ int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu, switch (reg_num) { case KVM_REG_RISCV_TIMER_REG(frequency): - ret = -EOPNOTSUPP; + if (reg_val != riscv_timebase) + return -EINVAL; break; case KVM_REG_RISCV_TIMER_REG(time): gt->time_delta = reg_val - get_cycles64(); From patchwork Thu Aug 3 16:32:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55B8EC04E69 for ; Thu, 3 Aug 2023 16:33:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/fkcV4FOZsUNhqceeocv7NPHOe+tLliExxp/Y04xUWg=; b=yMgtb+2VO2VjTC qpdxrip/KcnATq64aZvj6re3xH+OAj2JEDdZcIBt7D3ngtAA/ZK5t9SSGKNqzDGWmazrVT57oKztz 0SxoSFn/iE0Nv1eq+a3Vj/uDQx/pxhlMLm5SrbgvdNwIaNRJbe45odvrf+MLHTGcqur67Ywl6r0o8 YvwIO8r1wKrPasQRMtVjn5cFz6+P8/osPPaohZFeSNTejffWpjJiCJOQxxleYqUaouqGQd6Rvb0r9 BhwQWut5vC2fjovCiZDaZ8zluyhe8PucGwH6aMhvzvnF+nDOMfCJ56IAGIRehKkWzihWk8IdErNFz 8ooPWTo9KHTdxQinJs3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGR-00AKe0-2U; Thu, 03 Aug 2023 16:33:27 +0000 Received: from mail-ot1-x335.google.com ([2607:f8b0:4864:20::335]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGP-00AKYS-0O for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:26 +0000 Received: by mail-ot1-x335.google.com with SMTP id 46e09a7af769-6bcccbd9365so538359a34.2 for ; Thu, 03 Aug 2023 09:33:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080402; x=1691685202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JEYaOjRkNiCc5Arsd3SH+zFXne751CxcbC3uwvEPq2E=; b=nDqgSReQn24+I/TOy7vw45dSl5z0FFfSL4cVqGNwP0d0zlHKuSGsFLdlXng8abhd7q J/hIudebRlWXVsf5f0chJQEScgO6UFi5gVeNqlnnZiv2ktY3ija7neMd+GJvW0qGS1Jb DN/Lkjj+so6bSseF3VG9x1Iv5wSJBqV+r3vRnBaSLqTlALDqRIrv/SE7nwNjFfVks0le MlS1wKRpXnFKpEXXvZGPXh19Q5Z/jg4quL0E7sJ78ZvGrILu4tBaq1VWB52uM6PC8OR5 0+S6IpNYUS9AuCti4m7DjFcI+0YMKAxr4QchZW+qSPitKjCVCr6b19wKbYHvRzS8qPk/ x1QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080402; x=1691685202; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEYaOjRkNiCc5Arsd3SH+zFXne751CxcbC3uwvEPq2E=; b=LHdbDVgHFZzS3i6zA2Bm8UpE1ZUkCE7pH3Nsrl+xWEIwnEmGRLr9eKE/rCrKVTSebs 08Yfk8y11cL682+ontTMoUwaeEcyVGkXuSRRn9SD6z6KB9JlUGpSiVGiTPDa9QGrERfa n4VDWGWfNhTbtyRpvej+dxeFgNMJJ7k2B2Sh8W7VJA92h078VEfaLYmt3D8DY0jatAr4 mTgBHzBqBxHjD6WSpSYyob7TVs9fTG/1S43yA2+AsK1TzfGyslUNNYQ+n8W8858I5sjI MNgtjDBTVOdH0NCmPNewF//oD/b6HI6q55lwqumJvlj9VQCF2mkbmI/T08Fo76w6QsD4 HMxQ== X-Gm-Message-State: ABy/qLYBCL56t1ENG+N6AQJtdSo4b8LzqmiwSom3CP7j+AefSnBNFtEt JEOnBQ7ze2HljC3BQfPiNTtydg== X-Google-Smtp-Source: APBJJlGKhxjt9ppMdXXgRQCK3rogM/kWokH5xOaV/O6CG2pZlKZm+depQdkRXmyceKMNzwj0pPo86Q== X-Received: by 2002:a05:6808:1144:b0:3a7:4cf6:f0cb with SMTP id u4-20020a056808114400b003a74cf6f0cbmr10603918oiu.21.1691080402043; Thu, 03 Aug 2023 09:33:22 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:21 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 05/10] RISC-V: KVM: use EBUSY when !vcpu->arch.ran_atleast_once Date: Thu, 3 Aug 2023 13:32:57 -0300 Message-ID: <20230803163302.445167-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093325_189567_05CBD854 X-CRM114-Status: GOOD ( 10.87 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org vcpu_set_reg_config() and vcpu_set_reg_isa_ext() is throwing an EOPNOTSUPP error when !vcpu->arch.ran_atleast_once. In similar cases we're throwing an EBUSY error, like in mvendorid/marchid/mimpid set_reg(). EOPNOTSUPP has a conotation of finality. EBUSY is more adequate in this case since its a condition/error related to the vcpu lifecycle. Change these EOPNOTSUPP instances to EBUSY. Suggested-by: Andrew Jones Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index e06256dd8d24..971a2eb83180 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -212,7 +212,7 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, vcpu->arch.isa[0] = reg_val; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } break; case KVM_REG_RISCV_CONFIG_REG(zicbom_block_size): @@ -484,7 +484,7 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, return -EINVAL; kvm_riscv_vcpu_fp_reset(vcpu); } else { - return -EOPNOTSUPP; + return -EBUSY; } return 0; From patchwork Thu Aug 3 16:32:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44F5FC04A6A for ; Thu, 3 Aug 2023 16:33:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=c0Yt26qZpbBWMJLL0xKhtJc1ZJLRYcc7dwDEMwHhCJc=; b=TLrAS8aTmrbKOS VRwSwE6d/IQg9FLd7fK/j0R4k/3ShsoCxjlPn6Rn+tuATyZzVbXhFq/ahTGqwqZ/D6nuVTTnqZshh HucMjW1BrJyQbDx5Nr1TL3CtSIPLq1RvxlbSjqTNr5UuXYgnR1bsTPXbgvh3QnCR7B806bSKJmv8M CFPU4yGehUjrR1ZV2EWhPapErLoBVbq0ai/s33fFUNTNFLEaXNlFughCXuAGCLrILBtpZ3Rncdh5+ UXox3j35c+M8D25zc1MqJexgQcZSz3DGM3mDFgE+3h7RdotIgW+Y6w+ukEDfsgm1SQRInxBo0CRTY /7KSAfUV2NpsbjKHb+WA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGU-00AKgq-2J; Thu, 03 Aug 2023 16:33:30 +0000 Received: from mail-oa1-x2c.google.com ([2001:4860:4864:20::2c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGQ-00AKay-26 for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:28 +0000 Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-1bf0c4489feso834964fac.0 for ; Thu, 03 Aug 2023 09:33:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080404; x=1691685204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mu19x8hfUH10MYfTjpP1RF1Ut52SK1pMVXhmwflqSgo=; b=TpvWicxWFYBiktBxgQXprDfHQhi710ZNwh4iGPKDpbCU/Bvhfjek9JiF1dQ2N3M/fS Ph39nnqBvjqk+T1167JKk+ymWTagirpcR2W3t9daD/GyK/yB5qEDfw0L7YEg1AzITc4H Q3okzjb0hoB55w56MJp7/rUu9OMylkceruThMCRTUQw5doWxdoeOOh8CX5bHRipt0pjq +ecomc3SRll5frP13G8eqWLz6x/Ln1sDXaIMCP7UXAZgIKkYxre/m3CqJCFAmgmxyUVd s9U2tYKlZozhRjwUXaFzen8vTx3VI+Z3Hq1X3dP4pO7my5+oU0awjlkxQHx1BNofnJrS svHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080404; x=1691685204; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mu19x8hfUH10MYfTjpP1RF1Ut52SK1pMVXhmwflqSgo=; b=WTka7/4eRSguKsfI6J5Krzxu2OzixhBjDWEPLZa54/3jFmw+XN3lDovcrJWbOchrri l8Gwz/nk3BWEu93yFL06biowHfofCfdkqBKiPCuTGt782/ApqXmkdhLZi/AIUT4zxhTH cQHz2oB0UWcD/TuBNePtT32CB5DUZd2rgHbdaLPT3sgdVDwaxQAmrj5C3tAAKNCu2oPK oEOrDNlTb9ywGld30QmNKuaiBhZdvIzRsCOap3Dvna2TkahUNZi7630R9LI3ru4GbcuH cgM5vhoNTMIGeAE2nycEvqdMO+E5DPMnYPOD+6Lyv2Ul07KVlSkKSfFzjwFmPDU0PceH CxIA== X-Gm-Message-State: ABy/qLZvRvibBMgeJiD8nHgZ2P3ooB6Oku9fiV+RSfimWaEirzM/pbpE pLhB1UXnm9Xg0zOQRJcHXDAAcRjF6kK3t8CFKlf0bg== X-Google-Smtp-Source: APBJJlG263MxMOlhWr+lUKGc/wweZv2EVJn1qhDZ7kk7BlzsBVSKt9RLtfuD9s11IUfZLBrI6BZ4Pg== X-Received: by 2002:a05:6870:970f:b0:1b7:1904:1ad9 with SMTP id n15-20020a056870970f00b001b719041ad9mr22111121oaq.53.1691080404645; Thu, 03 Aug 2023 09:33:24 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:24 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 06/10] RISC-V: KVM: avoid EBUSY when writing same ISA val Date: Thu, 3 Aug 2023 13:32:58 -0300 Message-ID: <20230803163302.445167-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093326_756703_6D8CB96C X-CRM114-Status: GOOD ( 11.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org kvm_riscv_vcpu_set_reg_config() will return -EBUSY if the ISA config reg is being written after the VCPU ran at least once. The same restriction isn't placed in kvm_riscv_vcpu_get_reg_config(), so there's a chance that we'll -EBUSY out on an ISA config reg write even if the userspace intended no changes to it. We'll allow the same form of 'lazy writing' that registers such as zicbom/zicboz_block_size supports: avoid erroring out if userspace made no changes to the ISA config reg. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 971a2eb83180..a0b0364b038f 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -190,6 +190,13 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, if (fls(reg_val) >= RISCV_ISA_EXT_BASE) return -EINVAL; + /* + * Return early (i.e. do nothing) if reg_val is the same + * value retrievable via kvm_riscv_vcpu_get_reg_config(). + */ + if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK)) + break; + if (!vcpu->arch.ran_atleast_once) { /* Ignore the enable/disable request for certain extensions */ for (i = 0; i < RISCV_ISA_EXT_BASE; i++) { From patchwork Thu Aug 3 16:32:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 300BCEB64DD for ; Thu, 3 Aug 2023 16:33:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ttqdsDixgCk0GOeeBOp2dQ/3dXtPxSlylvkWPrr0w5c=; b=Qqa8YmmETS4u/u aeotiXrHL7rMZMS0dWIT2fbQcjwysXEzfQ5HepE+KIubhWOxugblOOwSyXZhDSM/fgTIVYI12r2+n NvJIJ8OjHAVG6sH+2fS6IfrvTILzPGf+R1nLeYm1cSf22ADIE+FZZm46KtxgJ/B195ewXlFgG10qM gcwKtylthGltcfgpaFqF4nn3wUv5V9mLTNnWInQ7SxpGCvS02Qns1FNC4f7SHcrRNPMV4kj3FCmNU +X/KOngms56NPpkVu9cXz0N7rSHu3WA3la1tVH0cpUV22L+Gk0lRZHFF3r8lSkh/q16YO7LSvpYJY McDo4Vvb9jg3WNxzrOug==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGX-00AKjl-0b; Thu, 03 Aug 2023 16:33:33 +0000 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGU-00AKdq-0x for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:31 +0000 Received: by mail-ot1-x32d.google.com with SMTP id 46e09a7af769-6bb29b9044dso1122703a34.1 for ; Thu, 03 Aug 2023 09:33:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080407; x=1691685207; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qX6uX+zjhMvlxZ1l4PideJKUAkuckmjO6QKloArzLfk=; b=R94Jg27ghBMe+8pXyv0yNEDs0bC953tVdWKPFV6vA4TGK6rzvTc09Y52RVPgfdp0mG /6RpDcjZJW5laVWp2iBMOuPs7dwUeHIQtpV5sa9d9dlTN46QrCnnjJj9ru1HkA4X352q yc/y/mPR/WIKSfMgrK8ovU1adcSD6tkSp40mcP9J7vrEGVnAmmhfkSZXzfXrwd3n7X/t gzrPj9TuiW6ucIgg4GJ1+QGG50bQEbJBTUPNS0y9nhC5FmNRMHevTeDy+1nHyRKbh9c1 X0GCHHwVFuZUWQvVbYcCldacF/7YPRwWHAzsjpNDxUZ3pS2+6S61CZgDWf7oYL4Yb04h +SXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080407; x=1691685207; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qX6uX+zjhMvlxZ1l4PideJKUAkuckmjO6QKloArzLfk=; b=gLctptbiTyhSZ5R6DURXA1AWx4i6LaaELZaLxBRpYFDI9LBSe6g6naqWoAzutJgsK/ EbeMrpTCWPvaBVEnAvhTBHe0JV7M2onN6tAo7ziTwYGX8q0iN00kKxsxQJsANQAUcD5G hLs9LaDeCASGhyIl58ZKUTbipw2tPBX5mE4CfSiRTum9qeO2CxKLGIt9bT59akxbgGk1 Z6GMhR98CusEiDpq3JrDAL0JgWhTzHKDnbnmyO3CZUpOLjIKvoSC6z4trlQ6LPbNRKXj jS7I9Zyp7BhfEnvqmTcrvc6VRnqOd+YSKqfcEfJcvzbZbx8LlwM27hRikmNgh9kjJaXV 1pgA== X-Gm-Message-State: ABy/qLZv2ZKDPIt7fpQitH7xfbOsbvK4KPfsHw8meRiKBe7z49y+qeQW rfJcVjEZTPA1dB5BJLn1yqD9Bqtd3HJny/+HS1wRlQ== X-Google-Smtp-Source: APBJJlF4UpvVSQIIhQhdxGLDKP5P6kayfkJ70CHnvKXEJ6xr3Aa4W68v/I+nOVn2bKwzsQK9klklyA== X-Received: by 2002:a05:6870:f583:b0:1ba:f2eb:baa3 with SMTP id eh3-20020a056870f58300b001baf2ebbaa3mr21860578oab.3.1691080407296; Thu, 03 Aug 2023 09:33:27 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:26 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 07/10] RISC-V: KVM: avoid EBUSY when writing the same machine ID val Date: Thu, 3 Aug 2023 13:32:59 -0300 Message-ID: <20230803163302.445167-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093330_351129_8E214984 X-CRM114-Status: UNSURE ( 9.96 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Right now we do not allow any write in mvendorid/marchid/mimpid if the vcpu already started, preventing these regs to be changed. However, if userspace doesn't change them, an alternative is to consider the reg write a no-op and avoid erroring out altogether. Userpace can then be oblivious about KVM internals if no changes were intended in the first place. Allow the same form of 'lazy writing' that registers such as zicbom/zicboz_block_size supports: avoid erroring out if userspace makes no changes in mvendorid/marchid/mimpid during reg write. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index a0b0364b038f..81cb6b2784db 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -235,18 +235,24 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, return -EINVAL; break; case KVM_REG_RISCV_CONFIG_REG(mvendorid): + if (reg_val == vcpu->arch.mvendorid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.mvendorid = reg_val; else return -EBUSY; break; case KVM_REG_RISCV_CONFIG_REG(marchid): + if (reg_val == vcpu->arch.marchid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.marchid = reg_val; else return -EBUSY; break; case KVM_REG_RISCV_CONFIG_REG(mimpid): + if (reg_val == vcpu->arch.mimpid) + break; if (!vcpu->arch.ran_atleast_once) vcpu->arch.mimpid = reg_val; else From patchwork Thu Aug 3 16:33:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32945C001DF for ; Thu, 3 Aug 2023 16:33:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JHU3zUrybZhx3eZQ52iJ7w2SC2Gvi+ogonhF2uNsOKo=; b=TYytD1WqWLh47+ MtY/dAlWG9p6wbl06sKgqrjk0atYUpCN0mDaI4towpCPiCw6iU47Xq13ZIUfH9A4rFTii4N6cP4vP /0uToTX8PzQ1WM8xPYnnwXbJR0zjLaqO6+spdcU3Cze5lQrBlSKtCSSjdQFuYW+xpzDYARGFXtb2F feHlIFbewH3Wa+tppLQbsUswfUUmtI179j0bds86mxbiJb1qAgIxQssJuyZbjSsonj1yjePWTX2Rj qX5F1LLqO9Egbg28X3BN8FSDDoNsb7bwFGNYtZXW4bFCbTCCFD/EE5gFtD1vG0S0S5lWU6qTUkMmG KYzzVH+oAACuz5bceNQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGZ-00AKnq-2X; Thu, 03 Aug 2023 16:33:35 +0000 Received: from mail-oa1-x31.google.com ([2001:4860:4864:20::31]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGV-00AKg4-2b for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:33 +0000 Received: by mail-oa1-x31.google.com with SMTP id 586e51a60fabf-1bf0c4489feso835056fac.0 for ; Thu, 03 Aug 2023 09:33:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080410; x=1691685210; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Uu7FCUVMhVtaI44cD7BULzw6bJMgB622Gr+5DTVj+Bo=; b=e12fuyl/YeJW953kPJERxGswpaMryJfjjQq5sl9Yem3wu5CKheDWM4PHRd9wrva1/v 4sYjysYxyTzeleQoRLmGAoIrz6i53KB+5pN6QEBvd8YGCnmqAOwXRvk5TL1Fzvrad8NZ ztbHG14xtJX9GlwW/5i12PKzkbjbEq6nfInqEgx6E5fd48liIlI8S4OdfhvWCBR67rYq MWhWNtPXtZXtA/bHvzvlxSHgdSLNJZvV2LUCzFG+I+clFEb0kwbpKgzJN/DPJDsR77G9 b5Yhc+yuvmgyx8fhHM1LNsOkHTADyBKnOe0cxx1yCnmadGe/wMkfpiLrk4uVmD2WGAQh vwCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080410; x=1691685210; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Uu7FCUVMhVtaI44cD7BULzw6bJMgB622Gr+5DTVj+Bo=; b=LsViza2UEtdb5ySBmU/ibWpD5QPq2FDGle4H+E+gg5PLT1O0dO1e1Upc8wZq2O5vt8 uiUVuQ9j9ka26qTk0i+EOr5cUfahcj9IWPgaT/2+ZOH/RBRfudBcSolTIWGTJS9Dyqmc ottey1Z5Lnu4b1n960YQuI+9wa3+E7FGI2BGxd5v+dFb6cNJ/zxi2GHZtYuyLmDLsU89 RKjoBJCyVY9IxIa99hcfl6BDdKSEvSObdYk9b0W347yTh8ruJ+zg/N/TBJYgeHH48hqt NNOV94HGPHC+pozFwxy0bpfl2pkVB6/O0iBU/CY74rE2VYEyIykFeib0vaqPJOAvxpFx K3Bg== X-Gm-Message-State: ABy/qLbD0z6WvNzcUAmbKfaDUwHBd9hS842I+t8SHQaLVD/vycBInPwt OUiY/EvjBHYos87SutOScoYIbQ== X-Google-Smtp-Source: APBJJlGwoCOFRPCchOHL4r61LhHvmGfZ6gIxkUR9qlClLMHYy95T1Eeoqxo6LJktGRsLHTWo1iCCLg== X-Received: by 2002:a05:6871:283:b0:1bb:5af8:701f with SMTP id i3-20020a056871028300b001bb5af8701fmr17924948oae.23.1691080409822; Thu, 03 Aug 2023 09:33:29 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:29 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 08/10] RISC-V: KVM: avoid EBUSY when writing the same isa_ext val Date: Thu, 3 Aug 2023 13:33:00 -0300 Message-ID: <20230803163302.445167-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093331_889367_D76246CD X-CRM114-Status: GOOD ( 10.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org riscv_vcpu_set_isa_ext_single() will prevent any write of isa_ext regs if the vcpu already started spinning. But if there's no extension state (enabled/disabled) made by the userspace, there's no need to -EBUSY out - we can treat the operation as a no-op. zicbom/zicboz_block_size, ISA config reg and mvendorid/march/mimpid already works in a more permissive manner w.r.t userspace writes being a no-op, so let's do the same with isa_ext writes. Signed-off-by: Daniel Henrique Barboza --- arch/riscv/kvm/vcpu_onereg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 81cb6b2784db..989ea32dbcbe 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -482,6 +482,9 @@ static int riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, if (!__riscv_isa_extension_available(NULL, host_isa_ext)) return -ENOENT; + if (reg_val == test_bit(host_isa_ext, vcpu->arch.isa)) + return 0; + if (!vcpu->arch.ran_atleast_once) { /* * All multi-letter extension and a few single letter From patchwork Thu Aug 3 16:33:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13340331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 487C7C04E69 for ; Thu, 3 Aug 2023 16:33:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y40hNxT1YH+6swgVTyNDEv89unwcREGnsR+v49jtIvM=; b=39o9ZDho1Aqzh6 m46oVySf2MPPHMI9G9QrXr3u4BkCrKl0LZMRGo6WCwtRPECq7xLzS3CwhVsi4Q+fv7RAKlrmf0v0c XDt94N7uYSCDorkLB9tBNNA8YhD2ppoTR0/JWkXTLFxPJQlqpT9xSb8QVUHG3sEzr1zDWVMyKX/mo HeWMypiR93MTX1IwnwBZoiO74w83gfmhe/nio8IGVgA3a0POngwOp9hKUhFOlgNZEZwPknvXYIJox dZr/mxqNCWZs5XfJsQKXoVWgBs4zTxWSY03G5/n4Q2SXypLXhxMW8Ienf4GTRSLwlpi0JtuV3EyTQ rxFi4EogGsZiDszY8r7w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGb-00AKq2-2A; Thu, 03 Aug 2023 16:33:37 +0000 Received: from mail-oi1-x22e.google.com ([2607:f8b0:4864:20::22e]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRbGY-00AKjI-1F for linux-riscv@lists.infradead.org; Thu, 03 Aug 2023 16:33:35 +0000 Received: by mail-oi1-x22e.google.com with SMTP id 5614622812f47-3a74d759bfcso888728b6e.1 for ; Thu, 03 Aug 2023 09:33:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1691080412; x=1691685212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EkwDk8dXju8I9w7KpYFAws21Qd1+OBzn/0afxgdVQLI=; b=N6eD3D+2ZGDTGKs0uoKUQflxUg0CRszU0wYcEX1ODl11fo+EjpZB5bT8npzJM5ItSe 9OKx0XMOTuDUsslrgxtturtBHw7YNozWeasDIk+elGxIOUREq4cDP0XBzmmlL5qkMagz niXg4nabm1nFAYLle3gbBiYpYT0CLVnpxBCdVwDAr3xvO+nlp6ptob8r90iCHhj9yFro RqLfhQ3aC5xruAhvY5WjGP1ejgj93gqrtelZcVdCGOBvrNJ6W2G5BjRt53sfnu/biBJC UOrdkP+U29Ha2CplC/nEgI07aZRZUB+umL+Tzw9iDcAyE04EC1VPn8aZ4KvMRqqkT39v L7PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691080412; x=1691685212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EkwDk8dXju8I9w7KpYFAws21Qd1+OBzn/0afxgdVQLI=; b=f89crrwXY1ea1sLgZeApkV4AJUEgGCTLIZ/4jtJUmRZbaSJJPuNw6YxarJkd/vxYiV HA8CVgAO9pz49p9WkBUa68i8z57rIGOFuTV+cLL9nildw2lgd5Txj++8CantQdnu5FGG M0ySA8R8bakq71F9o31USrdgDggpNEDV+VbhnAia2h+hdNf98yZcEG/lmPs9z00/+RYM tli0DG6m/bV/sfnjcXfaoJYF+EPypto7m2+wiRWvXPabmr+baL8m5LnQCF/rjTLqEWw4 1TyYjCiI0lOIBdX8/1zZn46OiPTSgcf28xnMCGxo+gou8w+fWd0Gku1DvyQi8iqp22Xv GBOQ== X-Gm-Message-State: ABy/qLYkh1Sjbxv3FUIUkycyJS1gDLzbVRGy3Ginas3DTFya7oNrfmUt Ng3+knpI2SBvY9FKlXtsgF3iag== X-Google-Smtp-Source: APBJJlEq0uC7OWZ+6nYyMbSifB7fjfEM6gJvhiWUQN3f23VfZ00dVOJUMOBYDODSu4FG2ATfbt524w== X-Received: by 2002:a05:6808:f11:b0:3a1:dd99:8158 with SMTP id m17-20020a0568080f1100b003a1dd998158mr23751679oiw.6.1691080412183; Thu, 03 Aug 2023 09:33:32 -0700 (PDT) Received: from grind.. ([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:31 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com Subject: [PATCH v4 09/10] RISC-V: KVM: Improve vector save/restore errors Date: Thu, 3 Aug 2023 13:33:01 -0300 Message-ID: <20230803163302.445167-10-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093334_477737_A293D660 X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Andrew Jones kvm_riscv_vcpu_(get/set)_reg_vector() now returns ENOENT if V is not available, EINVAL if reg type is not of VECTOR type, and any error that might be thrown by kvm_riscv_vcpu_vreg_addr(). Signed-off-by: Andrew Jones --- arch/riscv/kvm/vcpu_vector.c | 60 ++++++++++++++++++++---------------- 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/arch/riscv/kvm/vcpu_vector.c b/arch/riscv/kvm/vcpu_vector.c index edd2eecbddc2..39c5bceb4d1b 100644 --- a/arch/riscv/kvm/vcpu_vector.c +++ b/arch/riscv/kvm/vcpu_vector.c @@ -91,44 +91,44 @@ void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu) } #endif -static void *kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, +static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, unsigned long reg_num, - size_t reg_size) + size_t reg_size, + void **reg_val) { struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; - void *reg_val; size_t vlenb = riscv_v_vsize / 32; if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) { if (reg_size != sizeof(unsigned long)) - return NULL; + return -EINVAL; switch (reg_num) { case KVM_REG_RISCV_VECTOR_CSR_REG(vstart): - reg_val = &cntx->vector.vstart; + *reg_val = &cntx->vector.vstart; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vl): - reg_val = &cntx->vector.vl; + *reg_val = &cntx->vector.vl; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vtype): - reg_val = &cntx->vector.vtype; + *reg_val = &cntx->vector.vtype; break; case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr): - reg_val = &cntx->vector.vcsr; + *reg_val = &cntx->vector.vcsr; break; case KVM_REG_RISCV_VECTOR_CSR_REG(datap): default: - return NULL; + return -ENOENT; } } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) { if (reg_size != vlenb) - return NULL; - reg_val = cntx->vector.datap + return -EINVAL; + *reg_val = cntx->vector.datap + (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb; } else { - return NULL; + return -ENOENT; } - return reg_val; + return 0; } int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, @@ -141,17 +141,20 @@ int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | rtype); - void *reg_val = NULL; size_t reg_size = KVM_REG_SIZE(reg->id); + void *reg_val; + int rc; - if (rtype == KVM_REG_RISCV_VECTOR && - riscv_isa_extension_available(isa, v)) { - reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size); - } - - if (!reg_val) + if (rtype != KVM_REG_RISCV_VECTOR) return -EINVAL; + if (!riscv_isa_extension_available(isa, v)) + return -ENOENT; + + rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_val); + if (rc) + return rc; + if (copy_to_user(uaddr, reg_val, reg_size)) return -EFAULT; @@ -168,17 +171,20 @@ int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu, unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | rtype); - void *reg_val = NULL; size_t reg_size = KVM_REG_SIZE(reg->id); + void *reg_val; + int rc; - if (rtype == KVM_REG_RISCV_VECTOR && - riscv_isa_extension_available(isa, v)) { - reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size); - } - - if (!reg_val) + if (rtype != KVM_REG_RISCV_VECTOR) return -EINVAL; + if (!riscv_isa_extension_available(isa, v)) + return -ENOENT; + + rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_val); + if (rc) + return rc; + if (copy_from_user(reg_val, uaddr, reg_size)) return -EFAULT; From patchwork Thu Aug 3 16:33:02 2023 Content-Type: text/plain; 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([187.11.154.63]) by smtp.gmail.com with ESMTPSA id y5-20020a056870428500b001bb71264dccsm152929oah.8.2023.08.03.09.33.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Aug 2023 09:33:34 -0700 (PDT) From: Daniel Henrique Barboza To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: anup@brainfault.org, atishp@atishpatra.org, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v4 10/10] docs: kvm: riscv: document EBUSY in KVM_SET_ONE_REG Date: Thu, 3 Aug 2023 13:33:02 -0300 Message-ID: <20230803163302.445167-11-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803163302.445167-1-dbarboza@ventanamicro.com> References: <20230803163302.445167-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230803_093336_972584_46FB08AA X-CRM114-Status: UNSURE ( 8.89 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The EBUSY errno is being used for KVM_SET_ONE_REG as a way to tell userspace that a given reg can't be changed after the vcpu started. Signed-off-by: Daniel Henrique Barboza --- Documentation/virt/kvm/api.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index c0ddd3035462..3249fb56cc69 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2259,6 +2259,8 @@ Errors: EINVAL invalid register ID, or no such register or used with VMs in protected virtualization mode on s390 EPERM (arm64) register access not allowed before vcpu finalization + EBUSY (riscv) changing register value not allowed after the vcpu + has run at least once ====== ============================================================ (These error codes are indicative only: do not rely on a specific error