From patchwork Mon Aug 7 05:19:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwei Liu X-Patchwork-Id: 13342996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 938D4C001DB for ; Mon, 7 Aug 2023 05:19:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229534AbjHGFTq (ORCPT ); Mon, 7 Aug 2023 01:19:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229841AbjHGFTp (ORCPT ); Mon, 7 Aug 2023 01:19:45 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16BEF1722; Sun, 6 Aug 2023 22:19:40 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3775JDpj015992; Mon, 7 Aug 2023 13:19:13 +0800 (+08) (envelope-from Kaiwei.Liu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx07.spreadtrum.com [10.0.1.12]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RK4M50K7xz2P5F6B; Mon, 7 Aug 2023 13:17:21 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx07.spreadtrum.com (10.0.1.12) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 7 Aug 2023 13:19:11 +0800 From: Kaiwei Liu To: Vinod Koul , Orson Zhai , Baolin Wang , Chunyan Zhang CC: , , kaiwei liu , Wenming Wu Subject: [PATCH 1/5] dma: delect redundant parameter for dma driver function Date: Mon, 7 Aug 2023 13:19:07 +0800 Message-ID: <20230807051907.2713-1-kaiwei.liu@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx07.spreadtrum.com (10.0.1.12) X-MAIL: SHSQR01.spreadtrum.com 3775JDpj015992 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The parameter *sdesc in function sprd_dma_check_trans_done is not used, so here delect redundant parameter. Signed-off-by: Kaiwei Liu Reviewed-by: Baolin Wang --- drivers/dma/sprd-dma.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index 2b639adb48ba..20c3cb1ef2f5 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -572,8 +572,7 @@ static void sprd_dma_stop(struct sprd_dma_chn *schan) schan->cur_desc = NULL; } -static bool sprd_dma_check_trans_done(struct sprd_dma_desc *sdesc, - enum sprd_dma_int_type int_type, +static bool sprd_dma_check_trans_done(enum sprd_dma_int_type int_type, enum sprd_dma_req_mode req_mode) { if (int_type == SPRD_DMA_NO_INT) @@ -619,8 +618,7 @@ static irqreturn_t dma_irq_handle(int irq, void *dev_id) vchan_cyclic_callback(&sdesc->vd); } else { /* Check if the dma request descriptor is done. */ - trans_done = sprd_dma_check_trans_done(sdesc, int_type, - req_type); + trans_done = sprd_dma_check_trans_done(int_type, req_type); if (trans_done == true) { vchan_cookie_complete(&sdesc->vd); schan->cur_desc = NULL; From patchwork Mon Aug 7 05:20:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwei Liu X-Patchwork-Id: 13342997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B3DFEB64DD for ; Mon, 7 Aug 2023 05:20:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229720AbjHGFUm (ORCPT ); Mon, 7 Aug 2023 01:20:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjHGFUm (ORCPT ); Mon, 7 Aug 2023 01:20:42 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F10A1703; Sun, 6 Aug 2023 22:20:40 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3775KJin020082; Mon, 7 Aug 2023 13:20:19 +0800 (+08) (envelope-from Kaiwei.Liu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx07.spreadtrum.com [10.0.1.12]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RK4NM1pz8z2K1r9q; Mon, 7 Aug 2023 13:18:27 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx07.spreadtrum.com (10.0.1.12) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 7 Aug 2023 13:20:17 +0800 From: Kaiwei Liu To: Vinod Koul , Orson Zhai , Baolin Wang , Chunyan Zhang CC: , , kaiwei liu , Wenming Wu Subject: [PATCH 2/5] dma: add dma mask interface in probe Date: Mon, 7 Aug 2023 13:20:14 +0800 Message-ID: <20230807052014.2781-1-kaiwei.liu@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx07.spreadtrum.com (10.0.1.12) X-MAIL: SHSQR01.spreadtrum.com 3775KJin020082 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org In the probe of DMA, the default addressing range is 32 bits, while the actual DMA hardware addressing range used is 36 bits. So add dma_set_mask_and_coherent function to match DMA addressing range. Signed-off-by: Kaiwei Liu --- drivers/dma/sprd-dma.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index 20c3cb1ef2f5..0e146550dfbb 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -1115,6 +1115,15 @@ static int sprd_dma_probe(struct platform_device *pdev) u32 chn_count; int ret, i; + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); + if (ret) { + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + if (ret) { + dev_err(&pdev->dev, "dma_set_mask_and_coherent failed\n"); + return ret; + } + } + /* Parse new and deprecated dma-channels properties */ ret = device_property_read_u32(&pdev->dev, "dma-channels", &chn_count); if (ret) From patchwork Mon Aug 7 05:20:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwei Liu X-Patchwork-Id: 13342998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A191EB64DD for ; Mon, 7 Aug 2023 05:21:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbjHGFU7 (ORCPT ); Mon, 7 Aug 2023 01:20:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbjHGFU6 (ORCPT ); Mon, 7 Aug 2023 01:20:58 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2877E1980; Sun, 6 Aug 2023 22:20:52 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3775KXHs020781; Mon, 7 Aug 2023 13:20:33 +0800 (+08) (envelope-from Kaiwei.Liu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx07.spreadtrum.com [10.0.1.12]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RK4Nd2Gbjz2K1r9q; Mon, 7 Aug 2023 13:18:41 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx07.spreadtrum.com (10.0.1.12) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 7 Aug 2023 13:20:31 +0800 From: Kaiwei Liu To: Vinod Koul , Orson Zhai , Baolin Wang , Chunyan Zhang CC: , , kaiwei liu , Wenming Wu Subject: [PATCH 3/5] dma: optimize two stage transfer function Date: Mon, 7 Aug 2023 13:20:28 +0800 Message-ID: <20230807052028.2854-1-kaiwei.liu@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx07.spreadtrum.com (10.0.1.12) X-MAIL: SHSQR01.spreadtrum.com 3775KXHs020781 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The DMA hardware is updated to optimize two stages transmission function, so modify relative register and logic. Two stages transmission mode of dma allows one channel finished transmission then start another channel transfer automatically. Signed-off-by: Kaiwei Liu --- drivers/dma/sprd-dma.c | 124 ++++++++++++++++++++++++++++++----------- 1 file changed, 91 insertions(+), 33 deletions(-) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index 0e146550dfbb..01053e106e8a 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -68,6 +68,7 @@ #define SPRD_DMA_GLB_TRANS_DONE_TRG BIT(18) #define SPRD_DMA_GLB_BLOCK_DONE_TRG BIT(17) #define SPRD_DMA_GLB_FRAG_DONE_TRG BIT(16) +#define SPRD_DMA_GLB_TRG_MASK GENMASK(19, 16) #define SPRD_DMA_GLB_TRG_OFFSET 16 #define SPRD_DMA_GLB_DEST_CHN_MASK GENMASK(13, 8) #define SPRD_DMA_GLB_DEST_CHN_OFFSET 8 @@ -155,6 +156,13 @@ #define SPRD_DMA_SOFTWARE_UID 0 +#define SPRD_DMA_SRC_CHN0_INT 9 +#define SPRD_DMA_SRC_CHN1_INT 10 +#define SPRD_DMA_DST_CHN0_INT 11 +#define SPRD_DMA_DST_CHN1_INT 12 +#define SPRD_DMA_2STAGE_SET 1 +#define SPRD_DMA_2STAGE_CLEAR 0 + /* dma data width values */ enum sprd_dma_datawidth { SPRD_DMA_DATAWIDTH_1_BYTE, @@ -212,7 +220,7 @@ struct sprd_dma_dev { struct clk *ashb_clk; int irq; u32 total_chns; - struct sprd_dma_chn channels[]; + struct sprd_dma_chn channels[0]; }; static void sprd_dma_free_desc(struct virt_dma_desc *vd); @@ -431,50 +439,90 @@ static enum sprd_dma_req_mode sprd_dma_get_req_type(struct sprd_dma_chn *schan) return (frag_reg >> SPRD_DMA_REQ_MODE_OFFSET) & SPRD_DMA_REQ_MODE_MASK; } -static int sprd_dma_set_2stage_config(struct sprd_dma_chn *schan) +static int sprd_dma_2stage_config(struct sprd_dma_chn *schan, u32 config_type) { struct sprd_dma_dev *sdev = to_sprd_dma_dev(&schan->vc.chan); u32 val, chn = schan->chn_num + 1; switch (schan->chn_mode) { case SPRD_DMA_SRC_CHN0: - val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; - val |= BIT(schan->trg_mode - 1) << SPRD_DMA_GLB_TRG_OFFSET; - val |= SPRD_DMA_GLB_2STAGE_EN; - if (schan->int_type != SPRD_DMA_NO_INT) - val |= SPRD_DMA_GLB_SRC_INT; - - sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, val, val); + if (config_type == SPRD_DMA_2STAGE_SET) { + val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; + val |= BIT(schan->trg_mode - 1) << SPRD_DMA_GLB_TRG_OFFSET; + val |= SPRD_DMA_GLB_2STAGE_EN; + if (schan->int_type & SPRD_DMA_SRC_CHN0_INT) + val |= SPRD_DMA_GLB_SRC_INT; + + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, + SPRD_DMA_GLB_SRC_INT | + SPRD_DMA_GLB_TRG_MASK | + SPRD_DMA_GLB_SRC_CHN_MASK, val); + } else { + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, + SPRD_DMA_GLB_SRC_INT | + SPRD_DMA_GLB_TRG_MASK | + SPRD_DMA_GLB_2STAGE_EN | + SPRD_DMA_GLB_SRC_CHN_MASK, 0); + } break; case SPRD_DMA_SRC_CHN1: - val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; - val |= BIT(schan->trg_mode - 1) << SPRD_DMA_GLB_TRG_OFFSET; - val |= SPRD_DMA_GLB_2STAGE_EN; - if (schan->int_type != SPRD_DMA_NO_INT) - val |= SPRD_DMA_GLB_SRC_INT; - - sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, val, val); + if (config_type == SPRD_DMA_2STAGE_SET) { + val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; + val |= BIT(schan->trg_mode - 1) << SPRD_DMA_GLB_TRG_OFFSET; + val |= SPRD_DMA_GLB_2STAGE_EN; + if (schan->int_type & SPRD_DMA_SRC_CHN1_INT) + val |= SPRD_DMA_GLB_SRC_INT; + + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, + SPRD_DMA_GLB_SRC_INT | + SPRD_DMA_GLB_TRG_MASK | + SPRD_DMA_GLB_SRC_CHN_MASK, val); + } else { + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, + SPRD_DMA_GLB_SRC_INT | + SPRD_DMA_GLB_TRG_MASK | + SPRD_DMA_GLB_2STAGE_EN | + SPRD_DMA_GLB_SRC_CHN_MASK, 0); + } break; case SPRD_DMA_DST_CHN0: - val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & - SPRD_DMA_GLB_DEST_CHN_MASK; - val |= SPRD_DMA_GLB_2STAGE_EN; - if (schan->int_type != SPRD_DMA_NO_INT) - val |= SPRD_DMA_GLB_DEST_INT; - - sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, val, val); + if (config_type == SPRD_DMA_2STAGE_SET) { + val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & + SPRD_DMA_GLB_DEST_CHN_MASK; + val |= SPRD_DMA_GLB_2STAGE_EN; + if (schan->int_type & SPRD_DMA_DST_CHN0_INT) + val |= SPRD_DMA_GLB_DEST_INT; + + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, + SPRD_DMA_GLB_DEST_INT | + SPRD_DMA_GLB_DEST_CHN_MASK, val); + } else { + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP1, + SPRD_DMA_GLB_DEST_INT | + SPRD_DMA_GLB_2STAGE_EN | + SPRD_DMA_GLB_DEST_CHN_MASK, 0); + } break; case SPRD_DMA_DST_CHN1: - val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & - SPRD_DMA_GLB_DEST_CHN_MASK; - val |= SPRD_DMA_GLB_2STAGE_EN; - if (schan->int_type != SPRD_DMA_NO_INT) - val |= SPRD_DMA_GLB_DEST_INT; - - sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, val, val); + if (config_type == SPRD_DMA_2STAGE_SET) { + val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & + SPRD_DMA_GLB_DEST_CHN_MASK; + val |= SPRD_DMA_GLB_2STAGE_EN; + if (schan->int_type & SPRD_DMA_DST_CHN1_INT) + val |= SPRD_DMA_GLB_DEST_INT; + + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, + SPRD_DMA_GLB_DEST_INT | + SPRD_DMA_GLB_DEST_CHN_MASK, val); + } else { + sprd_dma_glb_update(sdev, SPRD_DMA_GLB_2STAGE_GRP2, + SPRD_DMA_GLB_DEST_INT | + SPRD_DMA_GLB_2STAGE_EN | + SPRD_DMA_GLB_DEST_CHN_MASK, 0); + } break; default: @@ -545,7 +593,7 @@ static void sprd_dma_start(struct sprd_dma_chn *schan) * Set 2-stage configuration if the channel starts one 2-stage * transfer. */ - if (schan->chn_mode && sprd_dma_set_2stage_config(schan)) + if (schan->chn_mode && sprd_dma_2stage_config(schan, SPRD_DMA_2STAGE_SET)) return; /* @@ -569,6 +617,12 @@ static void sprd_dma_stop(struct sprd_dma_chn *schan) sprd_dma_set_pending(schan, false); sprd_dma_unset_uid(schan); sprd_dma_clear_int(schan); + /* + * If 2-stage transfer is used, the configuration must be clear + * when release DMA channel. + */ + if (schan->chn_mode) + sprd_dma_2stage_config(schan, SPRD_DMA_2STAGE_CLEAR); schan->cur_desc = NULL; } @@ -757,7 +811,9 @@ static int sprd_dma_fill_desc(struct dma_chan *chan, phys_addr_t llist_ptr; if (dir == DMA_MEM_TO_DEV) { - src_step = sprd_dma_get_step(slave_cfg->src_addr_width); + src_step = slave_cfg->src_port_window_size ? + slave_cfg->src_port_window_size : + sprd_dma_get_step(slave_cfg->src_addr_width); if (src_step < 0) { dev_err(sdev->dma_dev.dev, "invalid source step\n"); return src_step; @@ -773,7 +829,9 @@ static int sprd_dma_fill_desc(struct dma_chan *chan, else dst_step = SPRD_DMA_NONE_STEP; } else { - dst_step = sprd_dma_get_step(slave_cfg->dst_addr_width); + dst_step = slave_cfg->dst_port_window_size ? + slave_cfg->dst_port_window_size : + sprd_dma_get_step(slave_cfg->dst_addr_width); if (dst_step < 0) { dev_err(sdev->dma_dev.dev, "invalid destination step\n"); return dst_step; From patchwork Mon Aug 7 05:20:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwei Liu X-Patchwork-Id: 13342999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53C8DC001DB for ; Mon, 7 Aug 2023 05:21:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229515AbjHGFVW (ORCPT ); Mon, 7 Aug 2023 01:21:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjHGFVU (ORCPT ); Mon, 7 Aug 2023 01:21:20 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 809B0173E; Sun, 6 Aug 2023 22:21:17 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3775Km5g021379; Mon, 7 Aug 2023 13:20:48 +0800 (+08) (envelope-from Kaiwei.Liu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx07.spreadtrum.com [10.0.1.12]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RK4Nw3Pvxz2K1r9q; Mon, 7 Aug 2023 13:18:56 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx07.spreadtrum.com (10.0.1.12) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 7 Aug 2023 13:20:46 +0800 From: Kaiwei Liu To: Vinod Koul , Orson Zhai , Baolin Wang , Chunyan Zhang CC: , , kaiwei liu , Wenming Wu Subject: [PATCH 4/5] dma: delect enable opreation in probe Date: Mon, 7 Aug 2023 13:20:44 +0800 Message-ID: <20230807052044.2913-1-kaiwei.liu@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx07.spreadtrum.com (10.0.1.12) X-MAIL: SHSQR01.spreadtrum.com 3775Km5g021379 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org In the probe of dma, it will allocate device memory and do some initalization settings. All operations are only at the software level and don't need the DMA hardware power on, here modify relative code. Signed-off-by: Kaiwei Liu --- drivers/dma/sprd-dma.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index 01053e106e8a..41d427df5098 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -1261,16 +1261,8 @@ static int sprd_dma_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, sdev); - ret = sprd_dma_enable(sdev); - if (ret) - return ret; - - pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); - - ret = pm_runtime_get_sync(&pdev->dev); - if (ret < 0) - goto err_rpm; + pm_runtime_get_noresume(&pdev->dev); ret = dma_async_device_register(&sdev->dma_dev); if (ret < 0) { @@ -1284,7 +1276,7 @@ static int sprd_dma_probe(struct platform_device *pdev) if (ret) goto err_of_register; - pm_runtime_put(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); return 0; err_of_register: @@ -1292,8 +1284,6 @@ static int sprd_dma_probe(struct platform_device *pdev) err_register: pm_runtime_put_noidle(&pdev->dev); pm_runtime_disable(&pdev->dev); -err_rpm: - sprd_dma_disable(sdev); return ret; } From patchwork Mon Aug 7 05:20:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kaiwei Liu X-Patchwork-Id: 13343000 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C541EB64DD for ; Mon, 7 Aug 2023 05:21:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229487AbjHGFVb (ORCPT ); Mon, 7 Aug 2023 01:21:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjHGFVb (ORCPT ); Mon, 7 Aug 2023 01:21:31 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9CDE171E; Sun, 6 Aug 2023 22:21:27 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3775L0LD022298; Mon, 7 Aug 2023 13:21:00 +0800 (+08) (envelope-from Kaiwei.Liu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx07.spreadtrum.com [10.0.1.12]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RK4P854KHz2K1r9q; Mon, 7 Aug 2023 13:19:08 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx07.spreadtrum.com (10.0.1.12) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 7 Aug 2023 13:20:58 +0800 From: Kaiwei Liu To: Vinod Koul , Orson Zhai , Baolin Wang , Chunyan Zhang CC: , , kaiwei liu , Wenming Wu Subject: [PATCH 5/5] dma: add relative interface to support deep sleep Date: Mon, 7 Aug 2023 13:20:56 +0800 Message-ID: <20230807052056.2963-1-kaiwei.liu@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx07.spreadtrum.com (10.0.1.12) X-MAIL: SHSQR01.spreadtrum.com 3775L0LD022298 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The DMA doesn't support deep sleep before, here add relative interface in deep sleep framework. Signed-off-by: Kaiwei Liu --- drivers/dma/sprd-dma.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index 41d427df5098..b1dbbc5f4e70 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -1339,10 +1339,30 @@ static int __maybe_unused sprd_dma_runtime_resume(struct device *dev) return ret; } +static int sprd_dma_suspend_noirq(struct device *dev) +{ + if ((pm_runtime_status_suspended(dev)) || + (atomic_read(&(dev->power.usage_count)) > 1)) + return 0; + + return sprd_dma_runtime_suspend(dev); +} + +static int sprd_dma_resume_early(struct device *dev) +{ + if ((pm_runtime_status_suspended(dev)) || + (atomic_read(&(dev->power.usage_count)) > 1)) + return 0; + + return sprd_dma_runtime_resume(dev); +} + static const struct dev_pm_ops sprd_dma_pm_ops = { SET_RUNTIME_PM_OPS(sprd_dma_runtime_suspend, sprd_dma_runtime_resume, NULL) + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sprd_dma_suspend_noirq, + sprd_dma_resume_early) }; static struct platform_driver sprd_dma_driver = {