From patchwork Tue Aug 8 08:34:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 13345850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 801CBC001B0 for ; Tue, 8 Aug 2023 08:35:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qTIBZ-0004Gq-Bf; Tue, 08 Aug 2023 04:35:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qTIBW-0004EY-K5; Tue, 08 Aug 2023 04:35:22 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qTIBU-0004NZ-SU; Tue, 08 Aug 2023 04:35:22 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1bb9e6c2a90so47333175ad.1; Tue, 08 Aug 2023 01:35:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1691483719; x=1692088519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:from:to:cc:subject:date :message-id:reply-to; bh=MWMOGoc8MASPMcsU31cUu07Cy8VS8fV2qqbIFZ8ZRM4=; b=O7I2GHz3pePM5KHN3n6+EDN3VIVAzU9mzShvCm4se3bzh1fsuySNKsHGXTnrN0n54W udkDvCs2LHTuFtWEuDFNe4MEEIp7yUEbADKN9sm4LdAj2c1PzHELSM9MCFIK67sqR8ea U3SsSPQMbgZBIzEdCjo8FwpboRSbwBVWsygVkTFPjuguHzcrrVKjKXaK1g5p56SXGrGu tWMt5zAs8rfLg7JdmtotxhZDrPOanaUop5VUUhrskXOE8Fp8J4eFWVsXPpurLrKcdLHE bb4GnUOrDGYJ1INSNI0pzSkAzSgRNpqvPS4uF3zwKqol/8ZV9nHSU4bmF8X1qA0+Wd/3 VW0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691483719; x=1692088519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:sender:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=MWMOGoc8MASPMcsU31cUu07Cy8VS8fV2qqbIFZ8ZRM4=; b=ZS/wfjo23pDbuD/rN1WmISjYiDOgMwdhZBKGQLP/4R0P+CkpOkaSkF7nTxgKfhVUeN shaieziXvlcif4mv9sDb8G5iSgm8OqjA4d/BdBLQyYPWTThP+dLqyEyop/DWULEvbZ4N RqiiWKhWltlDEaCeNHwcImmRpWeu7a8QUyfq+53lflYFJRVE212scv877vTQwy3mHibS LjCvtU0NEhJS9eeOuoFMo2ZvzA1BuXfEWUzJfjDjnSQY3QC4vvc3w23HctcPsTPNP/v6 psl7jFXegsWi+DPNotJh2rwevktt9jpIwyOzhSyeePEEk83hpQGBj+h3h1/Q8TjEvL3A 85Tg== X-Gm-Message-State: AOJu0Yxlp1kU0T5HAgUBPv+ELhuMusnm3wQCqdaxd02L0J4LBqS2t00I ylMXST6saX/nIJLP+bR1/WA= X-Google-Smtp-Source: AGHT+IG59e9fus6Zmhixy7PaaeyZ5/iOnVQp4Ehx2vr6gdKH1VB/oLYe7sD/PLJ0CxU/7caNcXDmnA== X-Received: by 2002:a17:902:c952:b0:1ac:5717:fd5 with SMTP id i18-20020a170902c95200b001ac57170fd5mr15884799pla.60.1691483719130; Tue, 08 Aug 2023 01:35:19 -0700 (PDT) Received: from voyager.lan ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id n9-20020a170902e54900b001b8062c1db3sm8368112plf.82.2023.08.08.01.35.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Aug 2023 01:35:18 -0700 (PDT) From: Joel Stanley To: =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , Nicholas Piggin Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.2 1/3] pnv/lpc: Place mmio regs in their own memory region Date: Tue, 8 Aug 2023 18:04:43 +0930 Message-Id: <20230808083445.4613-2-joel@jms.id.au> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230808083445.4613-1-joel@jms.id.au> References: <20230808083445.4613-1-joel@jms.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=joel.stan@gmail.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The P9 and P10 models re-used the xscom_regs memory region for the mmio access, which is confusing. Add a separate memory region in preparation for enabling both xscom and mmio access. Signed-off-by: Joel Stanley --- include/hw/ppc/pnv_lpc.h | 3 ++- hw/ppc/pnv.c | 4 ++-- hw/ppc/pnv_lpc.c | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index 5d22c4557041..3000964f8999 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -81,8 +81,9 @@ struct PnvLpcController { uint32_t lpc_hc_irqstat; uint32_t lpc_hc_error_addr; - /* XSCOM registers */ + /* Registers */ MemoryRegion xscom_regs; + MemoryRegion mmio_regs; /* PSI to generate interrupts */ qemu_irq psi_irq; diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index eb54f93986df..afdaa25c2b26 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1565,7 +1565,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip), - &chip9->lpc.xscom_regs); + &chip9->lpc.mmio_regs); chip->fw_mr = &chip9->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", @@ -1784,7 +1784,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) return; } memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip), - &chip10->lpc.xscom_regs); + &chip10->lpc.mmio_regs); chip->fw_mr = &chip10->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index d692858bee78..caf5e10a5f96 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -664,7 +664,7 @@ static void pnv_lpc_power9_realize(DeviceState *dev, Error **errp) } /* P9 uses a MMIO region */ - memory_region_init_io(&lpc->xscom_regs, OBJECT(lpc), &pnv_lpc_mmio_ops, + memory_region_init_io(&lpc->mmio_regs, OBJECT(lpc), &pnv_lpc_mmio_ops, lpc, "lpcm", PNV9_LPCM_SIZE); } From patchwork Tue Aug 8 08:34:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 13345852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B3F2C001B0 for ; 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Tue, 08 Aug 2023 01:35:22 -0700 (PDT) Received: from voyager.lan ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id n9-20020a170902e54900b001b8062c1db3sm8368112plf.82.2023.08.08.01.35.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Aug 2023 01:35:22 -0700 (PDT) From: Joel Stanley To: =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , Nicholas Piggin Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-8.2 2/3] pnv/lpc: Hook up xscom region for P9/P10 Date: Tue, 8 Aug 2023 18:04:44 +0930 Message-Id: <20230808083445.4613-3-joel@jms.id.au> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230808083445.4613-1-joel@jms.id.au> References: <20230808083445.4613-1-joel@jms.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=joel.stan@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From P9 on the LPC bus is memory mapped. However the xscom access still is possible, so add it too. Signed-off-by: Joel Stanley --- include/hw/ppc/pnv_xscom.h | 6 ++++++ hw/ppc/pnv.c | 4 ++++ hw/ppc/pnv_lpc.c | 6 ++++++ 3 files changed, 16 insertions(+) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 9bc64635471e..42601bdf419d 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -96,6 +96,9 @@ struct PnvXScomInterfaceClass { #define PNV9_XSCOM_SBE_CTRL_BASE 0x00050008 #define PNV9_XSCOM_SBE_CTRL_SIZE 0x1 +#define PNV9_XSCOM_LPC_BASE 0x00090040 +#define PNV9_XSCOM_LPC_SIZE PNV_XSCOM_LPC_SIZE + #define PNV9_XSCOM_SBE_MBOX_BASE 0x000D0050 #define PNV9_XSCOM_SBE_MBOX_SIZE 0x16 @@ -155,6 +158,9 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_SBE_CTRL_BASE PNV9_XSCOM_SBE_CTRL_BASE #define PNV10_XSCOM_SBE_CTRL_SIZE PNV9_XSCOM_SBE_CTRL_SIZE +#define PNV10_XSCOM_LPC_BASE PNV9_XSCOM_LPC_BASE +#define PNV10_XSCOM_LPC_SIZE PNV9_XSCOM_LPC_SIZE + #define PNV10_XSCOM_SBE_MBOX_BASE PNV9_XSCOM_SBE_MBOX_BASE #define PNV10_XSCOM_SBE_MBOX_SIZE PNV9_XSCOM_SBE_MBOX_SIZE diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index afdaa25c2b26..a5db655b41b6 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1566,6 +1566,8 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip), &chip9->lpc.mmio_regs); + pnv_xscom_add_subregion(chip, PNV9_XSCOM_LPC_BASE, + &chip9->lpc.xscom_regs); chip->fw_mr = &chip9->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", @@ -1785,6 +1787,8 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip), &chip10->lpc.mmio_regs); + pnv_xscom_add_subregion(chip, PNV10_XSCOM_LPC_BASE, + &chip10->lpc.xscom_regs); chip->fw_mr = &chip10->lpc.isa_fw; chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index caf5e10a5f96..6c6a3134087f 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -666,6 +666,12 @@ static void pnv_lpc_power9_realize(DeviceState *dev, Error **errp) /* P9 uses a MMIO region */ memory_region_init_io(&lpc->mmio_regs, OBJECT(lpc), &pnv_lpc_mmio_ops, lpc, "lpcm", PNV9_LPCM_SIZE); + + /* but the XSCOM region still exists */ + pnv_xscom_region_init(&lpc->xscom_regs, OBJECT(lpc), + &pnv_lpc_xscom_ops, lpc, "xscom-lpc", + PNV_XSCOM_LPC_SIZE); + } static void pnv_lpc_power9_class_init(ObjectClass *klass, void *data) From patchwork Tue Aug 8 08:34:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 13345853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 939B5C001B0 for ; Tue, 8 Aug 2023 08:36:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qTIBf-0004J4-77; Tue, 08 Aug 2023 04:35:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qTIBd-0004Il-Op; Tue, 08 Aug 2023 04:35:29 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qTIBc-0004Pj-8J; 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envelope-from=joel.stan@gmail.com; helo=mail-pf1-x430.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org To test qemu's model of the xscom interface, apply this patch to qemu and the following change to skiboot: --- a/hw/lpc.c +++ b/hw/lpc.c @@ -1266,7 +1266,7 @@ static void lpc_init_chip_p9(struct dt_node *opb_node) lpc = zalloc(sizeof(struct lpcm)); assert(lpc); lpc->chip_id = gcid; - lpc->mbase = (void *)addr; + lpc->xbase = dt_get_address(lpc_node, 0, NULL); lpc->fw_idsel = 0xff; lpc->fw_rdsz = 0xff; lpc->node = lpc_node; Signed-off-by: Joel Stanley --- hw/ppc/pnv_lpc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 6c6a3134087f..62ab688407a3 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -218,6 +218,11 @@ int pnv_dt_lpc(PnvChip *chip, void *fdt, int root_offset, uint64_t lpcm_addr, offset = fdt_add_subnode(fdt, lpcm_offset, name); _FDT(offset); g_free(name); + uint32_t lpc_pcba = PNV9_XSCOM_LPC_BASE; + reg[0] = cpu_to_be32(lpc_pcba); + reg[1] = cpu_to_be32(PNV_XSCOM_LPC_SIZE); + + _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)))); _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2))); _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1))); _FDT((fdt_setprop(fdt, offset, "compatible", lpc_compat,