From patchwork Wed Aug 9 14:47:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13348103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD1A4C04A6A for ; Wed, 9 Aug 2023 14:48:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References:Message-ID :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Wed, 9 Aug 2023 09:47:51 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379EloUn030736; Wed, 9 Aug 2023 09:47:51 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:02 +0530 Subject: [PATCH v5 1/6] arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-1-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=5070; i=j-luthra@ti.com; h=from:subject:message-id; bh=sXQvk5iM0s3TI5hvd/BKfVHTAkjO1sGAFC1/n4Zrf7U=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cVWwePpvXrSrF/G7FiwY/v9Y+tRVqsfQ1pc xPB0s0BPouJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnFQAKCRBD3pH5JJpx RUksEACMBo13UK79CMOa70nOggtUcNXaX5o6sjJP0YqyPZB4Xr89O5FKPx7XXVQzQNIip77nV1I lvR04bGcY3jiP0Ps87JBBWeM/zNGSPnSlWLSg6DFakI/7NdwuIfTiI+aPqWUpNAG1IwjJyEyrrI z25NmJ6E9XoojqhWTWm50vJ7wkN+dvUoNhQRN0bwW9nK/Bk2AGKIL8YLtYm+d0tl0eEQ+atRq63 jOKcPlRNrwcELZPi8mtpYJSzQXqsMzWf62AtR9m5aXvBdM99FflN9QQHwbumDbL5kN41x8IIxTT vK7zUE/c0E6VQqHtbsu/tJoA2+SwASqZWGFmvY/tY72gJDDrGIXTtazSbGMlunnuPgF2sF6Tx8Q Rjm+Eyv/MMmx2e5PSnme4vGmAs+QOuLiP9V92PPEKKU3H6IIDNBtmcCaePlqGRdaRcdu3CteDFw XU/waxdwOZscaiY7cKYwrDCgI+Ym40dGdt9XAhRYHcExkQEWiuEGckjhgKqrynK9EI3VcQC9QoN WsC+fCHwXyvSYHpnOYA+9aSojaR0QruOiTPOzT28YSKzZlz6Ed+GL+PC38i3tO0A15Fdzvgu8in jgsjw7NsTqqE53dYV6Ruk0cL1SiCyi60jQuvz9PJedHqZnstgZbD+hdHp82VpqUTJcZYHAYbfi5 dWfr6as4dDIt9jQ== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074757_822853_397A944F X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Esteban Blanc This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 157 ++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index b37f4f88ece4..fbbd8bfa368c 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -127,6 +127,14 @@ J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ }; }; +&wkup_pmx3 { + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */ + >; + }; +}; + &main_pmx0 { main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins = < @@ -264,6 +272,155 @@ eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; }; + + tps659414: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1-supply = <&vsys_3v3>; + buck2-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + bucka1: buck1 { + regulator-name = "vda_mcu_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka2: buck2 { + regulator-name = "vdd_mcuio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka3: buck3 { + regulator-name = "vdd_mcu_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka4: buck4 { + regulator-name = "vdd_ddr_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name = "vdd_phyio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name = "vdd1_lpddr4_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name = "vda_dll_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name = "vdd_wk_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name = "vda_pll_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876441: pmic@4c { + compatible = "ti,lp8764-q1"; + reg = <0x4c>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1-supply = <&vsys_3v3>; + buck2-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + + regulators: regulators { + buckb1: buck1 { + regulator-name = "vdd_cpu_avs"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2: buck2 { + regulator-name = "vdd_ram_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3: buck3 { + regulator-name = "vdd_core_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4: buck4 { + regulator-name = "vdd_io_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &ospi0 { From patchwork Wed Aug 9 14:47:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13348105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24692C04A94 for ; Wed, 9 Aug 2023 14:48:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References:Message-ID :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Wed, 9 Aug 2023 09:47:52 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379Elq1e036884; Wed, 9 Aug 2023 09:47:52 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:03 +0530 Subject: [PATCH v5 2/6] arm64: dts: ti: k3-j721s2-som-p0: Add TP6594 family PMICs MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-2-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6089; i=j-luthra@ti.com; h=from:subject:message-id; bh=Dg1PS7NMh+Q5xNQ4Tp8LPzucxoER/3VHUPSQRiGgjGk=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cWnj4dJGii7cV/vL7LcmEG96DpUXg0H6yKQ KZ4cS05QBqJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnFgAKCRBD3pH5JJpx RbFzD/wPrHEFylV+K13/sPAgUtDHHFySqnNggoy6E6l3bx2ZPEctqDsxlJs+SuVfhwU5ZSWAlmR rj03dBpn6NihcfvC8YGubTEcghDgwkgdcsiGKFgdxtpHhTnsnL5/eFasNOr6XKvmvrKy52uKiuT aWo3ebn85+aQUFGvOctqEomaZpYbWQu4/2EuCMIWEJUKFXhG0zttPbI+pKvgSfPPeh1sKXrIqk3 tHu5Q1Z1kLxjELp/LKeEWbxzytXBVyOpO8ETvlROfSvdDOGcQC31bWA612vx/Q4/cBVp15HlP9/ vYyUzBPX4RuBm8xZGoKGqYBVK98OyyhNR7Sb/6lHkHfExDgRXNhcVyjc04lrUsveHlakFJNW6t5 In63ItSys2fCGhVd0QL5/UpiiUunPRLJL4HBCxIbq4xbIZZPt31LAC9Wlw7xBPxgdMPVkCW0+N3 H6J/JzeQzyGPP24VPn6ElN1LSY6tmh2FPwj6BjTn6Qnv14K02vWlow0kgHbrJiDx2aMYsd10iSX 3gMOKEQWYIb1eY/VvmXGKCzb/b5ATZ4i3gMOR+LH8HXH1Og7pnxiVqa7ysxCA3V9wdSaoHen9MK 8tZZ+cRifwliJNcKSiYsoMe0BGTTBSHHbX0JJlLY2aUfeEp82/82Lz7iECwUE4umq/0ThAQALae v3adL7z2N/Yu2PQ== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074800_190051_A92B69DD X-CRM114-Status: GOOD ( 12.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Esteban Blanc This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 199 +++++++++++++++++++++++++++ 1 file changed, 199 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index a4006f328027..a508e86c9a9d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -70,6 +70,15 @@ J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */ }; }; +&wkup_pmx1 { + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + /* (C21) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ + J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 7) + >; + }; +}; + &wkup_pmx2 { wkup_i2c0_pins_default: wkup-i2c0-default-pins { pinctrl-single,pins = < @@ -106,6 +115,196 @@ eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; }; + + tps659411: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1234-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + bucka1234: buck1234 { + regulator-name = "vdd_cpu_avs"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name = "vdd_mcu_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name = "vdd_mcuwk_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name = "vdd_mcu_gpioret_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name = "vdd_mcuio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name = "vda_mcu_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + tps659414: pmic@4c { + compatible = "ti,tps6594-q1"; + reg = <0x4c>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1-supply = <&vsys_3v3>; + buck2-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + buckb1: buck1 { + regulator-name = "vdd_io_1v8_reg"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2: buck2 { + regulator-name = "vdd_fpd_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3: buck3 { + regulator-name = "vdd_phy_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4: buck4 { + regulator-name = "vdd_ddr_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb5: buck5 { + regulator-name = "vdd_ram_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob1: ldo1 { + regulator-name = "vdd_wk_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob2: ldo2 { + regulator-name = "vdd_gpioret_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob3: ldo3 { + regulator-name = "vda_dll_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob4: ldo4 { + regulator-name = "vda_pll_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876411: pmic@58 { + compatible = "ti,lp8764-q1"; + reg = <0x58>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1234-supply = <&vsys_3v3>; + + regulators { + buckc1234: buck1234 { + regulator-name = "vdd_core_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &main_i2c0 { From patchwork Wed Aug 9 14:47:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13348106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78C56C04E69 for ; Wed, 9 Aug 2023 14:48:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References:Message-ID :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Wed, 9 Aug 2023 09:47:54 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379Elr46047128; Wed, 9 Aug 2023 09:47:54 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:04 +0530 Subject: [PATCH v5 3/6] arm64: dts: ti: k3-j721e-som-p0: Add TP6594 family PMICs MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-3-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=5390; i=j-luthra@ti.com; h=from:subject:message-id; bh=yzMUBACCDQrzxjYO5qGJ7jKmq2BzEmrVUzmq4Gc8rJE=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cX5btaoF8Cz5bpoX+2UhyKIxamx/i3gT+QY uMzvpuEWUiJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnFwAKCRBD3pH5JJpx RWvzD/999T+Wrad/gY3syGEiIHzmWU/+RFyUeeH8yn0iaF2SldhX8PXUpuOT+qk5FiwdoJJfhz1 9i8jf43Z3YqgFKvDwC/DwV8Mt2C7xN56tGi/alMaJB1Ck347Yg6FRH74xtrdjGNvBwMBjLxzSFj ZS1974o4VD8QUBpQwXcBEj+px8KdpBauqjQ/I6Y+0mWgSk9u+/S7QdgI3bYsQpjOaHYfWBT3Yz+ doHDyRt6vbgxTxqV0OafihjxaaGkAoT6d0N/FGWo62tBvIUzYDB8cockIKqCO4dN+/EZs/yxGNv 3fCn0XewwxOcVP9ZDIordbb3UQ/xMuAe0uxj/pRnhvcPQ4+gAdPLJq6bYtjCoXl+5AT5ULMAvLx R633YqAEaFyVK6rOaFULxhSn2Wtocg3rDGy3u6Vp7KYX8Syt5jvJWT90DqW3DHGUxUcQOBK2HzY UvBfykFC30GqP4BxO4lay8RnNlsOWrYyfMGQpf4XUC0/NZdc8B1LrNB+CIzsR0DZZFDm93gJkb7 Lfs8CErlN7j+We/kBPr0RxpEmeUUtefRrL51hQpP0gdV00PC0qSDjSJVRTlz02E/ZBdHexupGPn tKQBVmMJKb+Ix9i4d8IIri+ajmP/P/w6BIBb+JzwfrsWd8xOKFv4+FD4dMhMdn1maq6u6+O6mWc tuRjw8I2ojegfGg== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074758_868049_7034E0AF X-CRM114-Status: GOOD ( 12.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jerome Neanne This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Jerome Neanne Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 163 ++++++++++++++++++++++++++++ 1 file changed, 163 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index e90e43202546..141e856b7c4b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -152,6 +152,12 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ >; }; + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0d4, PIN_INPUT, 7) /* (G26) WKUP_GPIO0_9 */ + >; + }; + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { pinctrl-single,pins = < J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ @@ -199,6 +205,163 @@ eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; }; + + tps659413: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + system-power-controller; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + ti,primary-pmic; + + gpio-controller; + #gpio-cells = <2>; + + buck12-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + bucka12: buck12 { + regulator-name = "vdd_cpu_avs"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka3: buck3 { + regulator-name = "vdd_mcu_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka4: buck4 { + regulator-name = "vdd_ddr_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name = "vdd_phyio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name = "vdd1_lpddr4_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name = "vdd_mcuio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name = "vdda_dll_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name = "vda_mcu_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + tps659411: pmic@4c { + compatible = "ti,tps6594-q1"; + reg = <0x4c>; + system-power-controller; + interrupt-parent = <&wkup_gpio0>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + buck1234-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + buckb1234: buck1234 { + regulator-name = "vdd_core_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb5: buck5 { + regulator-name = "vdd_ram_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob1: ldo1 { + regulator-name = "vdd_sd_dv"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob2: ldo2 { + regulator-name = "vdd_usb_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob3: ldo3 { + regulator-name = "vdd_io_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldob4: ldo4 { + regulator-name = "vda_pll_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &ospi0 { From patchwork Wed Aug 9 14:47:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13348109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F146C04E69 for ; Wed, 9 Aug 2023 14:48:37 +0000 (UTC) DKIM-Signature: v=1; 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Wed, 9 Aug 2023 09:47:55 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379EltaX036909; Wed, 9 Aug 2023 09:47:55 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:05 +0530 Subject: [PATCH v5 4/6] arm64: dts: ti: k3-j784s4-evm: Fix interrupt ranges for TPS6594 PMIC MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-4-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=946; i=j-luthra@ti.com; h=from:subject:message-id; bh=lVTkp0occe1u5PjXOpY9HPUxvXrGy5ifWyibV8zxXk0=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cY4XC70qYfbRwNR4eHpXUnSJHrpmS8nEGMu y1qA11CS8eJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnGAAKCRBD3pH5JJpx RWP9EAC9yUT6J+PLRBb4OzmzWLK6km+veF1wCFf967a+WIhskBlYpyIAWsbTxeOfHQmKpZ/yoGF bl1Gi525VSapO9AveF1Qq67mJkEuvUvtFBVojbI7Y0ZorgF1SV6qqMHAeSiorcnE475f+UgTbEZ aFuKXBaMatm9FRn+TPUxdPNslam9c0ACFsDXDji6sLNwuN98CbOmdISC0++NTxag4qwHl1Re208 WcZ42uFTBcycxJN5bcJlTau09BYjVxMJLuSb1D7rxUujv+KSmTwi9Jdsni+pnpIyZ479WA+Tmb3 7Ys91gQDrkGx0Qp8ur8xPyAx15yieg3k9LV6+Cfkogvj7g2Xv0tJ8EG0/tgrNzMgzeoo/+Xt6Hf gvYkOuMiKeVAxL3Ox78+sDvuAbdXHqIY62LQITkLPFk2C3sdZUm8G/hFGOVDMGl1JrPOs5WURS7 ZEtG+4eJpQ5F2sPHUax+2baMZDihuuIkGV1bbRY6S76m6LAp7OGbr7P4LFI8wK5trscYeHXwZju MlMiGP7OoBY++WqX6sVDUUxIuTgqukJJbS2C7Yi15dtaLsaxOmdKeiErMrepqOa1ck63tMkUgS2 Gvlnf03BLRBYYML/rhoQk92sJ0LsJ61Y4kYT211cg/98qkFPAozUkZ+4DtdOYX2UFIvYSd+94i9 abMPQijo3FeUcBw== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074759_749169_D695D5DB X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Apelete Seketeli This patch fixes the interrupt range for TPS6594 PMIC on MCU/WAKEUP domain for RTC peripheral. Signed-off-by: Apelete Seketeli Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 740ee794d7b9..77a45f97e28b 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -107,7 +107,7 @@ wkup_gpio_intr: interrupt-controller@42200000 { #interrupt-cells = <1>; ti,sci = <&sms>; ti,sci-dev-id = <177>; - ti,interrupt-ranges = <16 928 16>; + ti,interrupt-ranges = <16 960 16>; }; /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ From patchwork Wed Aug 9 14:47:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 13348107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9D7FC04A6A for ; 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Wed, 9 Aug 2023 09:47:57 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 09:47:57 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379Eluv1036926; Wed, 9 Aug 2023 09:47:56 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:06 +0530 Subject: [PATCH v5 5/6] arm64: dts: ti: k3-j784s4-evm: Add support for TPS6594 PMIC MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-5-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3881; i=j-luthra@ti.com; h=from:subject:message-id; bh=pRH7YiPIujR0yk9CVapeYTQXzr7FSA9cyHUS4NHsk0g=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cZ3mmWSeUKV3fOQJ7QfcOXccwSzv9dVdu/S Ztp1zOoD7iJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnGQAKCRBD3pH5JJpx RQCRD/948sKbev5h4IbMjxsfSv8VPjbGepUIdw0AbX2JF7ZMZrnuPrrg3LW49MC9n9/TZqnnJSf aLp3MtZQqKB8kjScWADAoGh7u56UqDPeGbCuZg0tvGTwbKZ9KRg0IfJAeheNPydBOO6aqA5pmUj M6UlthjES6JmPuB68h4wakEBfe2LlUhTUoyM8E6O+nxD82R72KDhCrDhJLpq2UxfDlZGsNHquBJ Eohymyemgl2cWiVIrX+8Alc0+io1oDbDforjdNcEik5snav6f44ZXVqB1WC/u5A5TrOzlxvb+Uw NDarTNgq6YnmvDx1MpQ/Ds78NekkbYbfWGh2TGCIr1CoNPWBBHsuYGu6TUhzMPibUDnndu7DhMP qME0dB1NRq1uiMwe5soUIkSbdE4pfTpFnSmUiPLT8SLnlY+MWn3Vtbx2JXdrk1GkJlnio7P0sgc V78WZzM8w3reDIIiAAzZ5FH5NZCyAP/rSbZwU5fT6tRnAcNmOq8xilnXyXFb9ov1d7AjbznZ3mB kAj+WoxEENrNivJYKy4QRIGpdcGplJZgUEGv9x2/BGJDcij58jDfbsfN+SpWzdLSFempbQd3F7n y7lPHAyz5nveNuRll4mZ7MZD0oPXhBS18zVPx8P0r5X2/bSdsUXa35Snkj5r20mW4tM+1td27ud FgLfiwewCN3maGg== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074801_403501_8B8A9FEE X-CRM114-Status: GOOD ( 12.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jerome Neanne This patch adds support for TPS6593 PMIC on wkup I2C0 bus. This device provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Jerome Neanne Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 104 +++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index edc1009b2d1e..0dee14d4620e 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -251,6 +251,10 @@ vdd_sd_dv: regulator-TLV71033 { }; }; +&wkup_gpio0 { + status = "okay"; +}; + &main_pmx0 { main_uart8_pins_default: main-uart8-default-pins { pinctrl-single,pins = < @@ -365,6 +369,17 @@ J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ }; }; +&wkup_pmx1 { + status = "okay"; + + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) + >; + }; +}; + &wkup_pmx0 { mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { pinctrl-single,pins = < @@ -423,6 +438,95 @@ eeprom@50 { compatible = "atmel,24c256"; reg = <0x50>; }; + + tps659413: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + system-power-controller; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + ti,primary-pmic; + + gpio-controller; + #gpio-cells = <2>; + + buck12-supply = <&vsys_3v3>; + buck3-supply = <&vsys_3v3>; + buck4-supply = <&vsys_3v3>; + buck5-supply = <&vsys_3v3>; + ldo1-supply = <&vsys_3v3>; + ldo2-supply = <&vsys_3v3>; + ldo3-supply = <&vsys_3v3>; + ldo4-supply = <&vsys_3v3>; + + regulators { + bucka12: buck12 { + regulator-name = "vdd_ddr_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka3: buck3 { + regulator-name = "vdd_ram_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka4: buck4 { + regulator-name = "vdd_io_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name = "vdd_mcu_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name = "vdd_mcuio_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name = "vdd_mcuio_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name = "vds_dll_0v8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name = "vda_mcu_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &mcu_uart0 { From patchwork Wed Aug 9 14:47:07 2023 Content-Type: text/plain; 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Wed, 9 Aug 2023 09:47:58 -0500 From: Jai Luthra Date: Wed, 9 Aug 2023 20:17:07 +0530 Subject: [PATCH v5 6/6] arm64: dts: ti: k3-am62a7-sk: Add support for TPS6593 PMIC MIME-Version: 1.0 Message-ID: <20230809-tps6594-v5-6-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Esteban Blanc , , , , , X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3367; i=j-luthra@ti.com; h=from:subject:message-id; bh=QrE/y89VoIsfeJV7G4YIq5vjUnmA2ManvidYaXOX+nE=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBk06cafRk4dvI5qWv0PmcU9KoWwc+48B/8GQB9E XSTv2nSCvGJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZNOnGgAKCRBD3pH5JJpx RdQYD/9O79DvwbiqSS+nh1JKACuq6r+OIVgHQy4R89nB0gSsYgEVgpbpVMEw23X+KRxlpA7finX eokP5xbEUpWmBUZ2dfMGsMkuzTJEZ6zY6PDQxuojch+bDlCOtTmARqXKCHXVTb7J6G1wAlMi3lC NcFrLuVeSLQxZ8RY4AUGcW9YiWkPX1JPbRwd7M86MTWnrKAQOPdKiSBK9D9ka8b1H4ChFAnQe1n MUtZ8ctC4KTDO7P2/dIMQGqp/3OgStQcXEuh7iUsyjMSRe5EvZLE/twPTO/AKLXA2VhYTQVlnam +9d09QV3Ht4dMDZ5Ua7ZEhtVbYggd8vwxce4UtlyYBKwkHFY+jOyvRUWbLxJ/OSMLcPQnIejPlc aPRPg9ZfddmsZCCpU7/TrWgW2Z7kvrTAWHgGhqbSvMhGMj2L1MfZ+5WSwe0X7Br/Fe+I9cBiN5d rw1M6GF9I//zie75iM93baaDnB+TjmqpN88gg+pSyHwCMFvRl+2XiMEyNOG53KmuNruNrGyMbX3 hfMa6f5gxLrmEJ18sFDQ/H7ufKmSn2ERZig/w/Y7OJW5zEPX0e/wpv/9apuiWQgZPOTkVCqoc0q 5ZSV7qK35thdAo/52ont1pMn9ux0NXl5Qu95stXm5MVyL0fX54XczdnTlQiuuarVFd0fwh6fp5r hulroFFOUDD9UKg== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_074802_468872_F558D842 X-CRM114-Status: GOOD ( 12.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Julien Panis This patch adds support for TPS6593 PMIC on main I2C0 bus. This device provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Julien Panis Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 95 +++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index cff283c75f8e..abc77759c1a0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -221,6 +221,20 @@ AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ }; }; +&mcu_pmx0 { + status = "okay"; + + pmic_irq_pins_default: pmic-irq-pins-default { + pinctrl-single,pins = < + AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ + >; + }; +}; + +&mcu_gpio0 { + status = "okay"; +}; + &main_i2c0 { status = "okay"; pinctrl-names = "default"; @@ -244,6 +258,87 @@ usb_con_hs: endpoint { }; }; }; + + tps659312: pmic@48 { + compatible = "ti,tps6593-q1"; + reg = <0x48>; + ti,primary-pmic; + system-power-controller; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&mcu_gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + + buck123-supply = <&vcc_3v3_sys>; + buck4-supply = <&vcc_3v3_sys>; + buck5-supply = <&vcc_3v3_sys>; + ldo1-supply = <&vcc_3v3_sys>; + ldo2-supply = <&vcc_3v3_sys>; + ldo3-supply = <&buck5>; + ldo4-supply = <&vcc_3v3_sys>; + + regulators { + buck123: buck123 { + regulator-name = "vcc_core"; + regulator-min-microvolt = <715000>; + regulator-max-microvolt = <895000>; + regulator-boot-on; + regulator-always-on; + }; + + buck4: buck4 { + regulator-name = "vcc_1v1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: buck5 { + regulator-name = "vcc_1v8_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: ldo1 { + regulator-name = "vddshv5_sdio"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2: ldo2 { + regulator-name = "vpp_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3: ldo3 { + regulator-name = "vcc_0v85"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: ldo4 { + regulator-name = "vdda_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; &main_i2c1 {