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Fri, 11 Aug 2023 08:41:34 -0700 (PDT) Received: from localhost ([135.180.227.0]) by smtp.gmail.com with ESMTPSA id 17-20020a17090a005100b002609cadc56esm3705787pjb.11.2023.08.11.08.41.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Aug 2023 08:41:34 -0700 (PDT) Date: Fri, 11 Aug 2023 08:41:34 -0700 (PDT) X-Google-Original-Date: Fri, 11 Aug 2023 08:41:25 PDT (-0700) Subject: [GIT PULL] RISC-V Fixes for 6.5-rc6 CC: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230811_084136_869782_4EA9A8B1 X-CRM114-Status: GOOD ( 10.03 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The following changes since commit 640c503d7dbd7d34a62099c933f4db0ed77ccbec: Documentation: kdump: Add va_kernel_pa_offset for RISCV64 (2023-08-02 13:50:37 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.5-rc6 for you to fetch changes up to 7e3811521dc3934e2ecae8458676fc4a1f62bf9f: riscv: Implement flush_cache_vmap() (2023-08-10 08:54:29 -0700) ---------------------------------------------------------------- RISC-V Fixes for 6.5-rc6 * Fixes for a pair of kexec_file_load() failures. * A fix to ensure the direct mapping is PMD-aligned. * A fix for CPU feature detection on SMP=n * The MMIO ordering fences have been strengthened to ensure ordering WRT delay(). * Fixes for a pair of -Wmissing-variable-declarations warnings. * A fix to avoid PUD mappings in vmap on sv39. * flush_cache_vmap() now flushes the TLB to avoid issues on systems that cache invalid mappings. ---------------------------------------------------------------- Alexandre Ghiti (3): riscv: Start of DRAM should at least be aligned on PMD size for the direct mapping riscv: Do not allow vmap pud mappings for 3-level page table riscv: Implement flush_cache_vmap() Andrea Parri (1): riscv,mmio: Fix readX()-to-delay() ordering Nick Desaulniers (1): riscv: mm: fix 2 instances of -Wmissing-variable-declarations Palmer Dabbelt (1): Merge patch series "RISC-V: Fix a few kexec_file_load(2) failures" Samuel Holland (1): riscv: Fix CPU feature detection with SMP disabled Torsten Duwe (2): riscv/kexec: handle R_RISCV_CALL_PLT relocation type riscv/kexec: load initrd high in available memory arch/riscv/include/asm/cacheflush.h | 4 ++++ arch/riscv/include/asm/mmio.h | 16 ++++++++-------- arch/riscv/include/asm/pgtable.h | 2 ++ arch/riscv/include/asm/vmalloc.h | 4 +++- arch/riscv/kernel/cpu.c | 5 +++++ arch/riscv/kernel/elf_kexec.c | 3 ++- arch/riscv/kernel/smp.c | 5 ----- arch/riscv/mm/init.c | 16 +++++++++++----- arch/riscv/mm/kasan_init.c | 1 - 9 files changed, 35 insertions(+), 21 deletions(-)