From patchwork Fri Feb 8 16:50:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 10803391 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B239217F0 for ; Fri, 8 Feb 2019 16:50:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E8472E3D4 for ; Fri, 8 Feb 2019 16:50:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8FDD42E402; Fri, 8 Feb 2019 16:50:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 058AF2E3D4 for ; Fri, 8 Feb 2019 16:50:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 973566E40B; Fri, 8 Feb 2019 16:50:00 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 083E66E413; Fri, 8 Feb 2019 16:50:00 +0000 (UTC) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Feb 2019 08:49:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,348,1544515200"; d="scan'208";a="116281457" Received: from rdvivi-losangeles.jf.intel.com (HELO intel.com) ([10.7.196.65]) by orsmga008.jf.intel.com with ESMTP; 08 Feb 2019 08:49:58 -0800 Date: Fri, 8 Feb 2019 08:50:00 -0800 From: Rodrigo Vivi To: Dave Airlie , Daniel Vetter Subject: [PULL] drm-intel-next Message-ID: <20190208165000.GA30314@intel.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dim-tools@lists.freedesktop.org, Maxime Ripard , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi , Sean Paul Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hi Dave and Daniel, This is the last batch from us targeting 5.1 Here goes drm-intel-next-2019-02-07: UAPI Changes: - Expose RPCS (SSEU) configuration to userspace for Ice Lake in order to allow userspace to reconfigure the subslice config per context basis. (Tvrtko, Lionel) Driver Changes: - Execbuf and preemption improvements including selftests (Chris) - Rename HAS_GMCH_DISPLAY/HAS_GMCH (Rodrigo) - Debugfs error handling fix for robustness (Greg) - Improve reg_rw traces (Ville) - Push clear_intel_crtc_state onto the heap (Chris) - Watermark fixes for Ice Lake (Ville) - Fix enable count array size and bounds checking (Tvrtko) - MST Fixes (Lyude) - Prevent race and handle error on I915_GEM_MMAP (Joonas) - Initial rework for an full atomic gamma mode (Ville) Thanks, Rodrigo. The following changes since commit 46c0cd8c562bc3e4a99cbaa4ba0904b6871b7b4b: drm/i915: Update DRIVER_DATE to 20190202 (2019-02-02 00:14:28 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-02-07 for you to fetch changes up to c09d39166d8a3f3788680b32dbb0a40a70de32e2: drm/i915: Update DRIVER_DATE to 20190207 (2019-02-07 12:45:32 -0800) ---------------------------------------------------------------- UAPI Changes: - Expose RPCS (SSEU) configuration to userspace for Ice Lake in order to allow userspace to reconfigure the subslice config per context basis. (Tvrtko, Lionel) Driver Changes: - Execbuf and preemption improvements including selftests (Chris) - Rename HAS_GMCH_DISPLAY/HAS_GMCH (Rodrigo) - Debugfs error handling fix for robustness (Greg) - Improve reg_rw traces (Ville) - Push clear_intel_crtc_state onto the heap (Chris) - Watermark fixes for Ice Lake (Ville) - Fix enable count array size and bounds checking (Tvrtko) - MST Fixes (Lyude) - Prevent race and handle error on I915_GEM_MMAP (Joonas) - Initial rework for an full atomic gamma mode (Ville) ---------------------------------------------------------------- Chris Wilson (9): drm/i915: Allow normal clients to always preempt idle priority clients drm/i915: Trim NEWCLIENT boosting drm/i915/selftests: Exercise some AB...BA preemption chains drm/i915: Generalise GPU activity tracking drm/i915: Release the active tracker tree upon idling drm/i915: Allocate active tracking nodes from a slabcache drm/i915: Pull i915_gem_active into the i915_active family drm/i915: Push clear_intel_crtc_state() onto the heap drm/i915: Hack and slash, throttle execbuffer hogs Greg Kroah-Hartman (1): drm/i915: do not return invalid pointers as a *dentry Joonas Lahtinen (2): drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC set drm/i915: Handle vm_mmap error during I915_GEM_MMAP ioctl with WC set Lionel Landwerlin (2): drm/i915: Record the sseu configuration per-context & engine drm/i915/perf: lock powergating configuration to default when active Lyude Paul (3): drm/i915: Block fbdev HPD processing during suspend drm/i915: Don't send MST hotplugs during resume drm/i915: Don't send hotplug in intel_dp_check_mst_status() Rodrigo Vivi (2): drm/i915: Rename HAS_GMCH drm/i915: Update DRIVER_DATE to 20190207 Tvrtko Ursulin (4): drm/i915: Add timeline barrier support drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) drm/i915/selftests: Context SSEU reconfiguration tests drm/i915/pmu: Fix enable count array size and bounds checking Ville Syrjälä (14): drm/i915: Include register polling in reg_rw traces drm/i915: Fix wm latency==0 disable on skl+ drm/i915: Extract icl_set_pipe_chicken() drm/i915: Setup PIPE_CHICKEN for fastsets too drm/i915: W/A for underruns with WM1+ disabled on icl drm/i915: Bump skl+ wm blocks to 11 bits drm/i915: Just use icl+ definition for PLANE_WM blocks field drm/i915: Don't set update_wm_post on g4x+ drm/i915: Split the gamma/csc enable bits from the plane_ctl() function drm/i915: Precompute gamma_mode drm/i915: Constify the state arguments to the color management stuff drm/i915: Pull GAMMA_MODE write out from haswell_load_luts() drm/i915: Split color mgmt based on single vs. double buffered registers drm/i915: Move LUT programming to happen after vblank waits drivers/gpu/drm/i915/Makefile | 4 +- drivers/gpu/drm/i915/i915_active.c | 286 +++++++++++++ drivers/gpu/drm/i915/i915_active.h | 425 +++++++++++++++++++ drivers/gpu/drm/i915/i915_active_types.h | 36 ++ drivers/gpu/drm/i915/i915_debugfs.c | 6 +- drivers/gpu/drm/i915/i915_drv.c | 12 +- drivers/gpu/drm/i915/i915_drv.h | 38 +- drivers/gpu/drm/i915/i915_gem.c | 34 +- drivers/gpu/drm/i915/i915_gem_context.c | 359 +++++++++++++++- drivers/gpu/drm/i915/i915_gem_context.h | 20 + drivers/gpu/drm/i915/i915_gem_execbuffer.c | 67 +++ drivers/gpu/drm/i915/i915_gem_fence_reg.c | 4 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +- drivers/gpu/drm/i915/i915_gem_object.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 10 +- drivers/gpu/drm/i915/i915_pci.c | 14 +- drivers/gpu/drm/i915/i915_perf.c | 13 +- drivers/gpu/drm/i915/i915_pmu.c | 22 +- drivers/gpu/drm/i915/i915_pmu.h | 2 + drivers/gpu/drm/i915/i915_reg.h | 6 +- drivers/gpu/drm/i915/i915_request.c | 36 +- drivers/gpu/drm/i915/i915_request.h | 383 ----------------- drivers/gpu/drm/i915/i915_reset.c | 2 +- drivers/gpu/drm/i915/i915_suspend.c | 4 +- drivers/gpu/drm/i915/i915_timeline.c | 4 +- drivers/gpu/drm/i915/i915_timeline.h | 30 +- drivers/gpu/drm/i915/i915_vma.c | 183 ++------ drivers/gpu/drm/i915/i915_vma.h | 11 +- drivers/gpu/drm/i915/intel_color.c | 247 ++++++----- drivers/gpu/drm/i915/intel_device_info.h | 2 +- drivers/gpu/drm/i915/intel_display.c | 300 ++++++++----- drivers/gpu/drm/i915/intel_dp.c | 31 +- drivers/gpu/drm/i915/intel_drv.h | 17 +- drivers/gpu/drm/i915/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/intel_fbdev.c | 33 +- drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +- drivers/gpu/drm/i915/intel_guc_log.c | 3 + drivers/gpu/drm/i915/intel_hdmi.c | 6 +- drivers/gpu/drm/i915/intel_hotplug.c | 2 +- drivers/gpu/drm/i915/intel_i2c.c | 2 +- drivers/gpu/drm/i915/intel_lrc.c | 61 ++- drivers/gpu/drm/i915/intel_lrc.h | 2 + drivers/gpu/drm/i915/intel_overlay.c | 33 +- drivers/gpu/drm/i915/intel_pm.c | 21 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 13 - drivers/gpu/drm/i915/intel_ringbuffer.h | 36 +- drivers/gpu/drm/i915/intel_sprite.c | 54 ++- drivers/gpu/drm/i915/intel_uncore.c | 3 + drivers/gpu/drm/i915/selftests/i915_active.c | 157 +++++++ drivers/gpu/drm/i915/selftests/i915_gem_context.c | 467 +++++++++++++++++++++ .../gpu/drm/i915/selftests/i915_live_selftests.h | 3 +- drivers/gpu/drm/i915/selftests/intel_lrc.c | 103 +++++ drivers/gpu/drm/i915/selftests/mock_timeline.c | 3 +- drivers/gpu/drm/i915/vlv_dsi.c | 4 +- include/uapi/drm/i915_drm.h | 64 +++ 55 files changed, 2756 insertions(+), 937 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_active.c create mode 100644 drivers/gpu/drm/i915/i915_active.h create mode 100644 drivers/gpu/drm/i915/i915_active_types.h create mode 100644 drivers/gpu/drm/i915/selftests/i915_active.c