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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:12 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v5 1/6] dt-bindings: iio: adc: mcp3911: add support for the whole MCP39xx family Date: Mon, 14 Aug 2023 14:10:05 +0200 Message-ID: <20230814121010.184842-1-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add those to the compatible string as the driver support is extended. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson Reviewed-by: Krzysztof Kozlowski --- Notes: v2: - No changes v3: - No changes v4: - No changes v5: - No changes .../devicetree/bindings/iio/adc/microchip,mcp3911.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml index f7b3fde4115a..06951ec5f5da 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -18,7 +18,13 @@ description: | properties: compatible: enum: + - microchip,mcp3910 - microchip,mcp3911 + - microchip,mcp3912 + - microchip,mcp3913 + - microchip,mcp3914 + - microchip,mcp3918 + - microchip,mcp3919 reg: maxItems: 1 From patchwork Mon Aug 14 12:10:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13352784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3DCBC04FDF for ; Mon, 14 Aug 2023 12:09:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232952AbjHNMIl (ORCPT ); Mon, 14 Aug 2023 08:08:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233089AbjHNMIS (ORCPT ); Mon, 14 Aug 2023 08:08:18 -0400 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CC5C18B; Mon, 14 Aug 2023 05:08:17 -0700 (PDT) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-99c47ef365cso584147866b.0; Mon, 14 Aug 2023 05:08:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692014895; x=1692619695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LgT6v6UPoUfFOEUtDJqn1N6hvfyW8RNyW84EUc6M0z0=; b=rywnj7s716WZyrQzAdtSqvMFFJNF6ZdMjujK+7SJPOzKfdS0wsJSgtlnFbo7YAXwT7 sLnePqhEt66PLFxg4flNMjEiCDHjsNiXkpSPNA4hvKzU8D9kIwj5GP+FNUHT/8hkzy8h 5YOJh/ILCw/Dd2CK0mAY2WhroHdh7O/PqLmagZhDl6myVIAVpH/Gn7tktEmjvbbxv4Tz NZh37RDza4lCWkb2kD0yFgg2ngVDE5xIE7scGpI9qHdKHcw80wJpRfSkc4ts27O+g0Sx 7RV2KQRxvvWwmB2aRlV0IjQOVk2V6eEUGgj35dqHcNb90efS77IiXdMg5AaXrBx6rLeC 2f7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692014895; x=1692619695; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LgT6v6UPoUfFOEUtDJqn1N6hvfyW8RNyW84EUc6M0z0=; b=inOVCWow/8gBgDYSH5/huWeB36v9a1pDsJFaUmBeRRvyo5Ym7EW3oJY1kkZrFzUaFF 9rBZUHN7EJ3smn1kJDJCuy+KO5pM9LwQzU/IS0+qL/+IPZryY3jXMU89JdVgTf7hD7Fz y9rZsS0lQiLBk7nEYARnYidBtEaYXs6lJkViVisGGZLKzY/GN62AO//5KeqkO+OUQjei 25gBxydS6KRFtqP7/pR0Lkr6kFaFCFTRQrkAJ/bvX55BfRTcN/UakrzrCMOjple3bmh9 HxgqPOpzb6JzGDcEjBRnTLvqpgIzBhGE+Tt4QOonahQXavUDofweOp7r/4mGZnU/lSOQ 1dEw== X-Gm-Message-State: AOJu0Yx5fwXhDfBaP+5bu6Ro9NShx5zpESr0MxxUyTf3RJ0FOuzmEvVX zkmxAGXXFWwobQQmxb2+kv8= X-Google-Smtp-Source: AGHT+IFGNhgy+vN64qKYVTzYuxfbpzO1QK/h/dDdlbknBqHLK/nPBjAubMLi/BSaSuS2kTfitygBow== X-Received: by 2002:a17:907:2ce9:b0:992:a9c3:244f with SMTP id hz9-20020a1709072ce900b00992a9c3244fmr8303966ejc.4.1692014895324; Mon, 14 Aug 2023 05:08:15 -0700 (PDT) Received: from goliat.isc.local (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:14 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/6] iio: adc: mcp3911: make use of dev_err_probe() Date: Mon, 14 Aug 2023 14:10:06 +0200 Message-ID: <20230814121010.184842-2-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230814121010.184842-1-marcus.folkesson@gmail.com> References: <20230814121010.184842-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Simplify code by switch to dev_err_probe(). Suggested-by: Andy Shevchenko Signed-off-by: Marcus Folkesson Reviewed-by: Andy Shevchenko --- Notes: v5: - New patch in this series drivers/iio/adc/mcp3911.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 974c5bd923a6..681248a3ddde 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -468,6 +468,7 @@ static int mcp3911_probe(struct spi_device *spi) { struct iio_dev *indio_dev; struct mcp3911 *adc; + struct device *dev = &spi->dev; int ret; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); @@ -482,10 +483,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get regulator (%ld)\n", - PTR_ERR(adc->vref)); - return PTR_ERR(adc->vref); + return dev_err_probe(dev, PTR_ERR(adc->vref), "failed to get regulator\n"); } } else { @@ -504,10 +502,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get adc clk (%ld)\n", - PTR_ERR(adc->clki)); - return PTR_ERR(adc->clki); + return dev_err_probe(dev, PTR_ERR(adc->clki), "failed to get adc clk\n"); } } From patchwork Mon Aug 14 12:10:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13352785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6FF0C04E69 for ; Mon, 14 Aug 2023 12:09:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232991AbjHNMIl (ORCPT ); Mon, 14 Aug 2023 08:08:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233159AbjHNMIV (ORCPT ); Mon, 14 Aug 2023 08:08:21 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23CBEF5; Mon, 14 Aug 2023 05:08:19 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-986d8332f50so572485366b.0; Mon, 14 Aug 2023 05:08:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692014897; x=1692619697; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IWoGZr69/zL66ym22bwxiAL63PVvg4kqD1dTeOz6J98=; b=pO1lmFz89wBRElBTFda36fMMlECfvstv1gwhlD9ZamYwwMCJgT1sz9fpWbSkRYeOXK xrUFTHAHyny5ybwLlEuq+xnagbFQSdjOLS7W7REfzauEw/4ie17Zvuag0QnSRVOVPv5d e923JDOTNJxuEBrkR+dZL9Gd5UR4uL/iHfZjyjBNUyVTUthPxNujra/3W7A94b9/we80 ceSJYsDf9bOpgnUvuG1ZQ8RuZbrATbj51FjvPFWwRBpRmVs8YDKHB1klMmo8KNSby9HS nU+OHag4WzpATdJheEgXTT8m7Q6ZQ0nn+obEwIp3kqmEZir6w8KX+ghmwmh2QE/RdWOj zjSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692014897; x=1692619697; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IWoGZr69/zL66ym22bwxiAL63PVvg4kqD1dTeOz6J98=; b=ANvqFR7cpsSI6bb1lK9EdVAllLNqe3HXfjfeNvulEam4qXnOxFYAcXSPVAkoc0SDfr NlqnDUj4vCOwLr8jqGw6yZIX28oGUOEx11ySyt4OvuWaTvTNd/mBpPSY6I47mlYV97CB S5XZe2kz7oxj49/BZ4sib85kJOjKLVM7oWH38QXQGhdcOLRffGzAP5lagVsuPPbrtc55 AuwGjgb+ET0NXiJ39IqeoHBgqvWKgvooEiNZcPMXkzv99zVvrosk9s4CQfQD8dq1c1P6 6w6f77+m+KbQ9FuwSUdS0r3qOSM2pnExBMeqhrl4aU13PPKmbFe4BiRf+fqV8FdCPgqw Z0Cg== X-Gm-Message-State: AOJu0YwF9HnCKEkTkRNklpjikPeXBuAD4cPWYaAtGlwI/Im3iPcxfTd2 gupHGBSY98HRgwTsR4827betxsMWkOlIG3vD X-Google-Smtp-Source: AGHT+IFEtF605rnSZffsIwmwuf7YL13/5Bluv/QlOycy5OU1oZ2o/Ed1DFhMGAai9qQAzFyfsZ9T+g== X-Received: by 2002:a17:906:31d3:b0:99c:f966:9e9d with SMTP id f19-20020a17090631d300b0099cf9669e9dmr7316428ejf.10.1692014897487; Mon, 14 Aug 2023 05:08:17 -0700 (PDT) Received: from goliat.isc.local (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:16 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/6] iio: adc: mcp3911: simplify usage of spi->dev Date: Mon, 14 Aug 2023 14:10:07 +0200 Message-ID: <20230814121010.184842-3-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230814121010.184842-1-marcus.folkesson@gmail.com> References: <20230814121010.184842-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Replace the usage of `adc->spi->dev` with `dev` to make the code prettier. Suggested-by: Andy Shevchenko Signed-off-by: Marcus Folkesson Reviewed-by: Andy Shevchenko --- Notes: v4: - New patch in this series v5: - Introduce `struct device *dev` to more functions drivers/iio/adc/mcp3911.c | 59 ++++++++++++++++++--------------------- 1 file changed, 27 insertions(+), 32 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 681248a3ddde..12fa635ed199 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -270,6 +270,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, static int mcp3911_calc_scale_table(struct mcp3911 *adc) { u32 ref = MCP3911_INT_VREF_MV; + struct device *dev = &adc->spi->dev; u32 div; int ret; u64 tmp; @@ -277,9 +278,7 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) if (adc->vref) { ret = regulator_get_voltage(adc->vref); if (ret < 0) { - dev_err(&adc->spi->dev, - "failed to get vref voltage: %d\n", - ret); + dev_err(dev, "failed to get vref voltage: %d\n", ret); return ret; } @@ -337,6 +336,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) struct iio_poll_func *pf = p; struct iio_dev *indio_dev = pf->indio_dev; struct mcp3911 *adc = iio_priv(indio_dev); + struct device *dev = &adc->spi->dev; struct spi_transfer xfer[] = { { .tx_buf = &adc->tx_buf, @@ -354,8 +354,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) adc->tx_buf = MCP3911_REG_READ(MCP3911_CHANNEL(0), adc->dev_addr); ret = spi_sync_transfer(adc->spi, xfer, ARRAY_SIZE(xfer)); if (ret < 0) { - dev_warn(&adc->spi->dev, - "failed to get conversion data\n"); + dev_warn(dev, "failed to get conversion data\n"); goto out; } @@ -396,12 +395,10 @@ static int mcp3911_config(struct mcp3911 *adc) if (ret) device_property_read_u32(dev, "device-addr", &adc->dev_addr); if (adc->dev_addr > 3) { - dev_err(&adc->spi->dev, - "invalid device address (%i). Must be in range 0-3.\n", - adc->dev_addr); + dev_err(dev, "invalid device address (%i). Must be in range 0-3.\n", adc->dev_addr); return -EINVAL; } - dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr); + dev_dbg(dev, "use device address %i\n", adc->dev_addr); ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) @@ -409,21 +406,19 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_CONFIG_VREFEXT; if (adc->vref) { - dev_dbg(&adc->spi->dev, "use external voltage reference\n"); + dev_dbg(dev, "use external voltage reference\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use internal voltage reference (1.2V)\n"); + dev_dbg(dev, "use internal voltage reference (1.2V)\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 0); } regval &= ~MCP3911_CONFIG_CLKEXT; if (adc->clki) { - dev_dbg(&adc->spi->dev, "use external clock as clocksource\n"); + dev_dbg(dev, "use external clock as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use crystal oscillator as clocksource\n"); + dev_dbg(dev, "use crystal oscillator as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 0); } @@ -471,14 +466,14 @@ static int mcp3911_probe(struct spi_device *spi) struct device *dev = &spi->dev; int ret; - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); if (!indio_dev) return -ENOMEM; adc = iio_priv(indio_dev); adc->spi = spi; - adc->vref = devm_regulator_get_optional(&adc->spi->dev, "vref"); + adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; @@ -491,13 +486,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - ret = devm_add_action_or_reset(&spi->dev, - mcp3911_cleanup_regulator, adc->vref); + ret = devm_add_action_or_reset(dev, mcp3911_cleanup_regulator, adc->vref); if (ret) return ret; } - adc->clki = devm_clk_get_enabled(&adc->spi->dev, NULL); + adc->clki = devm_clk_get_enabled(dev, NULL); if (IS_ERR(adc->clki)) { if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; @@ -510,7 +504,7 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - if (device_property_read_bool(&adc->spi->dev, "microchip,data-ready-hiz")) + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, 0, 2); else @@ -544,15 +538,15 @@ static int mcp3911_probe(struct spi_device *spi) mutex_init(&adc->lock); if (spi->irq > 0) { - adc->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d", - indio_dev->name, - iio_device_id(indio_dev)); + adc->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); if (!adc->trig) return -ENOMEM; adc->trig->ops = &mcp3911_trigger_ops; iio_trigger_set_drvdata(adc->trig, adc); - ret = devm_iio_trigger_register(&spi->dev, adc->trig); + ret = devm_iio_trigger_register(dev, adc->trig); if (ret) return ret; @@ -561,20 +555,21 @@ static int mcp3911_probe(struct spi_device *spi) * Some platforms might not allow the option to power it down so * don't enable the interrupt to avoid extra load on the system. */ - ret = devm_request_irq(&spi->dev, spi->irq, - &iio_trigger_generic_data_rdy_poll, IRQF_NO_AUTOEN | IRQF_ONESHOT, - indio_dev->name, adc->trig); + ret = devm_request_irq(dev, spi->irq, + &iio_trigger_generic_data_rdy_poll, + IRQF_NO_AUTOEN | IRQF_ONESHOT, + indio_dev->name, adc->trig); if (ret) return ret; } - ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, - NULL, - mcp3911_trigger_handler, NULL); + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, + NULL, + mcp3911_trigger_handler, NULL); if (ret) return ret; - return devm_iio_device_register(&adc->spi->dev, indio_dev); + return devm_iio_device_register(dev, indio_dev); } static const struct of_device_id mcp3911_dt_ids[] = { From patchwork Mon Aug 14 12:10:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13352786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3ED66C05052 for ; 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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:18 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/6] iio: adc: mcp3911: fix indentation Date: Mon, 14 Aug 2023 14:10:08 +0200 Message-ID: <20230814121010.184842-4-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230814121010.184842-1-marcus.folkesson@gmail.com> References: <20230814121010.184842-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The file does not make use of indentation properly. Fix that. Signed-off-by: Marcus Folkesson --- Notes: v4: - New patch in this series v5: - Cosmetics drivers/iio/adc/mcp3911.c | 41 +++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 12fa635ed199..1648eaa878eb 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -33,7 +33,7 @@ #define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch)) #define MCP3911_REG_STATUSCOM 0x0a -#define MCP3911_STATUSCOM_DRHIZ BIT(12) +#define MCP3911_STATUSCOM_DRHIZ BIT(12) #define MCP3911_STATUSCOM_READ GENMASK(7, 6) #define MCP3911_STATUSCOM_CH1_24WIDTH BIT(4) #define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3) @@ -111,8 +111,7 @@ static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) return spi_write(adc->spi, &val, len + 1); } -static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, - u32 val, u8 len) +static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len) { u32 tmp; int ret; @@ -127,8 +126,8 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, } static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - long mask) + struct iio_chan_spec const *chan, + long mask) { switch (mask) { case IIO_CHAN_INFO_SCALE: @@ -141,9 +140,9 @@ static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, } static int mcp3911_read_avail(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - const int **vals, int *type, int *length, - long info) + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) { switch (info) { case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -212,8 +211,8 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, } static int mcp3911_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *channel, int val, - int val2, long mask) + struct iio_chan_spec const *channel, int val, + int val2, long mask) { struct mcp3911 *adc = iio_priv(indio_dev); int ret = -EINVAL; @@ -223,12 +222,12 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: for (int i = 0; i < MCP3911_NUM_SCALES; i++) { if (val == mcp3911_scale_table[i][0] && - val2 == mcp3911_scale_table[i][1]) { + val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + MCP3911_GAIN_MASK(channel->channel), + MCP3911_GAIN_VAL(channel->channel, i), 1); } } break; @@ -246,8 +245,8 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, /* Enable offset*/ ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -255,7 +254,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, if (val == mcp3911_osr_table[i]) { val = FIELD_PREP(MCP3911_CONFIG_OSR, i); ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + val, 2); break; } } @@ -506,10 +505,10 @@ static int mcp3911_probe(struct spi_device *spi) if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); + 0, 2); else ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + MCP3911_STATUSCOM_DRHIZ, 2); if (ret) return ret; @@ -517,12 +516,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - /* Set gain to 1 for all channels */ + /* Set gain to 1 for all channels */ for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(i), - MCP3911_GAIN_VAL(i, 0), 1); + MCP3911_GAIN_MASK(i), + MCP3911_GAIN_VAL(i, 0), 1); if (ret) return ret; } From patchwork Mon Aug 14 12:10:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13352787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8F91C07E8C for ; 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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:20 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 5/6] iio: adc: mcp3911: avoid ambiguity parameters in macros Date: Mon, 14 Aug 2023 14:10:09 +0200 Message-ID: <20230814121010.184842-5-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230814121010.184842-1-marcus.folkesson@gmail.com> References: <20230814121010.184842-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Name macro parameters after what they represent instead of 'x'. Suggested-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v5: - New patch in this series drivers/iio/adc/mcp3911.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 1648eaa878eb..f1e02aa14e93 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -51,8 +51,8 @@ #define MCP3911_REG_GAINCAL_CH1 0x17 #define MCP3911_REG_VREFCAL 0x1a -#define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) -#define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) +#define MCP3911_CHANNEL(ch) (MCP3911_REG_CHANNEL0 + ch * 3) +#define MCP3911_OFFCAL(ch) (MCP3911_REG_OFFCAL_CH0 + ch * 6) /* Internal voltage reference in mV */ #define MCP3911_INT_VREF_MV 1200 From patchwork Mon Aug 14 12:10:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13352788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 996E9C0729B for ; Mon, 14 Aug 2023 12:09:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233139AbjHNMIn (ORCPT ); Mon, 14 Aug 2023 08:08:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233753AbjHNMIf (ORCPT ); Mon, 14 Aug 2023 08:08:35 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F24541710; Mon, 14 Aug 2023 05:08:24 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-51e28cac164so10952640a12.1; Mon, 14 Aug 2023 05:08:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692014903; x=1692619703; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ije6etBRqu9eyOmRNorXOsRit4C3yRzoqCKR1YSckOw=; b=qBQfonkCykZodqMNBKKTmUy7IhkebJa/PMGqe4Fnx0MJdUtyNX5wG14gRVYF9u6I5W S8P12wAInp0OEDVBEwG91gQzn/pRlJeniyy1mqs/L8rBeZCbxbJr2S72KwI1hnbM+Kl0 1ifth3nReofUOH0/aYtlnaxbj7lwflYOZo4SB9OTRPQQ8+lhTjM4awks5pmUlqVYrXeP LuFkqnMNDmqGMnawMnjAgfAVZNuQVIsOQVFVld0VnwAbZzoR3hRe8AtR6xY5hgw6gFM4 qQ/CWe1W9JPX2ZTjh26BDW3FFtdO5Eci5d0KJKBc2AtH6VWd3BH8ZA0sTNMcVRikkHsG OKCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692014903; x=1692619703; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ije6etBRqu9eyOmRNorXOsRit4C3yRzoqCKR1YSckOw=; b=ZAvOH44JWB0hWWUWUbqeyHLBw+VMNXVgVcWzDmvsZB4dYN0WlirWRf7IDCTYHLvnhX LE90Th0eYFEqLnITuXWxSTryBxOSt8ZvHIrGvp++/JQ0D/C5HE7vpFmJxLW0f3qudaem 8lcu/F3qh6DfbTciVi3coWo1hzREcTgfOSaYKYeIQtTW0N4rhRyhHpPMflCgjcuXQTNN bVdAosYr1N9resx2pH22QinydyfmMQhjDDf6OZvZmYsTF/hqQZUIUbdBWDMTKnbOKTka 7ZizCz054xSIdDbdaexfx7/15RxaQYNtKQ4KHeayhABPKXWw975nSEakfKYpPyJppAxi Gxrg== X-Gm-Message-State: AOJu0YwenT1BDJHPjSYuAVr95azppp2uVd7lispvOnu7skI/6lPG4Tgi p6m4ZGoa0nqXQ/G+gb6pWjI= X-Google-Smtp-Source: AGHT+IF0IuVfW+uDKgyHTCGkarxWuxfyVzrYmzAnGLvPbaRN6mYbU4EhDQitY6n2fYhe2jOHWk1ETg== X-Received: by 2002:a17:907:1c95:b0:98d:f2c9:a1eb with SMTP id nb21-20020a1709071c9500b0098df2c9a1ebmr16447470ejc.24.1692014903336; Mon, 14 Aug 2023 05:08:23 -0700 (PDT) Received: from goliat.isc.local (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id u5-20020a1709063b8500b009930042510csm5600433ejf.222.2023.08.14.05.08.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Aug 2023 05:08:22 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 6/6] iio: adc: mcp3911: add support for the whole MCP39xx family Date: Mon, 14 Aug 2023 14:10:10 +0200 Message-ID: <20230814121010.184842-6-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230814121010.184842-1-marcus.folkesson@gmail.com> References: <20230814121010.184842-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add support for those. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson --- Notes: v2: - Use callbacks rather than matching against enum for determine chip variants v3: - Fix cosmetics v4: - Do not pollute output variable upon error in *_get_osr() functions. - Fix cosmetics v5: - Reorder text in Kconfig - change val to u32 for *_get_osr(), *_set_osr() and *_set_scale() - avoid ambiguity parameters in macro drivers/iio/adc/Kconfig | 6 +- drivers/iio/adc/mcp3911.c | 454 +++++++++++++++++++++++++++++++++----- 2 files changed, 403 insertions(+), 57 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index eb2b09ef5d5b..2e71a73d8c7d 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -774,8 +774,10 @@ config MCP3911 select IIO_BUFFER select IIO_TRIGGERED_BUFFER help - Say yes here to build support for Microchip Technology's MCP3911 - analog to digital converter. + Say yes here to build support for one of the following + Microchip Technology's analog to digital converters: + MCP3910, MCP3911, MCP3912, MCP3913, MCP3914, + MCP3918 and MCP3919. This driver can also be built as a module. If so, the module will be called mcp3911. diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index f1e02aa14e93..6c4605c8f09d 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -61,12 +61,55 @@ #define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 6) | (0 << 0)) & 0xff) #define MCP3911_REG_MASK GENMASK(4, 1) -#define MCP3911_NUM_CHANNELS 2 #define MCP3911_NUM_SCALES 6 +/* Registers compatible with MCP3910 */ +#define MCP3910_REG_STATUSCOM 0x0c +#define MCP3910_STATUSCOM_READ GENMASK(23, 22) +#define MCP3910_STATUSCOM_DRHIZ BIT(20) + +#define MCP3910_REG_GAIN 0x0b + +#define MCP3910_REG_CONFIG0 0x0d +#define MCP3910_CONFIG0_EN_OFFCAL BIT(23) +#define MCP3910_CONFIG0_OSR GENMASK(15, 13) + +#define MCP3910_REG_CONFIG1 0x0e +#define MCP3910_CONFIG1_CLKEXT BIT(6) +#define MCP3910_CONFIG1_VREFEXT BIT(7) + +#define MCP3910_REG_OFFCAL_CH0 0x0f +#define MCP3910_OFFCAL(ch) (MCP3910_REG_OFFCAL_CH0 + ch * 6) + +/* Maximal number of channels used by the MCP39XX family */ +#define MCP39XX_MAX_NUM_CHANNELS 8 + static const int mcp3911_osr_table[] = { 32, 64, 128, 256, 512, 1024, 2048, 4096 }; static u32 mcp3911_scale_table[MCP3911_NUM_SCALES][2]; +enum mcp3911_id { + MCP3910, + MCP3911, + MCP3912, + MCP3913, + MCP3914, + MCP3918, + MCP3919, +}; + +struct mcp3911; +struct mcp3911_chip_info { + const struct iio_chan_spec *channels; + unsigned int num_channels; + + int (*config)(struct mcp3911 *adc); + int (*get_osr)(struct mcp3911 *adc, u32 *val); + int (*set_osr)(struct mcp3911 *adc, u32 val); + int (*get_offset)(struct mcp3911 *adc, int channel, int *val); + int (*set_offset)(struct mcp3911 *adc, int channel, int val); + int (*set_scale)(struct mcp3911 *adc, int channel, u32 val); +}; + struct mcp3911 { struct spi_device *spi; struct mutex lock; @@ -74,14 +117,15 @@ struct mcp3911 { struct clk *clki; u32 dev_addr; struct iio_trigger *trig; - u32 gain[MCP3911_NUM_CHANNELS]; + u32 gain[MCP39XX_MAX_NUM_CHANNELS]; + const struct mcp3911_chip_info *chip; struct { - u32 channels[MCP3911_NUM_CHANNELS]; + u32 channels[MCP39XX_MAX_NUM_CHANNELS]; s64 ts __aligned(8); } scan; u8 tx_buf __aligned(IIO_DMA_MINALIGN); - u8 rx_buf[MCP3911_NUM_CHANNELS * 3]; + u8 rx_buf[MCP39XX_MAX_NUM_CHANNELS * 3]; }; static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) @@ -125,6 +169,102 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len return mcp3911_write(adc, reg, val, len); } +static int mcp3910_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3910_OFFCAL(channel), val, 3); +} + +static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + /* Write offset */ + ret = mcp3911_write(adc, MCP3910_OFFCAL(channel), val, 3); + if (ret) + return ret; + + /* Enable offset*/ + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_EN_OFFCAL, + MCP3910_CONFIG0_EN_OFFCAL, 3); +} + +static int mcp3911_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3911_OFFCAL(channel), val, 3); +} + +static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + /* Write offset */ + ret = mcp3911_write(adc, MCP3911_OFFCAL(channel), val, 3); + if (ret) + return ret; + + /* Enable offset */ + return mcp3911_update(adc, MCP3911_REG_STATUSCOM, + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); +} + +static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG0, val, 3); + if (ret) + return ret; + + osr = FIELD_GET(MCP3910_CONFIG0_OSR, *val); + *val = 32 << osr; + return ret; +} + +static int mcp3910_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3910_CONFIG0_OSR, val); + + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_OSR, osr, 3); +} + +static int mcp3911_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3911_CONFIG_OSR, val); + + return mcp3911_update(adc, MCP3911_REG_CONFIG, + MCP3911_CONFIG_OSR, osr, 2); +} + +static int mcp3911_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + if (ret) + return ret; + + osr = FIELD_GET(MCP3911_CONFIG_OSR, *val); + *val = 32 << osr; + return ret; +} + +static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3910_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 3); +} + +static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3911_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 1); +} + static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask) @@ -181,20 +321,18 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, break; case IIO_CHAN_INFO_OFFSET: - ret = mcp3911_read(adc, - MCP3911_OFFCAL(channel->channel), val, 3); + + ret = adc->chip->get_offset(adc, channel->channel, val); if (ret) goto out; ret = IIO_VAL_INT; break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + ret = adc->chip->get_osr(adc, val); if (ret) goto out; - *val = FIELD_GET(MCP3911_CONFIG_OSR, *val); - *val = 32 << *val; ret = IIO_VAL_INT; break; @@ -225,9 +363,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); - ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + ret = adc->chip->set_scale(adc, channel->channel, i); } } break; @@ -237,24 +373,13 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, goto out; } - /* Write offset */ - ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val, - 3); - if (ret) - goto out; - - /* Enable offset*/ - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + ret = adc->chip->set_offset(adc, channel->channel, val); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: for (int i = 0; i < ARRAY_SIZE(mcp3911_osr_table); i++) { if (val == mcp3911_osr_table[i]) { - val = FIELD_PREP(MCP3911_CONFIG_OSR, i); - ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + ret = adc->chip->set_osr(adc, i); break; } } @@ -324,12 +449,60 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) }, \ } +static const struct iio_chan_spec mcp3910_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + IIO_CHAN_SOFT_TIMESTAMP(2), +}; + static const struct iio_chan_spec mcp3911_channels[] = { MCP3911_CHAN(0), MCP3911_CHAN(1), IIO_CHAN_SOFT_TIMESTAMP(2), }; +static const struct iio_chan_spec mcp3912_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + IIO_CHAN_SOFT_TIMESTAMP(4), +}; + +static const struct iio_chan_spec mcp3913_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + IIO_CHAN_SOFT_TIMESTAMP(6), +}; + +static const struct iio_chan_spec mcp3914_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + MCP3911_CHAN(6), + MCP3911_CHAN(7), + IIO_CHAN_SOFT_TIMESTAMP(8), +}; + +static const struct iio_chan_spec mcp3918_channels[] = { + MCP3911_CHAN(0), + IIO_CHAN_SOFT_TIMESTAMP(1), +}; + +static const struct iio_chan_spec mcp3919_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + IIO_CHAN_SOFT_TIMESTAMP(3), +}; + static irqreturn_t mcp3911_trigger_handler(int irq, void *p) { struct iio_poll_func *pf = p; @@ -342,7 +515,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) .len = 1, }, { .rx_buf = adc->rx_buf, - .len = sizeof(adc->rx_buf), + .len = (adc->chip->num_channels - 1) * 3, }, }; int scan_index; @@ -381,23 +554,9 @@ static const struct iio_info mcp3911_info = { static int mcp3911_config(struct mcp3911 *adc) { - struct device *dev = &adc->spi->dev; u32 regval; int ret; - - ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); - - /* - * Fallback to "device-addr" due to historical mismatch between - * dt-bindings and implementation - */ - if (ret) - device_property_read_u32(dev, "device-addr", &adc->dev_addr); - if (adc->dev_addr > 3) { - dev_err(dev, "invalid device address (%i). Must be in range 0-3.\n", adc->dev_addr); - return -EINVAL; - } - dev_dbg(dev, "use device address %i\n", adc->dev_addr); + struct device *dev = &adc->spi->dev; ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) @@ -433,7 +592,102 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_STATUSCOM_READ; regval |= FIELD_PREP(MCP3911_STATUSCOM_READ, 0x02); - return mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + regval &= ~MCP3911_STATUSCOM_DRHIZ; + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 1); + + /* Disable offset to ignore any old values in offset register*/ + regval &= ~MCP3911_STATUSCOM_EN_OFFCAL; + + ret = mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3911_REG_GAIN, ®val, 1); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + + return mcp3911_write(adc, MCP3911_REG_GAIN, regval, 1); +} + +static int mcp3910_config(struct mcp3911 *adc) +{ + u32 regval; + int ret; + struct device *dev = &adc->spi->dev; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG1, ®val, 3); + if (ret) + return ret; + + regval &= ~MCP3910_CONFIG1_VREFEXT; + if (adc->vref) { + dev_dbg(dev, "use external voltage reference\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 1); + } else { + dev_dbg(dev, + "use internal voltage reference (1.2V)\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 0); + } + + regval &= ~MCP3910_CONFIG1_CLKEXT; + if (adc->clki) { + dev_dbg(dev, "use external clock as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 1); + } else { + dev_dbg(dev, + "use crystal oscillator as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 0); + } + + ret = mcp3911_write(adc, MCP3910_REG_CONFIG1, regval, 3); + if (ret) + return ret; + + ret = mcp3911_read(adc, MCP3910_REG_STATUSCOM, ®val, 3); + if (ret) + return ret; + + /* Address counter incremented, cycle through register types */ + regval &= ~MCP3910_STATUSCOM_READ; + regval |= FIELD_PREP(MCP3910_STATUSCOM_READ, 0x02); + + + regval &= ~MCP3910_STATUSCOM_DRHIZ; + if (device_property_present(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 1); + + ret = mcp3911_write(adc, MCP3910_REG_STATUSCOM, regval, 3); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3910_REG_GAIN, ®val, 3); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + ret = mcp3911_write(adc, MCP3910_REG_GAIN, regval, 3); + if (ret) + return ret; + + /* Disable offset to ignore any old values in offset register */ + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_EN_OFFCAL, + MCP3910_CONFIG0_EN_OFFCAL, 3); } static void mcp3911_cleanup_regulator(void *vref) @@ -471,6 +725,7 @@ static int mcp3911_probe(struct spi_device *spi) adc = iio_priv(indio_dev); adc->spi = spi; + adc->chip = spi_get_device_match_data(spi); adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { @@ -499,16 +754,21 @@ static int mcp3911_probe(struct spi_device *spi) } } - ret = mcp3911_config(adc); + /* + * Fallback to "device-addr" due to historical mismatch between + * dt-bindings and implementation. + */ + ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); if (ret) - return ret; + device_property_read_u32(dev, "device-addr", &adc->dev_addr); + if (adc->dev_addr > 3) { + dev_err_probe(dev, -EINVAL, + "invalid device address (%i). Must be in range 0-3.\n", + adc->dev_addr); + } + dev_dbg(dev, "use device address %i\n", adc->dev_addr); - if (device_property_read_bool(dev, "microchip,data-ready-hiz")) - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); - else - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + ret = adc->chip->config(adc); if (ret) return ret; @@ -517,7 +777,7 @@ static int mcp3911_probe(struct spi_device *spi) return ret; /* Set gain to 1 for all channels */ - for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { + for (int i = 0; i < adc->chip->num_channels - 1; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, MCP3911_GAIN_MASK(i), @@ -531,8 +791,8 @@ static int mcp3911_probe(struct spi_device *spi) indio_dev->info = &mcp3911_info; spi_set_drvdata(spi, indio_dev); - indio_dev->channels = mcp3911_channels; - indio_dev->num_channels = ARRAY_SIZE(mcp3911_channels); + indio_dev->channels = adc->chip->channels; + indio_dev->num_channels = adc->chip->num_channels; mutex_init(&adc->lock); @@ -571,14 +831,98 @@ static int mcp3911_probe(struct spi_device *spi) return devm_iio_device_register(dev, indio_dev); } +static const struct mcp3911_chip_info mcp3911_chip_info[] = { + [MCP3910] = { + .channels = mcp3910_channels, + .num_channels = ARRAY_SIZE(mcp3910_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3911] = { + .channels = mcp3911_channels, + .num_channels = ARRAY_SIZE(mcp3911_channels), + .config = mcp3911_config, + .get_osr = mcp3911_get_osr, + .set_osr = mcp3911_set_osr, + .get_offset = mcp3911_get_offset, + .set_offset = mcp3911_set_offset, + .set_scale = mcp3911_set_scale, + }, + [MCP3912] = { + .channels = mcp3912_channels, + .num_channels = ARRAY_SIZE(mcp3912_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3913] = { + .channels = mcp3913_channels, + .num_channels = ARRAY_SIZE(mcp3913_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3914] = { + .channels = mcp3914_channels, + .num_channels = ARRAY_SIZE(mcp3914_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3918] = { + .channels = mcp3918_channels, + .num_channels = ARRAY_SIZE(mcp3918_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3919] = { + .channels = mcp3919_channels, + .num_channels = ARRAY_SIZE(mcp3919_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, +}; static const struct of_device_id mcp3911_dt_ids[] = { - { .compatible = "microchip,mcp3911" }, + { .compatible = "microchip,mcp3910", .data = &mcp3911_chip_info[MCP3910] }, + { .compatible = "microchip,mcp3911", .data = &mcp3911_chip_info[MCP3911] }, + { .compatible = "microchip,mcp3912", .data = &mcp3911_chip_info[MCP3912] }, + { .compatible = "microchip,mcp3913", .data = &mcp3911_chip_info[MCP3913] }, + { .compatible = "microchip,mcp3914", .data = &mcp3911_chip_info[MCP3914] }, + { .compatible = "microchip,mcp3918", .data = &mcp3911_chip_info[MCP3918] }, + { .compatible = "microchip,mcp3919", .data = &mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(of, mcp3911_dt_ids); static const struct spi_device_id mcp3911_id[] = { - { "mcp3911", 0 }, + { "mcp3910", (kernel_ulong_t)&mcp3911_chip_info[MCP3910] }, + { "mcp3911", (kernel_ulong_t)&mcp3911_chip_info[MCP3911] }, + { "mcp3912", (kernel_ulong_t)&mcp3911_chip_info[MCP3912] }, + { "mcp3913", (kernel_ulong_t)&mcp3911_chip_info[MCP3913] }, + { "mcp3914", (kernel_ulong_t)&mcp3911_chip_info[MCP3914] }, + { "mcp3918", (kernel_ulong_t)&mcp3911_chip_info[MCP3918] }, + { "mcp3919", (kernel_ulong_t)&mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(spi, mcp3911_id);