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([38.114.108.131]) by smtp.gmail.com with ESMTPSA id r8-20020a638f48000000b00563e1ef0491sm11750627pgn.8.2023.08.16.04.13.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Aug 2023 04:13:40 -0700 (PDT) From: Keguang Zhang To: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Bogendoerfer , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Serge Semin , Keguang Zhang Subject: [PATCH v2 1/4] dt-bindings: mfd: syscon: Add compatibles for Loongson-1 syscon Date: Wed, 16 Aug 2023 19:13:07 +0800 Message-Id: <20230816111310.1656224-2-keguang.zhang@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230816111310.1656224-1-keguang.zhang@gmail.com> References: <20230816111310.1656224-1-keguang.zhang@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add Loongson LS1B and LS1C compatibles for system controller. Signed-off-by: Keguang Zhang --- V1 -> V2: Make the syscon compatibles more specific Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 8103154bbb52..d701fff02abe 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -49,6 +49,8 @@ properties: - hisilicon,peri-subctrl - hpe,gxp-sysreg - intel,lgm-syscon + - loongson,ls1b-dwmac-syscon + - loongson,ls1c-dwmac-syscon - marvell,armada-3700-usb2-host-misc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg From patchwork Wed Aug 16 11:13:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keguang Zhang X-Patchwork-Id: 13355036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 456A7C41513 for ; Wed, 16 Aug 2023 11:14:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244426AbjHPLOR (ORCPT ); Wed, 16 Aug 2023 07:14:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244106AbjHPLNs (ORCPT ); Wed, 16 Aug 2023 07:13:48 -0400 Received: from mail-oi1-x22f.google.com (mail-oi1-x22f.google.com [IPv6:2607:f8b0:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99078E40; Wed, 16 Aug 2023 04:13:47 -0700 (PDT) Received: by mail-oi1-x22f.google.com with SMTP id 5614622812f47-3a412653335so4753913b6e.1; Wed, 16 Aug 2023 04:13:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692184426; x=1692789226; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eY8kZ4eK5YIGKyTtQTf6aWVK8SyC/JpmCdjMfNKZmx0=; b=lfQ6GpJ4NFcIljhwEgFCU8ohpMgZnJAr4SwUtWG1fNHZHK1FvvC3kSclpw98bv8q3w usgQqJ/LtlZ5THn24bHVa+TRoeWCi3CHZ77gsz6EM7mtJu9EVZok0WS0YbudcUpH0ztT EUliPlyFTWmSqDlOl8bWWYURHPqUaALmQdJvOvJoWXG24f+j8d9ekWU93rwDb6Y5tXY3 bnvgo1KQtNQ1EXVsQH2uVp/i4AoCoqB5QrioIrNP9vyX4PWVwYn/lgcdMPQLCGZ+WcQL RS/hT+TEzdrIt6jPcOrcQMYrYNWg/2mMnR2jFuIJpOi+sphuyJIzNuUVYzsYeREtci+8 xrxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692184426; x=1692789226; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eY8kZ4eK5YIGKyTtQTf6aWVK8SyC/JpmCdjMfNKZmx0=; b=GbcXwTPH3fw+6XaisG9qdsj5y3akPpeA8IFQaeWqwDom2vIkyxgkp9sPER7jKgKz1/ pGc9OiC1Vu4/HgtaDPJnhPaoBX9yUgNAlFcUft3SIyeQ53zgXO/JOIUWlqV+A7pv75Y8 9oz2EP4Bl7kXqXJtiO8TdVtZbh570iVaCz5SUrO6AQMiFHRuEPUrwM5MZLANxsABn+b9 vF8jRkAByGvJoSqNF1wVGR31wiSHm/ldf4rezbx7C76jOV2LQoLQsA34YecBYlP3HMS6 onRF0OPx4Q9d7aAjhCngZew3DGguje0BzKVGq+XjkaYnLA31QyLFkBS9tI2jWvaVUZFu xlug== X-Gm-Message-State: AOJu0YxJ6GWGY3+quQ0lYdAhSm2PYbpJ7DHa518DIqAgs6cff6SXaBZN vB77CenmkJKQVJsRvns3Er36E/DvDV7mSOOi X-Google-Smtp-Source: AGHT+IFtNVqola0L7NRwZI+SnDJY+qmciey+S8mI5MeQ2DioVcESMDTnr3DjLWxNNQCcZFJEellvWw== X-Received: by 2002:a05:6808:1897:b0:3a7:146d:85b9 with SMTP id bi23-20020a056808189700b003a7146d85b9mr2101909oib.39.1692184426492; Wed, 16 Aug 2023 04:13:46 -0700 (PDT) Received: from kelvin-ThinkPad-L14-Gen-1.. ([38.114.108.131]) by smtp.gmail.com with ESMTPSA id r8-20020a638f48000000b00563e1ef0491sm11750627pgn.8.2023.08.16.04.13.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Aug 2023 04:13:46 -0700 (PDT) From: Keguang Zhang To: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Bogendoerfer , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Serge Semin , Keguang Zhang Subject: [PATCH v2 2/4] dt-bindings: net: Add Loongson-1 DWMAC glue layer Date: Wed, 16 Aug 2023 19:13:08 +0800 Message-Id: <20230816111310.1656224-3-keguang.zhang@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230816111310.1656224-1-keguang.zhang@gmail.com> References: <20230816111310.1656224-1-keguang.zhang@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add devicetree binding document for Loongson-1 DWMAC glue layer. Signed-off-by: Keguang Zhang Reviewed-by: Krzysztof Kozlowski --- V1 -> V2: Fix "clock-names" and "interrupt-names" property Rename the syscon property to "loongson,dwmac-syscon" Drop "phy-handle" and "phy-mode" requirement Revert adding loongson,ls1b-dwmac/loongson,ls1c-dwmac to snps,dwmac.yaml .../bindings/net/loongson,ls1x-dwmac.yaml | 98 +++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/loongson,ls1x-dwmac.yaml diff --git a/Documentation/devicetree/bindings/net/loongson,ls1x-dwmac.yaml b/Documentation/devicetree/bindings/net/loongson,ls1x-dwmac.yaml new file mode 100644 index 000000000000..cf5477450e29 --- /dev/null +++ b/Documentation/devicetree/bindings/net/loongson,ls1x-dwmac.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/loongson,ls1x-dwmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 DWMAC glue layer + +maintainers: + - Keguang Zhang + +select: + properties: + compatible: + contains: + enum: + - loongson,ls1b-dwmac + - loongson,ls1c-dwmac + required: + - compatible + +properties: + compatible: + items: + - enum: + - loongson,ls1b-dwmac + - loongson,ls1c-dwmac + - const: snps,dwmac-3.50a + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: stmmaceth + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: macirq + + loongson,dwmac-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon containing some extra configurations + including PHY interface mode. + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - loongson,dwmac-syscon + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + gmac0: ethernet@1fe10000 { + compatible = "loongson,ls1b-dwmac", "snps,dwmac-3.50a"; + reg = <0x1fe10000 0x10000>; + + clocks = <&clkc LS1X_CLKID_AHB>; + clock-names = "stmmaceth"; + + interrupt-parent = <&intc1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + + loongson,dwmac-syscon = <&syscon>; + + phy-handle = <&phy0>; + phy-mode = "mii"; + snps,pbl = <1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; From patchwork Wed Aug 16 11:13:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keguang Zhang X-Patchwork-Id: 13355038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83484C04FE0 for ; Wed, 16 Aug 2023 11:14:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244433AbjHPLOR (ORCPT ); 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([38.114.108.131]) by smtp.gmail.com with ESMTPSA id r8-20020a638f48000000b00563e1ef0491sm11750627pgn.8.2023.08.16.04.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Aug 2023 04:13:51 -0700 (PDT) From: Keguang Zhang To: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Bogendoerfer , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Serge Semin , Keguang Zhang Subject: [PATCH v2 3/4] net: stmmac: Add glue layer for Loongson-1 SoC Date: Wed, 16 Aug 2023 19:13:09 +0800 Message-Id: <20230816111310.1656224-4-keguang.zhang@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230816111310.1656224-1-keguang.zhang@gmail.com> References: <20230816111310.1656224-1-keguang.zhang@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This glue driver is created based on the arch-code implemented earlier with the platform-specific settings. Use syscon for SYSCON register access. Partialy based on the previous work by Serge Semin. Signed-off-by: Keguang Zhang --- V1 -> V2: Fix the build errors due to CONFIG_OF being unset Change struct reg_field definitions to const Rename the syscon property to "loongson,dwmac-syscon" Add MII PHY mode for LS1C drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-loongson1.c | 273 ++++++++++++++++++ 3 files changed, 285 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 06c6871f8788..a2b9e289aa36 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -239,6 +239,17 @@ config DWMAC_INTEL_PLAT the stmmac device driver. This driver is used for the Intel Keem Bay SoC. +config DWMAC_LOONGSON1 + tristate "Loongson1 GMAC support" + default MACH_LOONGSON32 + depends on OF && (MACH_LOONGSON32 || COMPILE_TEST) + help + Support for ethernet controller on Loongson1 SoC. + + This selects Loongson1 SoC glue layer support for the stmmac + device driver. This driver is used for Loongson1-based boards + like Loongson LS1B/LS1C. + config DWMAC_TEGRA tristate "NVIDIA Tegra MGBE support" depends on ARCH_TEGRA || COMPILE_TEST diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index 5b57aee19267..80e598bd4255 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o +obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o obj-$(CONFIG_DWMAC_IMX8) += dwmac-imx.o obj-$(CONFIG_DWMAC_TEGRA) += dwmac-tegra.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c new file mode 100644 index 000000000000..5210b5e8ae47 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c @@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Loongson-1 DWMAC glue layer + * + * Copyright (C) 2011-2023 Keguang Zhang + */ + +#include +#include +#include +#include +#include +#include + +#include "stmmac.h" +#include "stmmac_platform.h" + +/* Loongson-1 SYSCON Registers */ +#define LS1X_SYSCON0 (0x0) +#define LS1X_SYSCON1 (0x4) + +struct ls1x_dwmac_syscon { + const struct reg_field *reg_fields; + unsigned int nr_reg_fields; + int (*syscon_init)(struct plat_stmmacenet_data *plat); +}; + +struct ls1x_dwmac { + struct device *dev; + struct plat_stmmacenet_data *plat_dat; + const struct ls1x_dwmac_syscon *syscon; + struct regmap *regmap; + struct regmap_field *regmap_fields[]; +}; + +enum ls1b_dwmac_syscon_regfield { + GMAC1_USE_UART1, + GMAC1_USE_UART0, + GMAC1_SHUT, + GMAC0_SHUT, + GMAC1_USE_TXCLK, + GMAC0_USE_TXCLK, + GMAC1_USE_PWM23, + GMAC0_USE_PWM01, +}; + +enum ls1c_dwmac_syscon_regfield { + GMAC_SHUT, + PHY_INTF_SELI, +}; + +static const struct reg_field ls1b_dwmac_syscon_regfields[] = { + [GMAC1_USE_UART1] = REG_FIELD(LS1X_SYSCON0, 4, 4), + [GMAC1_USE_UART0] = REG_FIELD(LS1X_SYSCON0, 3, 3), + [GMAC1_SHUT] = REG_FIELD(LS1X_SYSCON1, 13, 13), + [GMAC0_SHUT] = REG_FIELD(LS1X_SYSCON1, 12, 12), + [GMAC1_USE_TXCLK] = REG_FIELD(LS1X_SYSCON1, 3, 3), + [GMAC0_USE_TXCLK] = REG_FIELD(LS1X_SYSCON1, 2, 2), + [GMAC1_USE_PWM23] = REG_FIELD(LS1X_SYSCON1, 1, 1), + [GMAC0_USE_PWM01] = REG_FIELD(LS1X_SYSCON1, 0, 0) +}; + +static const struct reg_field ls1c_dwmac_syscon_regfields[] = { + [GMAC_SHUT] = REG_FIELD(LS1X_SYSCON0, 6, 6), + [PHY_INTF_SELI] = REG_FIELD(LS1X_SYSCON1, 28, 30) +}; + +static int ls1b_dwmac_syscon_init(struct plat_stmmacenet_data *plat) +{ + struct ls1x_dwmac *dwmac = plat->bsp_priv; + struct regmap_field **regmap_fields = dwmac->regmap_fields; + + if (plat->bus_id) { + regmap_field_write(regmap_fields[GMAC1_USE_UART1], 1); + regmap_field_write(regmap_fields[GMAC1_USE_UART0], 1); + + switch (plat->phy_interface) { + case PHY_INTERFACE_MODE_RGMII: + regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 0); + regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 0); + break; + case PHY_INTERFACE_MODE_MII: + regmap_field_write(regmap_fields[GMAC1_USE_TXCLK], 1); + regmap_field_write(regmap_fields[GMAC1_USE_PWM23], 1); + break; + default: + dev_err(dwmac->dev, "Unsupported PHY mode %u\n", + plat->phy_interface); + return -EOPNOTSUPP; + } + + regmap_field_write(regmap_fields[GMAC1_SHUT], 0); + } else { + switch (plat->phy_interface) { + case PHY_INTERFACE_MODE_RGMII: + regmap_field_write(regmap_fields[GMAC0_USE_TXCLK], 0); + regmap_field_write(regmap_fields[GMAC0_USE_PWM01], 0); + break; + case PHY_INTERFACE_MODE_MII: + regmap_field_write(regmap_fields[GMAC0_USE_TXCLK], 1); + regmap_field_write(regmap_fields[GMAC0_USE_PWM01], 1); + break; + default: + dev_err(dwmac->dev, "Unsupported PHY mode %u\n", + plat->phy_interface); + return -EOPNOTSUPP; + } + + regmap_field_write(regmap_fields[GMAC0_SHUT], 0); + } + + return 0; +} + +static int ls1c_dwmac_syscon_init(struct plat_stmmacenet_data *plat) +{ + struct ls1x_dwmac *dwmac = plat->bsp_priv; + struct regmap_field **regmap_fields = dwmac->regmap_fields; + + switch (plat->phy_interface) { + case PHY_INTERFACE_MODE_MII: + regmap_field_write(regmap_fields[PHY_INTF_SELI], 0); + break; + case PHY_INTERFACE_MODE_RMII: + regmap_field_write(regmap_fields[PHY_INTF_SELI], 4); + break; + default: + dev_err(dwmac->dev, "Unsupported PHY-mode %u\n", + plat->phy_interface); + return -EOPNOTSUPP; + } + + regmap_field_write(regmap_fields[GMAC_SHUT], 0); + + return 0; +} + +static const struct ls1x_dwmac_syscon ls1b_dwmac_syscon = { + .reg_fields = ls1b_dwmac_syscon_regfields, + .nr_reg_fields = ARRAY_SIZE(ls1b_dwmac_syscon_regfields), + .syscon_init = ls1b_dwmac_syscon_init, +}; + +static const struct ls1x_dwmac_syscon ls1c_dwmac_syscon = { + .reg_fields = ls1c_dwmac_syscon_regfields, + .nr_reg_fields = ARRAY_SIZE(ls1c_dwmac_syscon_regfields), + .syscon_init = ls1c_dwmac_syscon_init, +}; + +static int ls1x_dwmac_init(struct platform_device *pdev, void *priv) +{ + struct ls1x_dwmac *dwmac = priv; + int ret; + + ret = devm_regmap_field_bulk_alloc(dwmac->dev, dwmac->regmap, + dwmac->regmap_fields, + dwmac->syscon->reg_fields, + dwmac->syscon->nr_reg_fields); + if (ret) + return ret; + + if (dwmac->syscon->syscon_init) { + ret = dwmac->syscon->syscon_init(dwmac->plat_dat); + if (ret) + return ret; + } + + return 0; +} + +static const struct of_device_id ls1x_dwmac_syscon_match[] = { + { + .compatible = "loongson,ls1b-dwmac-syscon", + .data = &ls1b_dwmac_syscon, + }, + { + .compatible = "loongson,ls1c-dwmac-syscon", + .data = &ls1c_dwmac_syscon, + }, + { } +}; + +static int ls1x_dwmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + struct device_node *syscon_np; + const struct of_device_id *match; + struct regmap *regmap; + struct ls1x_dwmac *dwmac; + const struct ls1x_dwmac_syscon *syscon; + size_t size; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return ret; + + /* Probe syscon */ + syscon_np = + of_parse_phandle(pdev->dev.of_node, "loongson,dwmac-syscon", 0); + if (!syscon_np) { + dev_err(&pdev->dev, "missing loongson,dwmac-syscon property\n"); + return -ENODEV; + } + + match = of_match_node(ls1x_dwmac_syscon_match, syscon_np); + if (!match) { + dev_err(&pdev->dev, "no matching node found in dtb\n"); + of_node_put(syscon_np); + return -EINVAL; + } + syscon = (const struct ls1x_dwmac_syscon *)match->data; + + regmap = syscon_node_to_regmap(syscon_np); + of_node_put(syscon_np); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret); + return ret; + } + + size = syscon->nr_reg_fields * sizeof(struct regmap_field *); + dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac) + size, GFP_KERNEL); + if (!dwmac) + return -ENOMEM; + + plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) { + dev_err(&pdev->dev, "dt configuration failed\n"); + return PTR_ERR(plat_dat); + } + + plat_dat->bsp_priv = dwmac; + plat_dat->init = ls1x_dwmac_init; + dwmac->dev = &pdev->dev; + dwmac->plat_dat = plat_dat; + dwmac->syscon = syscon; + dwmac->regmap = regmap; + + ret = stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); + if (ret) + goto err_remove_config_dt; + + return 0; + +err_remove_config_dt: + if (pdev->dev.of_node) + stmmac_remove_config_dt(pdev, plat_dat); + + return ret; +} + +static const struct of_device_id ls1x_dwmac_match[] = { + { .compatible = "loongson,ls1b-dwmac" }, + { .compatible = "loongson,ls1c-dwmac" }, + { } +}; +MODULE_DEVICE_TABLE(of, ls1x_dwmac_match); + +static struct platform_driver ls1x_dwmac_driver = { + .probe = ls1x_dwmac_probe, + .remove_new = stmmac_pltfr_remove, + .driver = { + .name = "loongson1-dwmac", + .of_match_table = ls1x_dwmac_match, + }, +}; +module_platform_driver(ls1x_dwmac_driver); + +MODULE_AUTHOR("Keguang Zhang "); +MODULE_DESCRIPTION("Loongson1 DWMAC glue layer"); +MODULE_LICENSE("GPL"); From patchwork Wed Aug 16 11:13:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keguang Zhang X-Patchwork-Id: 13355037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AD52C04E69 for ; Wed, 16 Aug 2023 11:14:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244446AbjHPLOS (ORCPT ); Wed, 16 Aug 2023 07:14:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244252AbjHPLN6 (ORCPT ); Wed, 16 Aug 2023 07:13:58 -0400 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3104E40; 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([38.114.108.131]) by smtp.gmail.com with ESMTPSA id r8-20020a638f48000000b00563e1ef0491sm11750627pgn.8.2023.08.16.04.13.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Aug 2023 04:13:56 -0700 (PDT) From: Keguang Zhang To: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Bogendoerfer , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Serge Semin , Keguang Zhang Subject: [PATCH v2 4/4] MAINTAINERS: Update MIPS/LOONGSON1 entry Date: Wed, 16 Aug 2023 19:13:10 +0800 Message-Id: <20230816111310.1656224-5-keguang.zhang@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230816111310.1656224-1-keguang.zhang@gmail.com> References: <20230816111310.1656224-1-keguang.zhang@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add a new F: entry for Loongson1 DWMAC driver. Add a new F: entry for all Loongson-1 dt-bindings. Signed-off-by: Keguang Zhang --- V1 -> V2: Improve the commit message MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d8700b009e22..4621facb2cc8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14313,9 +14313,11 @@ MIPS/LOONGSON1 ARCHITECTURE M: Keguang Zhang L: linux-mips@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/*/loongson,ls1x-*.yaml F: arch/mips/include/asm/mach-loongson32/ F: arch/mips/loongson32/ F: drivers/*/*loongson1* +F: drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c MIPS/LOONGSON2EF ARCHITECTURE M: Jiaxun Yang