From patchwork Thu Aug 17 12:05:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09AFAC2FC18 for ; Thu, 17 Aug 2023 12:04:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350601AbjHQMDh (ORCPT ); Thu, 17 Aug 2023 08:03:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350611AbjHQMDI (ORCPT ); Thu, 17 Aug 2023 08:03:08 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 730382112; Thu, 17 Aug 2023 05:02:58 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id 38308e7fff4ca-2b9fa64db41so117274041fa.1; Thu, 17 Aug 2023 05:02:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273777; x=1692878577; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=AMXrXLc0wj0xEWmwzIdD5Z8/MM23PAnf+hN4LdAZ/e4=; b=JQNPVTCMeMndORrCxRNralYWboNuL5ZNfBSyQPB1jbQtYXd5KX3jK6RSM5hlgfPCxK wxlvmjJWBFIn6WGNK8T5oADEBP+YtWA/91sqxDCWaXfuiaJ5LqK8Kc9SvdZLyrnrkALy y95wwWeRrAautvuGT7qxLDtchK9nlNHLuQMb68T41HJf3lKDEEOKo88oUnOqDawVcopP +0SoNKWAsFrrqMW7dshQn/IncGwrR3HVkUUpB33EiDURD83hN/b2Necj1e1youRIsAiQ BOeM56SVPUZoHsleRZGaiPgZaaJLyFywFxxb2OeoEZz+hSbuWYQ+ZmjeE+/eVxkMlV9B uIJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273777; x=1692878577; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=AMXrXLc0wj0xEWmwzIdD5Z8/MM23PAnf+hN4LdAZ/e4=; b=L5kAhKCMvbWFhG+Ow7TIoctIVt2Wl+a8cxdmNmUu4niGWt4+7A0Tuyi9tPjBHWB5qC 4BnviCrN3HoSPImGnE8VTGCa2d8lnl6okIFerUdj6S4YIcuHMI64H4tQ351qRyCUaHfO RIuRM16kP+HtShF48Z3uIutaq3zFRb1Ew0thKSSaPVXlaQb3EviqdElAXlujsXe0XNn/ UOgoQYzC/vngubmm5FI8CtK61yATFFhfF+gUZxa/BN8MjePSnugax/OrNy6P4G52Qags PVsty09xCO9i8NU48fMb70KLdEjN3iX/qpM9Nf+LWcPAowVnOscfjQ2Cv94KQWhX6bYI jqSA== X-Gm-Message-State: AOJu0YxFfkudeJw3qmzWKnf8C08247mGhTO/uunQiGlg9MVl8yGw9+7q H+q5K5tKyWtSsbXmaPmD/Js= X-Google-Smtp-Source: AGHT+IH0RQjh3vLiZFv8CN6AExeVHERgbftGnQ0xnAQ4Xk7c1MHPKzoDAJy4Yt0HiVkE8p5YcNptqA== X-Received: by 2002:a2e:97c8:0:b0:2b9:2e85:2fa0 with SMTP id m8-20020a2e97c8000000b002b92e852fa0mr3854989ljj.15.1692273776384; Thu, 17 Aug 2023 05:02:56 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.02.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:02:55 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v6 1/6] dt-bindings: iio: adc: mcp3911: add support for the whole MCP39xx family Date: Thu, 17 Aug 2023 14:05:13 +0200 Message-ID: <20230817120518.153728-1-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add those to the compatible string as the driver support is extended. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson Reviewed-by: Krzysztof Kozlowski --- Notes: v2: - No changes v3: - No changes v4: - No changes v5: - No changes v6: - No changes .../devicetree/bindings/iio/adc/microchip,mcp3911.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml index f7b3fde4115a..06951ec5f5da 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -18,7 +18,13 @@ description: | properties: compatible: enum: + - microchip,mcp3910 - microchip,mcp3911 + - microchip,mcp3912 + - microchip,mcp3913 + - microchip,mcp3914 + - microchip,mcp3918 + - microchip,mcp3919 reg: maxItems: 1 From patchwork Thu Aug 17 12:05:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84A55C27C7A for ; Thu, 17 Aug 2023 12:04:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350614AbjHQMDi (ORCPT ); Thu, 17 Aug 2023 08:03:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350616AbjHQMDJ (ORCPT ); Thu, 17 Aug 2023 08:03:09 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80A2A2708; Thu, 17 Aug 2023 05:03:00 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id 38308e7fff4ca-2b9aa1d3029so118125751fa.2; Thu, 17 Aug 2023 05:03:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273779; x=1692878579; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R5VEfMZdJoR1mNUx2hBXldi+YDCIruL2v0+AL2aEWyQ=; b=JIYjdBuk4ITkBNqK67p6Y8hxOsbSJ7qgLDbQP93zCoXFrB34/W/zh8mj84yfW+eNW5 +dIIxD46y5+xF3xucQsw0H+aRLVWlNjNHSfXqmOG72ggAmUZxN2pw1zPw03rjOTTL3y1 9IyENWFTD60W9Gl/oaQkJT+lVcpdjA3CkG8EYRqiVsk3uCCgfYQJ6ZK7xHULaZRfTb+I iMU4Z0/zYphjoAjj45Jcj+lc/NRJ/UhdfW/BYFkISSKap/Echme9SBxNX6E8xqKwpW21 YgKEbLSUXCxXibQSy6ZdiPFFnLmWL56l/MhHuha4Lu/b1xNxdgeratQZqbC7AndDQ3Fm bYEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273779; x=1692878579; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R5VEfMZdJoR1mNUx2hBXldi+YDCIruL2v0+AL2aEWyQ=; b=exgI9L9KOW1Kj7U4Hv5q783lvgVSdPFwtz53Blat9NWm+GRN7GHnisQofCJRmEfJM/ LRbUpwmt+3w0Uq30JpVcJQmu9+fII1MajkO5NOSrqQP2DkZKwvD3ICTMYMkJ/cE8ASoa 69xxFFrbTrcFGcOcYscmZf8XUDe7vbvrMu8+LR49QY/JPdhEtmaosEcdDLG5zYP3PZxH iEZL9CQVkkW02LUxXPq2zGqPFkF1U4jCVWvwpeJYOXxaxyRRXjCBY406JjY/Ciuw9sZS iMecTVYnoYNF+FSveZkHnDjzwISE/z03T+6iUvjU74yd7G9T59FzPZnRtkWkTHX1+VUy MJfQ== X-Gm-Message-State: AOJu0YwgHjgMmQio+3PNNjmqsxMZjWOXJNDdO66KjoUKkMCnlesGGKxV fBBt24ICsMeuZ58uLAqf/tg= X-Google-Smtp-Source: AGHT+IHLsuCIsUqk2ijtb3m9YzVWFeMNLRVfvozm2B7rCUwgRey1Y3W0Sgm2mF3myPV8nN9PgXRZKA== X-Received: by 2002:a2e:9c44:0:b0:2b6:ccd6:3ec2 with SMTP id t4-20020a2e9c44000000b002b6ccd63ec2mr3565220ljj.36.1692273778470; Thu, 17 Aug 2023 05:02:58 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.02.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:02:57 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/6] iio: adc: mcp3911: make use of dev_err_probe() Date: Thu, 17 Aug 2023 14:05:14 +0200 Message-ID: <20230817120518.153728-2-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230817120518.153728-1-marcus.folkesson@gmail.com> References: <20230817120518.153728-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Simplify code by switch to dev_err_probe(). Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v5: - New patch in this series v6: - fix xmas tree order drivers/iio/adc/mcp3911.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 974c5bd923a6..a6612d718bf7 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -466,6 +466,7 @@ static const struct iio_trigger_ops mcp3911_trigger_ops = { static int mcp3911_probe(struct spi_device *spi) { + struct device *dev = &spi->dev; struct iio_dev *indio_dev; struct mcp3911 *adc; int ret; @@ -482,10 +483,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get regulator (%ld)\n", - PTR_ERR(adc->vref)); - return PTR_ERR(adc->vref); + return dev_err_probe(dev, PTR_ERR(adc->vref), "failed to get regulator\n"); } } else { @@ -504,10 +502,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get adc clk (%ld)\n", - PTR_ERR(adc->clki)); - return PTR_ERR(adc->clki); + return dev_err_probe(dev, PTR_ERR(adc->clki), "failed to get adc clk\n"); } } From patchwork Thu Aug 17 12:05:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE1EBC41513 for ; Thu, 17 Aug 2023 12:04:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350608AbjHQMDi (ORCPT ); Thu, 17 Aug 2023 08:03:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350619AbjHQMDK (ORCPT ); Thu, 17 Aug 2023 08:03:10 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 367E9103; Thu, 17 Aug 2023 05:03:02 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2bba6fc4339so6873501fa.2; Thu, 17 Aug 2023 05:03:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273780; x=1692878580; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1BdcyZ023XGdV+lNaOsWFsLzI/R8e0ibpOpGquUVe2w=; b=JcF079ZtynJb8DYpeHLemtL6u/DyITBmhio+dzzawGzK2DtvhpcAEg7eMTUwHyHknx SAseMPzJZ937oeL3qJRS+bfgiBNzKVqVSIuoyk+D/saQYH7FAfIekRspqvtBvThbstO2 feH6oWQidI/xpW6+0XxBQ0gY2KinJIzpVbY1mKssaU1qECObM6iEOHEv2ToxF/VVka2E oEfBULaxcBebbbgW7/8kmksYoO2jIzQdsfefFum+RUm3qTCG3qLXjQ2szST+DXmHUFaS NyZpJj6R4Xo+eOC852NbSsmUk9NnjVUmYxbT3WuUIcaAjbO63o+yD0dnOXsr7tMNA8mM d1fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273780; x=1692878580; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1BdcyZ023XGdV+lNaOsWFsLzI/R8e0ibpOpGquUVe2w=; b=k1S4DDJldL3qWPSWPu0NNyey3dW847bfETa03Hsb9rYv4qoV8WO9Y28/2+0T1Fwz6D vkLuf/A8TbtibnyOA578zWdGaIhST4oLglZOP1qA//cN3GcWbR5NGFep0ZePdbAcjzbY RhfSP1clgnkfj6Onv1+e8QP015bIdM+OZRgXAeh4ffb7mOmJo+bmvi3k8yrtexTr8jzc EllKuhReLY6qkqsM0+Nf0qmwQWJs8G5GiNOYgmrOb6WZuUO45+mk8RSoPCzJ4LouCia/ clsCnB54RiuRkgrJ9MlXlg3dgJ2UPLJIvxUvZJJrDETmL7Of1lS/0ICSpayazGF/wxCC nSNg== X-Gm-Message-State: AOJu0YzY3Gc8bmuY0OYmWQO2a+bvA38C8I7XxvlzJY+Qw3N+JBiXWjhq Uassj7LNKgcz6LsoBwPOZRQ= X-Google-Smtp-Source: AGHT+IHCwFunyt0hEefV/1BuAyLuVb9GQhq/J9UKzbw5rlS3oIgVA3KOxdDUQ+N51gAjMMFzRotuwQ== X-Received: by 2002:a2e:b047:0:b0:2b6:c790:150a with SMTP id d7-20020a2eb047000000b002b6c790150amr3986474ljl.22.1692273780388; Thu, 17 Aug 2023 05:03:00 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:02:59 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 3/6] iio: adc: mcp3911: simplify usage of spi->dev Date: Thu, 17 Aug 2023 14:05:15 +0200 Message-ID: <20230817120518.153728-3-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230817120518.153728-1-marcus.folkesson@gmail.com> References: <20230817120518.153728-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Replace the usage of `adc->spi->dev` with `dev` to make the code prettier. Reviewed-by: Andy Shevchenko Suggested-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v4: - New patch in this series v5: - Introduce `struct device *dev` to more functions v6: - cosmetics drivers/iio/adc/mcp3911.c | 58 ++++++++++++++++++--------------------- 1 file changed, 26 insertions(+), 32 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index a6612d718bf7..2778abde239b 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -269,6 +269,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, static int mcp3911_calc_scale_table(struct mcp3911 *adc) { + struct device *dev = &adc->spi->dev; u32 ref = MCP3911_INT_VREF_MV; u32 div; int ret; @@ -277,9 +278,7 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) if (adc->vref) { ret = regulator_get_voltage(adc->vref); if (ret < 0) { - dev_err(&adc->spi->dev, - "failed to get vref voltage: %d\n", - ret); + dev_err(dev, "failed to get vref voltage: %d\n", ret); return ret; } @@ -337,6 +336,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) struct iio_poll_func *pf = p; struct iio_dev *indio_dev = pf->indio_dev; struct mcp3911 *adc = iio_priv(indio_dev); + struct device *dev = &adc->spi->dev; struct spi_transfer xfer[] = { { .tx_buf = &adc->tx_buf, @@ -354,8 +354,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) adc->tx_buf = MCP3911_REG_READ(MCP3911_CHANNEL(0), adc->dev_addr); ret = spi_sync_transfer(adc->spi, xfer, ARRAY_SIZE(xfer)); if (ret < 0) { - dev_warn(&adc->spi->dev, - "failed to get conversion data\n"); + dev_warn(dev, "failed to get conversion data\n"); goto out; } @@ -396,12 +395,10 @@ static int mcp3911_config(struct mcp3911 *adc) if (ret) device_property_read_u32(dev, "device-addr", &adc->dev_addr); if (adc->dev_addr > 3) { - dev_err(&adc->spi->dev, - "invalid device address (%i). Must be in range 0-3.\n", - adc->dev_addr); + dev_err(dev, "invalid device address (%i). Must be in range 0-3.\n", adc->dev_addr); return -EINVAL; } - dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr); + dev_dbg(dev, "use device address %i\n", adc->dev_addr); ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) @@ -409,21 +406,19 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_CONFIG_VREFEXT; if (adc->vref) { - dev_dbg(&adc->spi->dev, "use external voltage reference\n"); + dev_dbg(dev, "use external voltage reference\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use internal voltage reference (1.2V)\n"); + dev_dbg(dev, "use internal voltage reference (1.2V)\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 0); } regval &= ~MCP3911_CONFIG_CLKEXT; if (adc->clki) { - dev_dbg(&adc->spi->dev, "use external clock as clocksource\n"); + dev_dbg(dev, "use external clock as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use crystal oscillator as clocksource\n"); + dev_dbg(dev, "use crystal oscillator as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 0); } @@ -471,14 +466,14 @@ static int mcp3911_probe(struct spi_device *spi) struct mcp3911 *adc; int ret; - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); if (!indio_dev) return -ENOMEM; adc = iio_priv(indio_dev); adc->spi = spi; - adc->vref = devm_regulator_get_optional(&adc->spi->dev, "vref"); + adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; @@ -491,13 +486,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - ret = devm_add_action_or_reset(&spi->dev, - mcp3911_cleanup_regulator, adc->vref); + ret = devm_add_action_or_reset(dev, mcp3911_cleanup_regulator, adc->vref); if (ret) return ret; } - adc->clki = devm_clk_get_enabled(&adc->spi->dev, NULL); + adc->clki = devm_clk_get_enabled(dev, NULL); if (IS_ERR(adc->clki)) { if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; @@ -510,7 +504,7 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - if (device_property_read_bool(&adc->spi->dev, "microchip,data-ready-hiz")) + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, 0, 2); else @@ -544,15 +538,15 @@ static int mcp3911_probe(struct spi_device *spi) mutex_init(&adc->lock); if (spi->irq > 0) { - adc->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d", - indio_dev->name, - iio_device_id(indio_dev)); + adc->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); if (!adc->trig) return -ENOMEM; adc->trig->ops = &mcp3911_trigger_ops; iio_trigger_set_drvdata(adc->trig, adc); - ret = devm_iio_trigger_register(&spi->dev, adc->trig); + ret = devm_iio_trigger_register(dev, adc->trig); if (ret) return ret; @@ -561,20 +555,20 @@ static int mcp3911_probe(struct spi_device *spi) * Some platforms might not allow the option to power it down so * don't enable the interrupt to avoid extra load on the system. */ - ret = devm_request_irq(&spi->dev, spi->irq, - &iio_trigger_generic_data_rdy_poll, IRQF_NO_AUTOEN | IRQF_ONESHOT, - indio_dev->name, adc->trig); + ret = devm_request_irq(dev, spi->irq, + &iio_trigger_generic_data_rdy_poll, + IRQF_NO_AUTOEN | IRQF_ONESHOT, + indio_dev->name, adc->trig); if (ret) return ret; } - ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, - NULL, - mcp3911_trigger_handler, NULL); + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, + mcp3911_trigger_handler, NULL); if (ret) return ret; - return devm_iio_device_register(&adc->spi->dev, indio_dev); + return devm_iio_device_register(dev, indio_dev); } static const struct of_device_id mcp3911_dt_ids[] = { From patchwork Thu Aug 17 12:05:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A5DC2FC22 for ; Thu, 17 Aug 2023 12:04:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350611AbjHQMDi (ORCPT ); Thu, 17 Aug 2023 08:03:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350621AbjHQMDK (ORCPT ); Thu, 17 Aug 2023 08:03:10 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABDCB26A8; Thu, 17 Aug 2023 05:03:03 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4fe3b86cec1so11999837e87.2; Thu, 17 Aug 2023 05:03:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273782; x=1692878582; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yb7oZIgg/B3E+dBegFgOfB9mM2QYvQbTAUSvlXHH+Sc=; b=LuDh+fSVz9XUIj4A+4gUB/0BhP/OgCcthKsuPXon36R93RAV+YfliYwhUw8oqW/7a8 82ThO6+g9rzRL34VwOQLLLKcFm08VO7eSWAbyi3pgYaHG97p9GsSTR+En93P8KLceH4q VJYUJnxXU24Vyt4vN+C4C8ONpihKT+UCxa5taCf9rjzhcgrfEPrAPOF1FfU72iTuCJ0t nIlQkvF1pWsLQruk+rct1l15TPUe6+c2Q+1gyoIk5iTwp59ulAawCwKiF8jFfr2AQN2v clgL5PJHdb/Rbv4/FFSREMdJ8YzWPQkX0pGqD4HRSKNOLWmKswgdLQtxtsTX7hqPL5kj Kgww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273782; x=1692878582; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yb7oZIgg/B3E+dBegFgOfB9mM2QYvQbTAUSvlXHH+Sc=; b=ZdWNvANbBwc+zQfBLNNMFbXEeUILsF0r6nMPKF5RigpUjYAoXxNXmAK45KMLl2Xt8n AvFRaJavhPYxWN2bZq1sio7lS3FdmmN+Km68z9IKpDoaU8lW6oxub7gTFsuPjBwU2Yep ky4oNAEQuL7hvhA0I6Hr5n1p65JbDAfDAFgU/7zP0vXxc8NfZrHMuoDLewIZZj6lnGuU TwSyB/DOq1u0FvlOwLnnvdHQ8Q5BihtOoTjXYXDl6n8FoYidnbZG0hXDfiftFJbEFqUw bvqrzXyBp1HjDIkqfGvq1Kgzb5lniv2Qm92i9qa4n9ug4juaCwfxPv5LhH+N5RqEPCtH 9pNg== X-Gm-Message-State: AOJu0Yy7k0exDc4UD7qON2Q8J8nNX2hhuRhxUGCiTDowUZoP7NkppZf4 U4aQjpgBLgh5xr3LX/4kg4s= X-Google-Smtp-Source: AGHT+IEy7l/mUxc1HoHZnPcnAVsEONNeHw5AJ9CUE5YL7YrtnLNbv+kj1wdhAVRXnugnwVvA4nBlFA== X-Received: by 2002:a2e:b285:0:b0:2b4:5cad:f246 with SMTP id 5-20020a2eb285000000b002b45cadf246mr3699537ljx.7.1692273781886; Thu, 17 Aug 2023 05:03:01 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.03.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:03:01 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/6] iio: adc: mcp3911: fix indentation Date: Thu, 17 Aug 2023 14:05:16 +0200 Message-ID: <20230817120518.153728-4-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230817120518.153728-1-marcus.folkesson@gmail.com> References: <20230817120518.153728-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The whole file does not make use of indentation properly. Do something about it. Signed-off-by: Marcus Folkesson Reviewed-by: Andy Shevchenko --- Notes: v4: - New patch in this series v5: - Cosmetics v6: - Little rewording in commit message drivers/iio/adc/mcp3911.c | 41 +++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 2778abde239b..06c8c5ac7781 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -33,7 +33,7 @@ #define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch)) #define MCP3911_REG_STATUSCOM 0x0a -#define MCP3911_STATUSCOM_DRHIZ BIT(12) +#define MCP3911_STATUSCOM_DRHIZ BIT(12) #define MCP3911_STATUSCOM_READ GENMASK(7, 6) #define MCP3911_STATUSCOM_CH1_24WIDTH BIT(4) #define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3) @@ -111,8 +111,7 @@ static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) return spi_write(adc->spi, &val, len + 1); } -static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, - u32 val, u8 len) +static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len) { u32 tmp; int ret; @@ -127,8 +126,8 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, } static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - long mask) + struct iio_chan_spec const *chan, + long mask) { switch (mask) { case IIO_CHAN_INFO_SCALE: @@ -141,9 +140,9 @@ static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, } static int mcp3911_read_avail(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - const int **vals, int *type, int *length, - long info) + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) { switch (info) { case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -212,8 +211,8 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, } static int mcp3911_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *channel, int val, - int val2, long mask) + struct iio_chan_spec const *channel, int val, + int val2, long mask) { struct mcp3911 *adc = iio_priv(indio_dev); int ret = -EINVAL; @@ -223,12 +222,12 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: for (int i = 0; i < MCP3911_NUM_SCALES; i++) { if (val == mcp3911_scale_table[i][0] && - val2 == mcp3911_scale_table[i][1]) { + val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + MCP3911_GAIN_MASK(channel->channel), + MCP3911_GAIN_VAL(channel->channel, i), 1); } } break; @@ -246,8 +245,8 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, /* Enable offset*/ ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -255,7 +254,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, if (val == mcp3911_osr_table[i]) { val = FIELD_PREP(MCP3911_CONFIG_OSR, i); ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + val, 2); break; } } @@ -506,10 +505,10 @@ static int mcp3911_probe(struct spi_device *spi) if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); + 0, 2); else ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + MCP3911_STATUSCOM_DRHIZ, 2); if (ret) return ret; @@ -517,12 +516,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - /* Set gain to 1 for all channels */ + /* Set gain to 1 for all channels */ for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(i), - MCP3911_GAIN_VAL(i, 0), 1); + MCP3911_GAIN_MASK(i), + MCP3911_GAIN_VAL(i, 0), 1); if (ret) return ret; } From patchwork Thu Aug 17 12:05:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28771C2FC20 for ; Thu, 17 Aug 2023 12:04:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350625AbjHQMDj (ORCPT ); Thu, 17 Aug 2023 08:03:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350630AbjHQMDP (ORCPT ); Thu, 17 Aug 2023 08:03:15 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 477B8273C; Thu, 17 Aug 2023 05:03:06 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b9d07a8d84so121390431fa.3; Thu, 17 Aug 2023 05:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273784; x=1692878584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SdwRwKvnz3Z20+s9tNz6mtV9CNaQwcE4bakky09bUQU=; b=haqmKJNllfHprykmSlGVEYKvCV+U4b0WzYKXVtO0ZJ8iCy5QYVUxWVq31HdDUIz3h1 dvWOx0oiJfAI00Pmv/ZeLiLZ9B8FNR4ug1CkubsSBD5PZjXTQ6GrwZapCXw2eFz5tyPN pgzgzQFWyunbdvNt/fg5M1lmccJHvFT/lp1JKHpYNWloX7+UAv92c07Q2sXsMbAuEZOS dYQDcckkKlhp9g8k/uUEpHj7pz6v0W5vbbt1Cmr6XTP+fyO+9IEqFmtUYZCZm/prO0aX hebzWuq+IbU7MR4mfXe0Z70TKbU3XqVXXxy2RDUlp39q634pDIXXiSWrXzEYaY29+mzj Vzdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273784; x=1692878584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SdwRwKvnz3Z20+s9tNz6mtV9CNaQwcE4bakky09bUQU=; b=L26sr+hi3TIzlvbsHxX/gaSMYBxaWpOVu7SP+4uQwITjyOr3Z5Cu/37fyM5Sz0QKAm 6BUWan8Vikf0VtkX/ktvtnGpDVU7Uap2rbPUDcY78KD/gTbLIIcOslutW00M31RSfuaz 6od1rQkE7FIe5POxGXLfhfH2CH5KS0ms6P2iS1JqGqikFAf5Gc8BC/IX0JGZ2OaQgyt7 32PMAc+AKipSrZe1V6+1eM9k6XXqmSolnjA3bzTszhp8XQ12IanJ606oW2gczrYsY8U/ nCt4U1+rajTRynmKb3vd2r0xm890XWLIKXhQWOTuwDJreOQYhjXthBlGaGu5xGyKCPVz wyZg== X-Gm-Message-State: AOJu0YyxBbHG4wMPBdM9E60gKmlgALiXuvNWNGjEEGJrxKfJaKR8XK7O xd4PIM1DOLIdOnseud0fZbuGAMQoGJbvGsZn X-Google-Smtp-Source: AGHT+IFUFbj2Oz9yjX58UklqRWkJ8XBlw1BmWkcFAw/EtvA+pIm8BJbDg3KlcLTucS9jGvyDSuUHVg== X-Received: by 2002:a2e:9bd0:0:b0:2b6:e361:4b3c with SMTP id w16-20020a2e9bd0000000b002b6e3614b3cmr3710501ljj.14.1692273784228; Thu, 17 Aug 2023 05:03:04 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.03.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:03:02 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 5/6] iio: adc: mcp3911: avoid ambiguity parameters in macros Date: Thu, 17 Aug 2023 14:05:17 +0200 Message-ID: <20230817120518.153728-5-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230817120518.153728-1-marcus.folkesson@gmail.com> References: <20230817120518.153728-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Name macro parameters after what they represent instead of 'x'. Signed-off-by: Marcus Folkesson Reviewed-by: Andy Shevchenko --- Notes: v5: - New patch in this series v6: - change 'ch' to '(ch)' drivers/iio/adc/mcp3911.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 06c8c5ac7781..9167f0ffa4e3 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -29,8 +29,8 @@ #define MCP3911_REG_MOD 0x06 #define MCP3911_REG_PHASE 0x07 #define MCP3911_REG_GAIN 0x09 -#define MCP3911_GAIN_MASK(ch) (GENMASK(2, 0) << 3 * ch) -#define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch)) +#define MCP3911_GAIN_MASK(ch) (GENMASK(2, 0) << 3 * (ch)) +#define MCP3911_GAIN_VAL(ch, val) ((val << 3 * (ch)) & MCP3911_GAIN_MASK(ch)) #define MCP3911_REG_STATUSCOM 0x0a #define MCP3911_STATUSCOM_DRHIZ BIT(12) @@ -51,8 +51,8 @@ #define MCP3911_REG_GAINCAL_CH1 0x17 #define MCP3911_REG_VREFCAL 0x1a -#define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) -#define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) +#define MCP3911_CHANNEL(ch) (MCP3911_REG_CHANNEL0 + (ch) * 3) +#define MCP3911_OFFCAL(ch) (MCP3911_REG_OFFCAL_CH0 + (ch) * 6) /* Internal voltage reference in mV */ #define MCP3911_INT_VREF_MV 1200 From patchwork Thu Aug 17 12:05:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13356334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C72BC2FC2D for ; Thu, 17 Aug 2023 12:04:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350629AbjHQMDj (ORCPT ); Thu, 17 Aug 2023 08:03:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350638AbjHQMDR (ORCPT ); Thu, 17 Aug 2023 08:03:17 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27D5D2D5A; Thu, 17 Aug 2023 05:03:08 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-4fe3b86cec1so12000000e87.2; Thu, 17 Aug 2023 05:03:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692273786; x=1692878586; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TBBVsXbgMffgJT3fnClUoE20LhX6K7AUR15jp9PosKY=; b=ohuK/NRIQPte1uAJyEzh/CddLFLaIdGnmQd6fNrs29u5KsPAjMInhTWUzbb00RIunp sPEvzRiQI+cMeuUDDulYPn5/ml8IVOgWyxl6OxCFQleEBW8LCAKJq4zIWSlwNDC/8Nne l0z5ljyz9qabBjL8q2/hqOtAPLXhYCajHUfomCZCL6qrYSU2rVBVc1IvHFivIL3iBGa0 nheqmar9wkvQ9lz9cUDUJrwyNIyNIwE5IRf2lfPrt9HTb9GrWLwwSnoNHo7hKcA67pbW 73pTxV2zy4x8pNdFhbdtx3w95q6PfdY3hLglDSgdRaAVVAYu/aqIUmr0jKn3Mf2zax79 gJAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692273786; x=1692878586; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TBBVsXbgMffgJT3fnClUoE20LhX6K7AUR15jp9PosKY=; b=MS8M5wZ629AYNqSyvYSRJ80KFXf/lav+ikWetWoOoEqM4tCrVQBwJ+HgCTrO1K9GBQ QlZjCjf7qFPfmKMVjqLNq3EnMMSJpRUlBPCGJD0pRnCJ4GaTwhSCJLKTohPOthaq+esJ 6faWHk2flDc7wlM7zAGRlJvOIQ4VFUPTpXXttLUa+7M6V/Q0iuqY1HgcAIB0EM4LR02r HksmLleoiEouquy1/RO1wMuZyMie7Fm55d40IgT86dJE7w8XRamKuxL/MjuEawFKo439 8EkM8JgL+htHOrTmUHX3ctpBK5cbn3EiNSCjyB1vqjz22UN+Iuo7UmtcDAWPRQFwSMJ0 Twag== X-Gm-Message-State: AOJu0Yx/5ZqC4be2cHb97tZnOBpAGH0+sc76aU0GNLbaLx0/Hh334maH s1kGMBBredc77KOWX5co0mg= X-Google-Smtp-Source: AGHT+IGOhVsP2NdZW2xhDEPEpHBRAi0pVgCrLME5q+yUgYNOKtAqOEJjAJ3b/IPEe8XbkrrOhn34Ug== X-Received: by 2002:a2e:964e:0:b0:2b6:efa0:7c36 with SMTP id z14-20020a2e964e000000b002b6efa07c36mr3641445ljh.21.1692273786065; Thu, 17 Aug 2023 05:03:06 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id t18-20020a2e9d12000000b002b9fec8961bsm3981213lji.123.2023.08.17.05.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Aug 2023 05:03:04 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 6/6] iio: adc: mcp3911: add support for the whole MCP39xx family Date: Thu, 17 Aug 2023 14:05:18 +0200 Message-ID: <20230817120518.153728-6-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230817120518.153728-1-marcus.folkesson@gmail.com> References: <20230817120518.153728-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add support for those. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson --- Notes: v2: - Use callbacks rather than matching against enum for determine chip variants v3: - Fix cosmetics v4: - Do not pollute output variable upon error in *_get_osr() functions. - Fix cosmetics v5: - Reorder text in Kconfig - change val to u32 for *_get_osr(), *_set_osr() and *_set_scale() - avoid ambiguity parameters in macro v6: - cosmetics - Return on dev_err_probe() drivers/iio/adc/Kconfig | 6 +- drivers/iio/adc/mcp3911.c | 449 +++++++++++++++++++++++++++++++++----- 2 files changed, 399 insertions(+), 56 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index eb2b09ef5d5b..2e71a73d8c7d 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -774,8 +774,10 @@ config MCP3911 select IIO_BUFFER select IIO_TRIGGERED_BUFFER help - Say yes here to build support for Microchip Technology's MCP3911 - analog to digital converter. + Say yes here to build support for one of the following + Microchip Technology's analog to digital converters: + MCP3910, MCP3911, MCP3912, MCP3913, MCP3914, + MCP3918 and MCP3919. This driver can also be built as a module. If so, the module will be called mcp3911. diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 9167f0ffa4e3..4bf774c6e26e 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -61,12 +61,55 @@ #define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 6) | (0 << 0)) & 0xff) #define MCP3911_REG_MASK GENMASK(4, 1) -#define MCP3911_NUM_CHANNELS 2 #define MCP3911_NUM_SCALES 6 +/* Registers compatible with MCP3910 */ +#define MCP3910_REG_STATUSCOM 0x0c +#define MCP3910_STATUSCOM_READ GENMASK(23, 22) +#define MCP3910_STATUSCOM_DRHIZ BIT(20) + +#define MCP3910_REG_GAIN 0x0b + +#define MCP3910_REG_CONFIG0 0x0d +#define MCP3910_CONFIG0_EN_OFFCAL BIT(23) +#define MCP3910_CONFIG0_OSR GENMASK(15, 13) + +#define MCP3910_REG_CONFIG1 0x0e +#define MCP3910_CONFIG1_CLKEXT BIT(6) +#define MCP3910_CONFIG1_VREFEXT BIT(7) + +#define MCP3910_REG_OFFCAL_CH0 0x0f +#define MCP3910_OFFCAL(ch) (MCP3910_REG_OFFCAL_CH0 + (ch) * 6) + +/* Maximal number of channels used by the MCP39XX family */ +#define MCP39XX_MAX_NUM_CHANNELS 8 + static const int mcp3911_osr_table[] = { 32, 64, 128, 256, 512, 1024, 2048, 4096 }; static u32 mcp3911_scale_table[MCP3911_NUM_SCALES][2]; +enum mcp3911_id { + MCP3910, + MCP3911, + MCP3912, + MCP3913, + MCP3914, + MCP3918, + MCP3919, +}; + +struct mcp3911; +struct mcp3911_chip_info { + const struct iio_chan_spec *channels; + unsigned int num_channels; + + int (*config)(struct mcp3911 *adc); + int (*get_osr)(struct mcp3911 *adc, u32 *val); + int (*set_osr)(struct mcp3911 *adc, u32 val); + int (*get_offset)(struct mcp3911 *adc, int channel, int *val); + int (*set_offset)(struct mcp3911 *adc, int channel, int val); + int (*set_scale)(struct mcp3911 *adc, int channel, u32 val); +}; + struct mcp3911 { struct spi_device *spi; struct mutex lock; @@ -74,14 +117,15 @@ struct mcp3911 { struct clk *clki; u32 dev_addr; struct iio_trigger *trig; - u32 gain[MCP3911_NUM_CHANNELS]; + u32 gain[MCP39XX_MAX_NUM_CHANNELS]; + const struct mcp3911_chip_info *chip; struct { - u32 channels[MCP3911_NUM_CHANNELS]; + u32 channels[MCP39XX_MAX_NUM_CHANNELS]; s64 ts __aligned(8); } scan; u8 tx_buf __aligned(IIO_DMA_MINALIGN); - u8 rx_buf[MCP3911_NUM_CHANNELS * 3]; + u8 rx_buf[MCP39XX_MAX_NUM_CHANNELS * 3]; }; static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) @@ -125,6 +169,102 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len return mcp3911_write(adc, reg, val, len); } +static int mcp3910_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3910_OFFCAL(channel), val, 3); +} + +static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + /* Write offset */ + ret = mcp3911_write(adc, MCP3910_OFFCAL(channel), val, 3); + if (ret) + return ret; + + /* Enable offset */ + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_EN_OFFCAL, + MCP3910_CONFIG0_EN_OFFCAL, 3); +} + +static int mcp3911_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3911_OFFCAL(channel), val, 3); +} + +static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + /* Write offset */ + ret = mcp3911_write(adc, MCP3911_OFFCAL(channel), val, 3); + if (ret) + return ret; + + /* Enable offset */ + return mcp3911_update(adc, MCP3911_REG_STATUSCOM, + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); +} + +static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG0, val, 3); + if (ret) + return ret; + + osr = FIELD_GET(MCP3910_CONFIG0_OSR, *val); + *val = 32 << osr; + return 0; +} + +static int mcp3910_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3910_CONFIG0_OSR, val); + + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_OSR, osr, 3); +} + +static int mcp3911_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3911_CONFIG_OSR, val); + + return mcp3911_update(adc, MCP3911_REG_CONFIG, + MCP3911_CONFIG_OSR, osr, 2); +} + +static int mcp3911_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + if (ret) + return ret; + + osr = FIELD_GET(MCP3911_CONFIG_OSR, *val); + *val = 32 << osr; + return ret; +} + +static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3910_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 3); +} + +static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3911_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 1); +} + static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask) @@ -181,20 +321,18 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, break; case IIO_CHAN_INFO_OFFSET: - ret = mcp3911_read(adc, - MCP3911_OFFCAL(channel->channel), val, 3); + + ret = adc->chip->get_offset(adc, channel->channel, val); if (ret) goto out; ret = IIO_VAL_INT; break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + ret = adc->chip->get_osr(adc, val); if (ret) goto out; - *val = FIELD_GET(MCP3911_CONFIG_OSR, *val); - *val = 32 << *val; ret = IIO_VAL_INT; break; @@ -225,9 +363,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); - ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + ret = adc->chip->set_scale(adc, channel->channel, i); } } break; @@ -237,24 +373,13 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, goto out; } - /* Write offset */ - ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val, - 3); - if (ret) - goto out; - - /* Enable offset*/ - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + ret = adc->chip->set_offset(adc, channel->channel, val); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: for (int i = 0; i < ARRAY_SIZE(mcp3911_osr_table); i++) { if (val == mcp3911_osr_table[i]) { - val = FIELD_PREP(MCP3911_CONFIG_OSR, i); - ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + ret = adc->chip->set_osr(adc, i); break; } } @@ -324,12 +449,60 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) }, \ } +static const struct iio_chan_spec mcp3910_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + IIO_CHAN_SOFT_TIMESTAMP(2), +}; + static const struct iio_chan_spec mcp3911_channels[] = { MCP3911_CHAN(0), MCP3911_CHAN(1), IIO_CHAN_SOFT_TIMESTAMP(2), }; +static const struct iio_chan_spec mcp3912_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + IIO_CHAN_SOFT_TIMESTAMP(4), +}; + +static const struct iio_chan_spec mcp3913_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + IIO_CHAN_SOFT_TIMESTAMP(6), +}; + +static const struct iio_chan_spec mcp3914_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + MCP3911_CHAN(6), + MCP3911_CHAN(7), + IIO_CHAN_SOFT_TIMESTAMP(8), +}; + +static const struct iio_chan_spec mcp3918_channels[] = { + MCP3911_CHAN(0), + IIO_CHAN_SOFT_TIMESTAMP(1), +}; + +static const struct iio_chan_spec mcp3919_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + IIO_CHAN_SOFT_TIMESTAMP(3), +}; + static irqreturn_t mcp3911_trigger_handler(int irq, void *p) { struct iio_poll_func *pf = p; @@ -342,7 +515,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) .len = 1, }, { .rx_buf = adc->rx_buf, - .len = sizeof(adc->rx_buf), + .len = (adc->chip->num_channels - 1) * 3, }, }; int scan_index; @@ -385,20 +558,6 @@ static int mcp3911_config(struct mcp3911 *adc) u32 regval; int ret; - ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); - - /* - * Fallback to "device-addr" due to historical mismatch between - * dt-bindings and implementation - */ - if (ret) - device_property_read_u32(dev, "device-addr", &adc->dev_addr); - if (adc->dev_addr > 3) { - dev_err(dev, "invalid device address (%i). Must be in range 0-3.\n", adc->dev_addr); - return -EINVAL; - } - dev_dbg(dev, "use device address %i\n", adc->dev_addr); - ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) return ret; @@ -433,7 +592,99 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_STATUSCOM_READ; regval |= FIELD_PREP(MCP3911_STATUSCOM_READ, 0x02); - return mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + regval &= ~MCP3911_STATUSCOM_DRHIZ; + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 1); + + /* Disable offset to ignore any old values in offset register */ + regval &= ~MCP3911_STATUSCOM_EN_OFFCAL; + + ret = mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3911_REG_GAIN, ®val, 1); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + + return mcp3911_write(adc, MCP3911_REG_GAIN, regval, 1); +} + +static int mcp3910_config(struct mcp3911 *adc) +{ + struct device *dev = &adc->spi->dev; + u32 regval; + int ret; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG1, ®val, 3); + if (ret) + return ret; + + regval &= ~MCP3910_CONFIG1_VREFEXT; + if (adc->vref) { + dev_dbg(dev, "use external voltage reference\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 1); + } else { + dev_dbg(dev, "use internal voltage reference (1.2V)\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 0); + } + + regval &= ~MCP3910_CONFIG1_CLKEXT; + if (adc->clki) { + dev_dbg(dev, "use external clock as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 1); + } else { + dev_dbg(dev, "use crystal oscillator as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 0); + } + + ret = mcp3911_write(adc, MCP3910_REG_CONFIG1, regval, 3); + if (ret) + return ret; + + ret = mcp3911_read(adc, MCP3910_REG_STATUSCOM, ®val, 3); + if (ret) + return ret; + + /* Address counter incremented, cycle through register types */ + regval &= ~MCP3910_STATUSCOM_READ; + regval |= FIELD_PREP(MCP3910_STATUSCOM_READ, 0x02); + + regval &= ~MCP3910_STATUSCOM_DRHIZ; + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 1); + + ret = mcp3911_write(adc, MCP3910_REG_STATUSCOM, regval, 3); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3910_REG_GAIN, ®val, 3); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + ret = mcp3911_write(adc, MCP3910_REG_GAIN, regval, 3); + if (ret) + return ret; + + /* Disable offset to ignore any old values in offset register */ + return mcp3911_update(adc, MCP3910_REG_CONFIG0, + MCP3910_CONFIG0_EN_OFFCAL, + MCP3910_CONFIG0_EN_OFFCAL, 3); } static void mcp3911_cleanup_regulator(void *vref) @@ -471,6 +722,7 @@ static int mcp3911_probe(struct spi_device *spi) adc = iio_priv(indio_dev); adc->spi = spi; + adc->chip = spi_get_device_match_data(spi); adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { @@ -499,16 +751,21 @@ static int mcp3911_probe(struct spi_device *spi) } } - ret = mcp3911_config(adc); + /* + * Fallback to "device-addr" due to historical mismatch between + * dt-bindings and implementation. + */ + ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); if (ret) - return ret; + device_property_read_u32(dev, "device-addr", &adc->dev_addr); + if (adc->dev_addr > 3) { + return dev_err_probe(dev, -EINVAL, + "invalid device address (%i). Must be in range 0-3.\n", + adc->dev_addr); + } + dev_dbg(dev, "use device address %i\n", adc->dev_addr); - if (device_property_read_bool(dev, "microchip,data-ready-hiz")) - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); - else - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + ret = adc->chip->config(adc); if (ret) return ret; @@ -517,7 +774,7 @@ static int mcp3911_probe(struct spi_device *spi) return ret; /* Set gain to 1 for all channels */ - for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { + for (int i = 0; i < adc->chip->num_channels - 1; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, MCP3911_GAIN_MASK(i), @@ -531,8 +788,8 @@ static int mcp3911_probe(struct spi_device *spi) indio_dev->info = &mcp3911_info; spi_set_drvdata(spi, indio_dev); - indio_dev->channels = mcp3911_channels; - indio_dev->num_channels = ARRAY_SIZE(mcp3911_channels); + indio_dev->channels = adc->chip->channels; + indio_dev->num_channels = adc->chip->num_channels; mutex_init(&adc->lock); @@ -570,14 +827,98 @@ static int mcp3911_probe(struct spi_device *spi) return devm_iio_device_register(dev, indio_dev); } +static const struct mcp3911_chip_info mcp3911_chip_info[] = { + [MCP3910] = { + .channels = mcp3910_channels, + .num_channels = ARRAY_SIZE(mcp3910_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3911] = { + .channels = mcp3911_channels, + .num_channels = ARRAY_SIZE(mcp3911_channels), + .config = mcp3911_config, + .get_osr = mcp3911_get_osr, + .set_osr = mcp3911_set_osr, + .get_offset = mcp3911_get_offset, + .set_offset = mcp3911_set_offset, + .set_scale = mcp3911_set_scale, + }, + [MCP3912] = { + .channels = mcp3912_channels, + .num_channels = ARRAY_SIZE(mcp3912_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3913] = { + .channels = mcp3913_channels, + .num_channels = ARRAY_SIZE(mcp3913_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3914] = { + .channels = mcp3914_channels, + .num_channels = ARRAY_SIZE(mcp3914_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3918] = { + .channels = mcp3918_channels, + .num_channels = ARRAY_SIZE(mcp3918_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3919] = { + .channels = mcp3919_channels, + .num_channels = ARRAY_SIZE(mcp3919_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, +}; static const struct of_device_id mcp3911_dt_ids[] = { - { .compatible = "microchip,mcp3911" }, + { .compatible = "microchip,mcp3910", .data = &mcp3911_chip_info[MCP3910] }, + { .compatible = "microchip,mcp3911", .data = &mcp3911_chip_info[MCP3911] }, + { .compatible = "microchip,mcp3912", .data = &mcp3911_chip_info[MCP3912] }, + { .compatible = "microchip,mcp3913", .data = &mcp3911_chip_info[MCP3913] }, + { .compatible = "microchip,mcp3914", .data = &mcp3911_chip_info[MCP3914] }, + { .compatible = "microchip,mcp3918", .data = &mcp3911_chip_info[MCP3918] }, + { .compatible = "microchip,mcp3919", .data = &mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(of, mcp3911_dt_ids); static const struct spi_device_id mcp3911_id[] = { - { "mcp3911", 0 }, + { "mcp3910", (kernel_ulong_t)&mcp3911_chip_info[MCP3910] }, + { "mcp3911", (kernel_ulong_t)&mcp3911_chip_info[MCP3911] }, + { "mcp3912", (kernel_ulong_t)&mcp3911_chip_info[MCP3912] }, + { "mcp3913", (kernel_ulong_t)&mcp3911_chip_info[MCP3913] }, + { "mcp3914", (kernel_ulong_t)&mcp3911_chip_info[MCP3914] }, + { "mcp3918", (kernel_ulong_t)&mcp3911_chip_info[MCP3918] }, + { "mcp3919", (kernel_ulong_t)&mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(spi, mcp3911_id);