From patchwork Thu Aug 17 16:57:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356823 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6ED5171A4 for ; Thu, 17 Aug 2023 17:09:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E4C9C43391; Thu, 17 Aug 2023 17:09:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292177; bh=4IGcaQBS31O4UxIqmGLC17t6CNsWT5osrD81dv+HBug=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m3Ecdo94iULh102ihxFOsBgvc/1wjMNN1TBd/yV9CJ2QXFoLCfRS/tftGeX+pFDDy zOoqoSgYlFjX/ZtEqsbGx5lhzi6xuIA5NMf4yyHPjuViJvsenCN7NCbYLS5W8mrb99 DCD9Sq1518sj/JXp9G+pKv1Xd7nxilp89P/0C5JuoQGKU7KjDIfXaAwNrxP8q+U1Tw jAZEj/+/U46IDJDmnJ0Obpr8B9r1ykPeaT6w+5D34mqNOEsa7KkITEa2Xd8f7wKcjy zGezq4lKcHBRK511EfQZruiuMHkJi+RLLpsdYg2GsyJZMSwcMkaLOFU2ydd38gxIA6 0wbkKhuJaqwqQ== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 1/9] net: stmmac: correct RX COE parsing for xgmac Date: Fri, 18 Aug 2023 00:57:41 +0800 Message-Id: <20230817165749.672-2-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org xgmac can support RX COE, but there's no two kinds of COE, I.E type 1 and type 2 COE. Signed-off-by: Jisheng Zhang Acked-by: Alexandre TORGUE Reviewed-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 733b5e900817..3d90ca983389 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -7035,7 +7035,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv) if (priv->plat->rx_coe) { priv->hw->rx_csum = priv->plat->rx_coe; dev_info(priv->device, "RX Checksum Offload Engine supported\n"); - if (priv->synopsys_id < DWMAC_CORE_4_00) + if (priv->synopsys_id < DWMAC_CORE_4_00 && !priv->plat->has_xgmac) dev_info(priv->device, "COE Type %d\n", priv->hw->rx_csum); } if (priv->plat->tx_coe) From patchwork Thu Aug 17 16:57:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356824 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 860C0171A4 for ; Thu, 17 Aug 2023 17:09:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 918D7C433CC; Thu, 17 Aug 2023 17:09:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292180; bh=nrZBBHIvwoY7+NGVTUVo+wQxGv/rQfcOhG+8CHuUfbw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fqfCowDBfSqLcVFjlD11GFJSUH0EMWxlBxuC4kwhPdNDkLiKR0O6jOv0xZTf62WnD ZVIrCBskydJV8vy56PW6FFBvq0cgiCXysSwL2NsKI6T3LCl3EqiARFrhRlFDel3q/H cX8DEnsTqwPxIg2MvmM+0FMqZIa4gb34YemcxM1qXptwCQP4g0ZKeOH1qGfLwL7qxc IAOMRahGFT1GeOIUHyE5RaHiXUzIEeQnlX5kGc+fqE+e+NNj1HlX1qV2SF1ILg11Iv D5SmzcZnnRMJ4K7l0sHH8qy2k1i6BK/JRJZvk1uO3QzCZHe9brEn9vs9EffWhy0yV4 5O2iuhBRfHMqw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 2/9] net: stmmac: xgmac: add more feature parsing from hw cap Date: Fri, 18 Aug 2023 00:57:42 +0800 Message-Id: <20230817165749.672-3-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The XGMAC_HWFEAT_GMIISEL bit also indicates whether support 10/100Mbps or not. Signed-off-by: Jisheng Zhang Acked-by: Alexandre TORGUE Reviewed-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index 3aacf791efeb..1ef8fc132c2d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -410,6 +410,7 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr, dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4; dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3; dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; + dma_cap->mbps_10_100 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; /* MAC HW feature 1 */ hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1); From patchwork Thu Aug 17 16:57:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356825 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B18F6171A4 for ; Thu, 17 Aug 2023 17:09:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B2106C433CD; Thu, 17 Aug 2023 17:09:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292183; bh=txwgc7mnnsmcD2eGCJ5tky3C5uEWpaD5DMyct9tbf5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KGFOMjSyshRYy3S7XmxI5nPwYr+UR97M+Uh9kYY13NwiaS+05J/F2VA8eBRBJ+h4g NwVxLm2D4MtYAqWJgx0cxNBFZ+XmiIyaMJKnKfxwYQBmkgCrWo1pVgkmAVjjeaNs7I f8+/jGpS8e+4JeAt6WdDPZ93j2ckQIcov4iPDj1KhSYQgRSWrNc1LdQwRlO+HBP0n2 4wg1UdU4Ue4cpSGbnhMZZ21Sikktib0l3Hfsl7itDJZkueJfK6AgcAoVYSBnYPO8pf Ku6lmXDAQi17J6N1E2v6F3BWBCvKninvj6L6lseyqsi8w37BH3ZBebKR9xKhkpyH7x xF0FHfQHOK8jw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 3/9] net: stmmac: enlarge max rx/tx queues and channels to 16 Date: Fri, 18 Aug 2023 00:57:43 +0800 Message-Id: <20230817165749.672-4-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org xgmac supports up to 16 rx/tx queues and up to 16 channels. Signed-off-by: Jisheng Zhang Acked-by: Alexandre TORGUE --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 5 ++--- include/linux/stmmac.h | 6 +++--- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index 38782662ff98..8ac994553bc1 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -232,9 +232,8 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue, void __iomem *ioaddr = hw->pcsr; u32 value, reg; - reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1; - if (queue >= 4) - queue -= 4; + reg = XGMAC_MTL_RXQ_DMA_MAP0 + (queue & ~0x3); + queue &= 0x3; value = readl(ioaddr + reg); value &= ~XGMAC_QxMDMACH(queue); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 784277d666eb..9c90e2e295d4 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -15,9 +15,9 @@ #include #include -#define MTL_MAX_RX_QUEUES 8 -#define MTL_MAX_TX_QUEUES 8 -#define STMMAC_CH_MAX 8 +#define MTL_MAX_RX_QUEUES 16 +#define MTL_MAX_TX_QUEUES 16 +#define STMMAC_CH_MAX 16 #define STMMAC_RX_COE_NONE 0 #define STMMAC_RX_COE_TYPE1 1 From patchwork Thu Aug 17 16:57:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356826 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA655171A4 for ; Thu, 17 Aug 2023 17:09:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EA191C433C9; Thu, 17 Aug 2023 17:09:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292186; bh=VhGYQm/v6CCPb8FZ2A5lzNUx1w/ato3kcEAVi501AEE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O6lmtW96+6FgpZcv1xhQbHilW0GWn7sWgISxpKOTR63R3uY4W7KKjqwfPsEL8vf9U OoWSqGYOOOhjiFIzv4J0bWoeA85+Y0flqLY2eEzbhXa5edIO/Wakr/v+CMBFxs8drU slZPezek6g/aZyeF/Bq4nIl9GmqB7rUB0QGwoKlqMyff3JGZqzHgMh2HJNAGzCGk1G 7T+9xkXCRpIEmo2MjOzlWStN4ypRDo6rfwUpUiGbnI+/wqg6Kcn2qOO8U7IOZOasVY W6puXITj7lc3F1MMf8F95tfs7+HRld7cqz7/pO0vHPqbvondek67figVi5QgIIT6SO NZpfQPNNxTe0g== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 4/9] net: stmmac: reflect multi irqs for tx/rx channels and mac and safety Date: Fri, 18 Aug 2023 00:57:44 +0800 Message-Id: <20230817165749.672-5-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The IP supports per channel interrupt, when intel adds the per channel interrupt support, the per channel irq is from MSI vector, but this feature can also be supported on non-MSI platforms. Do some necessary renaming to reflects this fact. Signed-off-by: Jisheng Zhang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 4 +- .../net/ethernet/stmicro/stmmac/dwmac4_dma.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 48 +++++++++---------- include/linux/stmmac.h | 4 +- 4 files changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 979c755964b1..9050de31ed76 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -952,7 +952,7 @@ static int stmmac_config_single_msi(struct pci_dev *pdev, res->irq = pci_irq_vector(pdev, 0); res->wol_irq = res->irq; - plat->flags &= ~STMMAC_FLAG_MULTI_MSI_EN; + plat->flags &= ~STMMAC_FLAG_PERCH_IRQ_EN; dev_info(&pdev->dev, "%s: Single IRQ enablement successful\n", __func__); @@ -1004,7 +1004,7 @@ static int stmmac_config_multi_msi(struct pci_dev *pdev, if (plat->msi_sfty_ue_vec < STMMAC_MSI_VEC_MAX) res->sfty_ue_irq = pci_irq_vector(pdev, plat->msi_sfty_ue_vec); - plat->flags |= STMMAC_FLAG_MULTI_MSI_EN; + plat->flags |= STMMAC_FLAG_PERCH_IRQ_EN; dev_info(&pdev->dev, "%s: multi MSI enablement successful\n", __func__); return 0; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c index 84d3a8551b03..9bf8adf466a2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c @@ -175,7 +175,7 @@ static void dwmac4_dma_init(void __iomem *ioaddr, value = readl(ioaddr + DMA_BUS_MODE); - if (dma_cfg->multi_msi_en) { + if (dma_cfg->perch_irq_en) { value &= ~DMA_BUS_MODE_INTM_MASK; value |= (DMA_BUS_MODE_INTM_MODE1 << DMA_BUS_MODE_INTM_SHIFT); } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 3d90ca983389..64c55024d69d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -126,11 +126,11 @@ module_param(chain_mode, int, 0444); MODULE_PARM_DESC(chain_mode, "To use chain instead of ring mode"); static irqreturn_t stmmac_interrupt(int irq, void *dev_id); -/* For MSI interrupts handling */ +/* For multi channel interrupts handling */ static irqreturn_t stmmac_mac_interrupt(int irq, void *dev_id); static irqreturn_t stmmac_safety_interrupt(int irq, void *dev_id); -static irqreturn_t stmmac_msi_intr_tx(int irq, void *data); -static irqreturn_t stmmac_msi_intr_rx(int irq, void *data); +static irqreturn_t stmmac_queue_intr_tx(int irq, void *data); +static irqreturn_t stmmac_queue_intr_rx(int irq, void *data); static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue); static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue); static void stmmac_reset_queues_param(struct stmmac_priv *priv); @@ -3520,7 +3520,7 @@ static void stmmac_free_irq(struct net_device *dev, } } -static int stmmac_request_irq_multi_msi(struct net_device *dev) +static int stmmac_request_irq_multi_channel(struct net_device *dev) { struct stmmac_priv *priv = netdev_priv(dev); enum request_irq_err irq_err; @@ -3537,7 +3537,7 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) 0, int_name, dev); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc mac MSI %d (error: %d)\n", + "%s: alloc mac irq %d (error: %d)\n", __func__, dev->irq, ret); irq_err = REQ_IRQ_ERR_MAC; goto irq_error; @@ -3554,7 +3554,7 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) 0, int_name, dev); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc wol MSI %d (error: %d)\n", + "%s: alloc wol irq %d (error: %d)\n", __func__, priv->wol_irq, ret); irq_err = REQ_IRQ_ERR_WOL; goto irq_error; @@ -3572,7 +3572,7 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) 0, int_name, dev); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc lpi MSI %d (error: %d)\n", + "%s: alloc lpi irq %d (error: %d)\n", __func__, priv->lpi_irq, ret); irq_err = REQ_IRQ_ERR_LPI; goto irq_error; @@ -3590,7 +3590,7 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) 0, int_name, dev); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc sfty ce MSI %d (error: %d)\n", + "%s: alloc sfty ce irq %d (error: %d)\n", __func__, priv->sfty_ce_irq, ret); irq_err = REQ_IRQ_ERR_SFTY_CE; goto irq_error; @@ -3608,14 +3608,14 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) 0, int_name, dev); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc sfty ue MSI %d (error: %d)\n", + "%s: alloc sfty ue irq %d (error: %d)\n", __func__, priv->sfty_ue_irq, ret); irq_err = REQ_IRQ_ERR_SFTY_UE; goto irq_error; } } - /* Request Rx MSI irq */ + /* Request Rx queue irq */ for (i = 0; i < priv->plat->rx_queues_to_use; i++) { if (i >= MTL_MAX_RX_QUEUES) break; @@ -3625,11 +3625,11 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) int_name = priv->int_name_rx_irq[i]; sprintf(int_name, "%s:%s-%d", dev->name, "rx", i); ret = request_irq(priv->rx_irq[i], - stmmac_msi_intr_rx, + stmmac_queue_intr_rx, 0, int_name, &priv->dma_conf.rx_queue[i]); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc rx-%d MSI %d (error: %d)\n", + "%s: alloc rx-%d irq %d (error: %d)\n", __func__, i, priv->rx_irq[i], ret); irq_err = REQ_IRQ_ERR_RX; irq_idx = i; @@ -3640,7 +3640,7 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) irq_set_affinity_hint(priv->rx_irq[i], &cpu_mask); } - /* Request Tx MSI irq */ + /* Request Tx queue irq */ for (i = 0; i < priv->plat->tx_queues_to_use; i++) { if (i >= MTL_MAX_TX_QUEUES) break; @@ -3650,11 +3650,11 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev) int_name = priv->int_name_tx_irq[i]; sprintf(int_name, "%s:%s-%d", dev->name, "tx", i); ret = request_irq(priv->tx_irq[i], - stmmac_msi_intr_tx, + stmmac_queue_intr_tx, 0, int_name, &priv->dma_conf.tx_queue[i]); if (unlikely(ret < 0)) { netdev_err(priv->dev, - "%s: alloc tx-%d MSI %d (error: %d)\n", + "%s: alloc tx-%d irq %d (error: %d)\n", __func__, i, priv->tx_irq[i], ret); irq_err = REQ_IRQ_ERR_TX; irq_idx = i; @@ -3729,8 +3729,8 @@ static int stmmac_request_irq(struct net_device *dev) int ret; /* Request the IRQ lines */ - if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) - ret = stmmac_request_irq_multi_msi(dev); + if (priv->plat->flags & STMMAC_FLAG_PERCH_IRQ_EN) + ret = stmmac_request_irq_multi_channel(dev); else ret = stmmac_request_irq_single(dev); @@ -5945,7 +5945,7 @@ static irqreturn_t stmmac_safety_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static irqreturn_t stmmac_msi_intr_tx(int irq, void *data) +static irqreturn_t stmmac_queue_intr_tx(int irq, void *data) { struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)data; struct stmmac_dma_conf *dma_conf; @@ -5977,7 +5977,7 @@ static irqreturn_t stmmac_msi_intr_tx(int irq, void *data) return IRQ_HANDLED; } -static irqreturn_t stmmac_msi_intr_rx(int irq, void *data) +static irqreturn_t stmmac_queue_intr_rx(int irq, void *data) { struct stmmac_rx_queue *rx_q = (struct stmmac_rx_queue *)data; struct stmmac_dma_conf *dma_conf; @@ -6014,12 +6014,12 @@ static void stmmac_poll_controller(struct net_device *dev) if (test_bit(STMMAC_DOWN, &priv->state)) return; - if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) { + if (priv->plat->flags & STMMAC_FLAG_PERCH_IRQ_EN) { for (i = 0; i < priv->plat->rx_queues_to_use; i++) - stmmac_msi_intr_rx(0, &priv->dma_conf.rx_queue[i]); + stmmac_queue_intr_rx(0, &priv->dma_conf.rx_queue[i]); for (i = 0; i < priv->plat->tx_queues_to_use; i++) - stmmac_msi_intr_tx(0, &priv->dma_conf.tx_queue[i]); + stmmac_queue_intr_tx(0, &priv->dma_conf.tx_queue[i]); } else { disable_irq(dev->irq); stmmac_interrupt(dev->irq, dev); @@ -7300,8 +7300,8 @@ int stmmac_dvr_probe(struct device *device, priv->plat = plat_dat; priv->ioaddr = res->addr; priv->dev->base_addr = (unsigned long)res->addr; - priv->plat->dma_cfg->multi_msi_en = - (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN); + priv->plat->dma_cfg->perch_irq_en = + (priv->plat->flags & STMMAC_FLAG_PERCH_IRQ_EN); priv->dev->irq = res->irq; priv->wol_irq = res->wol_irq; diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 9c90e2e295d4..c052c222fa3e 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -98,7 +98,7 @@ struct stmmac_dma_cfg { int mixed_burst; bool aal; bool eame; - bool multi_msi_en; + bool perch_irq_en; bool dche; }; @@ -213,7 +213,7 @@ struct dwmac4_addrs { #define STMMAC_FLAG_TSO_EN BIT(4) #define STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP BIT(5) #define STMMAC_FLAG_VLAN_FAIL_Q_EN BIT(6) -#define STMMAC_FLAG_MULTI_MSI_EN BIT(7) +#define STMMAC_FLAG_PERCH_IRQ_EN BIT(7) #define STMMAC_FLAG_EXT_SNAPSHOT_EN BIT(8) #define STMMAC_FLAG_INT_SNAPSHOT_EN BIT(9) #define STMMAC_FLAG_RX_CLK_RUNS_IN_LPI BIT(10) From patchwork Thu Aug 17 16:57:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356827 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7133174C6 for ; Thu, 17 Aug 2023 17:09:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 10155C43397; Thu, 17 Aug 2023 17:09:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292189; bh=H6r17igTApBMtumIbML4/Pv00+k0irJssUyt+I4FyfE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LYpTTr3Bt7kUAgHnD+wrvXcht/aMFZ37ye8zlLZaCbzamr0O075RyZSz23otSW+/I YFbZfGI1uQnLMW1zyJXqdY2ItxEqCvwT36UV+ZpL6i3HM075xn/Bb0ODnzp7m6m2qb 8BF9OrUBbp8v3a7qFxGj7P0Aeqf8r9+l7R2uda486x8Xj9bU7QjTFnkHAqOWXTaTev zjlp4hZGZU8Dh6dEM9P+GxiEtVMPcT67RfeTmSpAxS487TbFmfTwomQiK5dL5Hp0sS wUt/gT5Ilg0hZf+ZJDnYE2IkyF+fXx+E77ZRbtsCNwx21b89C+eFzMYdk5t2UgK9NC Nu3sUuN2du5OQ== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 5/9] net: stmmac: xgmac: support per-channel irq Date: Fri, 18 Aug 2023 00:57:45 +0800 Message-Id: <20230817165749.672-6-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The IP supports per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 ++ .../ethernet/stmicro/stmmac/dwxgmac2_dma.c | 33 +++++++++++-------- 2 files changed, 22 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 7f68bef456b7..18a042834d75 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -340,6 +340,8 @@ /* DMA Registers */ #define XGMAC_DMA_MODE 0x00003000 +#define XGMAC_INTM GENMASK(13, 12) +#define XGMAC_INTM_MODE1 0x1 #define XGMAC_SWR BIT(0) #define XGMAC_DMA_SYSBUS_MODE 0x00003004 #define XGMAC_WR_OSR_LMT GENMASK(29, 24) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index 1ef8fc132c2d..ce228c362403 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -31,6 +31,13 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr, value |= XGMAC_EAME; writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); + + if (dma_cfg->perch_irq_en) { + value = readl(ioaddr + XGMAC_DMA_MODE); + value &= ~XGMAC_INTM; + value |= FIELD_PREP(XGMAC_INTM, XGMAC_INTM_MODE1); + writel(value, ioaddr + XGMAC_DMA_MODE); + } } static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv, @@ -365,20 +372,20 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, } /* TX/RX NORMAL interrupts */ - if (likely(intr_status & XGMAC_NIS)) { - if (likely(intr_status & XGMAC_RI)) { - u64_stats_update_begin(&rx_q->rxq_stats.syncp); - rx_q->rxq_stats.rx_normal_irq_n++; - u64_stats_update_end(&rx_q->rxq_stats.syncp); - ret |= handle_rx; - } - if (likely(intr_status & (XGMAC_TI | XGMAC_TBU))) { - u64_stats_update_begin(&tx_q->txq_stats.syncp); - tx_q->txq_stats.tx_normal_irq_n++; - u64_stats_update_end(&tx_q->txq_stats.syncp); - ret |= handle_tx; - } + if (likely(intr_status & XGMAC_RI)) { + u64_stats_update_begin(&rx_q->rxq_stats.syncp); + rx_q->rxq_stats.rx_normal_irq_n++; + u64_stats_update_end(&rx_q->rxq_stats.syncp); + ret |= handle_rx; + } + if (likely(intr_status & XGMAC_TI)) { + u64_stats_update_begin(&tx_q->txq_stats.syncp); + tx_q->txq_stats.tx_normal_irq_n++; + u64_stats_update_end(&tx_q->txq_stats.syncp); + ret |= handle_tx; } + if (unlikely(intr_status & XGMAC_TBU)) + ret |= handle_tx; /* Clear interrupts */ writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan)); From patchwork Thu Aug 17 16:57:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356828 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F50C14F65 for ; Thu, 17 Aug 2023 17:09:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2026DC433C8; Thu, 17 Aug 2023 17:09:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292192; bh=aRyV6xNSnXzwR4k61lnQ+ZQcy3oDuCpZ9xSwfK+jJGg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MXMO8lhnQylzgU03Kg2syfvcIqhkAKyMBJjNJJKg+Fkmvz6kLvT2YV1raUGLF1LM3 sZLun519nVvQF43RtwIpvoGSWB1wRTTVyUfnSfp9u4t+uUmA1AcjVrm9pQ3hRGymBx bkPgxdHuiyhTMMaYqxPXZIqQ+sbxE7I0Z6JZlUpyBzeXkjnBLG6pisBaRyWydMIBQt tvG3d5Q2Q3rmjQfIYoex/ARMrtWSE5y6BGUs+hQULZv6O5WoIc37MwOKmgP1vLHI9Y 64Ncu6uyvd5vhmL2l3hdA7soXhpFkppM3YuAn5FSV0wr13ZAnMdsAwWciqvf6XQ+uq CPAcCxyy75LEg== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 6/9] dt-bindings: net: snps,dwmac: add safety irq support Date: Fri, 18 Aug 2023 00:57:46 +0800 Message-Id: <20230817165749.672-7-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The snps dwmac IP support safety features, and those Safety Feature Correctible Error and Uncorrectible Error irqs may be separate irqs. Signed-off-by: Jisheng Zhang --- .../devicetree/bindings/net/snps,dwmac.yaml | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index ddf9522a5dc2..ee9174f77d97 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -103,17 +103,26 @@ properties: interrupts: minItems: 1 + maxItems: 5 + additionalItems: true items: - description: Combined signal for various interrupt events - description: The interrupt to manage the remote wake-up packet detection - description: The interrupt that occurs when Rx exits the LPI state + - description: The interrupt that occurs when Safety Feature Correctible Errors happen + - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen interrupt-names: minItems: 1 + maxItems: 5 + additionalItems: true items: - const: macirq - - enum: [eth_wake_irq, eth_lpi] - - const: eth_lpi + - enum: + - eth_wake_irq + - eth_lpi + - sfty_ce + - sfty_ue clocks: minItems: 1 From patchwork Thu Aug 17 16:57:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356829 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2065717FF3 for ; Thu, 17 Aug 2023 17:09:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4803FC433CC; Thu, 17 Aug 2023 17:09:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292196; bh=kv75d6y4CuM21MoxPELNwCryPzdrLaz2U6/TZ1c2g/I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cM9d+TDPiSlWrfjFOvVPKfKBgwVJRHE8gm7F8kCh8zBJgqDPcXkk3f37tY4HKgxPz 68jPWjxlFDQyx7dCM2uXRkTRWEXsH/Z101IbsMM51z6Dj6FrW4PWqXdXNeaEORLjGM nI39Z+t25Al5Jw//mTPh8k/HFx2vnFXBlm+mo5TTKmBzfzoyJ8u+SfRIOKfSrxMC35 tbMb3cNThT84kNq2HMUOkiuS61RV26Dtjs7mboLZj1p69LMYM3PoWzTJFjn/p6IV5m 2AhTvdBwvJXs4V4tSxa9iBtogYz5AvSXu6ZuVwHIXTBTc2yjuyUbtX94ehPPuKdkil X2iMrsh8hcGUA== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 7/9] net: stmmac: platform: support parsing safety irqs from DT Date: Fri, 18 Aug 2023 00:57:47 +0800 Message-Id: <20230817165749.672-8-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The snps dwmac IP may support safety features, and those Safety Feature Correctible Error and Uncorrectible Error irqs may be separate irqs. Add support to parse the safety irqs from DT. Signed-off-by: Jisheng Zhang Acked-by: Alexandre TORGUE --- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index be8e79c7aa34..4a2002eea870 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -737,6 +737,18 @@ int stmmac_get_platform_resources(struct platform_device *pdev, dev_info(&pdev->dev, "IRQ eth_lpi not found\n"); } + stmmac_res->sfty_ce_irq = platform_get_irq_byname_optional(pdev, "sfty_ce"); + if (stmmac_res->sfty_ce_irq < 0) { + if (stmmac_res->sfty_ce_irq == -EPROBE_DEFER) + return -EPROBE_DEFER; + } + + stmmac_res->sfty_ue_irq = platform_get_irq_byname_optional(pdev, "sfty_ue"); + if (stmmac_res->sfty_ue_irq < 0) { + if (stmmac_res->sfty_ue_irq == -EPROBE_DEFER) + return -EPROBE_DEFER; + } + stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0); return PTR_ERR_OR_ZERO(stmmac_res->addr); From patchwork Thu Aug 17 16:57:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356830 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F7F018037 for ; Thu, 17 Aug 2023 17:09:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58620C433C8; Thu, 17 Aug 2023 17:09:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292199; bh=v5fyU7tg4Nnh4L70QOucdCfrXw036MbbJKXSnKFoTps=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H0zd0vYzj5RIm7r4P7jqUMcvizI3Uo6SZHTMtk6YIHNxScbD8HFahRYRfgSljP0Un aXAOML2bm9czAizJHttgDm0YypWO/YRsm4XgULiAvpxhLnhixTdqGUfNgFwnCqOqAk uFl+D48lx12pSqgo2DLXvX82GpQhhgUGa23AEGf1DgIAX9vfj8aPcuHhVjO2aZEQ75 UOgkhnOK4dHbbVOSTsfMx5EcWJCMobqno8ohLwVbq6xc0aJl96cmQ4ywoyP5Z102eI qNryxpTaNVxZQw9jpf30Kmu8r49lsMRqFYNRyk1Kw2vVdN1feFqb39qpYPH2Qqm+GB FMG+NYF2eZt4Q== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 8/9] dt-bindings: net: snps,dwmac: add per channel irq support Date: Fri, 18 Aug 2023 00:57:48 +0800 Message-Id: <20230817165749.672-9-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The IP supports optional per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../devicetree/bindings/net/snps,dwmac.yaml | 68 ++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index ee9174f77d97..a916701474dc 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -103,7 +103,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 37 additionalItems: true items: - description: Combined signal for various interrupt events @@ -111,10 +111,42 @@ properties: - description: The interrupt that occurs when Rx exits the LPI state - description: The interrupt that occurs when Safety Feature Correctible Errors happen - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen + - description: rx0 per-channel interrupt + - description: rx1 per-channel interrupt + - description: rx2 per-channel interrupt + - description: rx3 per-channel interrupt + - description: rx4 per-channel interrupt + - description: rx5 per-channel interrupt + - description: rx6 per-channel interrupt + - description: rx7 per-channel interrupt + - description: rx8 per-channel interrupt + - description: rx9 per-channel interrupt + - description: rx10 per-channel interrupt + - description: rx11 per-channel interrupt + - description: rx12 per-channel interrupt + - description: rx13 per-channel interrupt + - description: rx14 per-channel interrupt + - description: rx15 per-channel interrupt + - description: tx0 per-channel interrupt + - description: tx1 per-channel interrupt + - description: tx2 per-channel interrupt + - description: tx3 per-channel interrupt + - description: tx4 per-channel interrupt + - description: tx5 per-channel interrupt + - description: tx6 per-channel interrupt + - description: tx7 per-channel interrupt + - description: tx8 per-channel interrupt + - description: tx9 per-channel interrupt + - description: tx10 per-channel interrupt + - description: tx11 per-channel interrupt + - description: tx12 per-channel interrupt + - description: tx13 per-channel interrupt + - description: tx14 per-channel interrupt + - description: tx15 per-channel interrupt interrupt-names: minItems: 1 - maxItems: 5 + maxItems: 37 additionalItems: true items: - const: macirq @@ -123,6 +155,38 @@ properties: - eth_lpi - sfty_ce - sfty_ue + - rx0 + - rx1 + - rx2 + - rx3 + - rx4 + - rx5 + - rx6 + - rx7 + - rx8 + - rx9 + - rx10 + - rx11 + - rx12 + - rx13 + - rx14 + - rx15 + - tx0 + - tx1 + - tx2 + - tx3 + - tx4 + - tx5 + - tx6 + - tx7 + - tx8 + - tx9 + - tx10 + - tx11 + - tx12 + - tx13 + - tx14 + - tx15 clocks: minItems: 1 From patchwork Thu Aug 17 16:57:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13356831 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7094A19893 for ; Thu, 17 Aug 2023 17:10:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 795D1C433CC; Thu, 17 Aug 2023 17:09:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692292202; bh=IR6gUNrGlpvXPqUl6ePu23Yb6z5yLdZcfdC0Vl1Tk5c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TOgqtLSvVE7GaAYuEOY1QQVKqR/aWnRL6qArTZKkIzyUuFnur3EN4pXVMdXyyIYOF MpqH4+lNowBpEX69kkTJ9u5ZRywciLVWgwl58JF6KcwE8CXAZCWSKv8akgnm9KvVxf yNfhZUEHyw6xMo4a4XSkbD1ghvJV1XNN4nPgxyQ+MlyjTfoLbEjXswY1YTgBPRunkR vtU2EkuO5Izs/qJlL5qkomGoI/SkEn0NMwh3mJ7Ng/BM3BXMlp/NkeEtgIYaEC1Oo4 KmxizblmMKBLZvZu5b2KGdEL3jZwCsRAGNSKI3lJUK8gdDoKfgIXLxCuki8g8wnyJb piBqRfmbMcSWw== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v5 9/9] net: stmmac: platform: support parsing per channel irq from DT Date: Fri, 18 Aug 2023 00:57:49 +0800 Message-Id: <20230817165749.672-10-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230817165749.672-1-jszhang@kernel.org> References: <20230817165749.672-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The snps dwmac IP may support per channel interrupt. Add support to parse the per channel irq from DT. Signed-off-by: Jisheng Zhang --- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 10 ++++---- .../ethernet/stmicro/stmmac/stmmac_platform.c | 23 +++++++++++++++++++ 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 64c55024d69d..d4a8d7b48ad2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3619,7 +3619,7 @@ static int stmmac_request_irq_multi_channel(struct net_device *dev) for (i = 0; i < priv->plat->rx_queues_to_use; i++) { if (i >= MTL_MAX_RX_QUEUES) break; - if (priv->rx_irq[i] == 0) + if (priv->rx_irq[i] <= 0) continue; int_name = priv->int_name_rx_irq[i]; @@ -3644,7 +3644,7 @@ static int stmmac_request_irq_multi_channel(struct net_device *dev) for (i = 0; i < priv->plat->tx_queues_to_use; i++) { if (i >= MTL_MAX_TX_QUEUES) break; - if (priv->tx_irq[i] == 0) + if (priv->tx_irq[i] <= 0) continue; int_name = priv->int_name_tx_irq[i]; @@ -7300,8 +7300,10 @@ int stmmac_dvr_probe(struct device *device, priv->plat = plat_dat; priv->ioaddr = res->addr; priv->dev->base_addr = (unsigned long)res->addr; - priv->plat->dma_cfg->perch_irq_en = - (priv->plat->flags & STMMAC_FLAG_PERCH_IRQ_EN); + if (res->rx_irq[0] > 0 && res->tx_irq[0] > 0) { + priv->plat->flags |= STMMAC_FLAG_PERCH_IRQ_EN; + priv->plat->dma_cfg->perch_irq_en = true; + } priv->dev->irq = res->irq; priv->wol_irq = res->wol_irq; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index 4a2002eea870..0fb9868aeffc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -704,6 +704,9 @@ EXPORT_SYMBOL_GPL(stmmac_remove_config_dt); int stmmac_get_platform_resources(struct platform_device *pdev, struct stmmac_resources *stmmac_res) { + char irq_name[8]; + int i; + memset(stmmac_res, 0, sizeof(*stmmac_res)); /* Get IRQ information early to have an ability to ask for deferred @@ -737,6 +740,26 @@ int stmmac_get_platform_resources(struct platform_device *pdev, dev_info(&pdev->dev, "IRQ eth_lpi not found\n"); } + for (i = 0; i < MTL_MAX_RX_QUEUES; i++) { + snprintf(irq_name, sizeof(irq_name), "rx%i", i); + stmmac_res->rx_irq[i] = platform_get_irq_byname_optional(pdev, irq_name); + if (stmmac_res->rx_irq[i] < 0) { + if (stmmac_res->rx_irq[i] == -EPROBE_DEFER) + return -EPROBE_DEFER; + break; + } + } + + for (i = 0; i < MTL_MAX_TX_QUEUES; i++) { + snprintf(irq_name, sizeof(irq_name), "tx%i", i); + stmmac_res->tx_irq[i] = platform_get_irq_byname_optional(pdev, irq_name); + if (stmmac_res->tx_irq[i] < 0) { + if (stmmac_res->tx_irq[i] == -EPROBE_DEFER) + return -EPROBE_DEFER; + break; + } + } + stmmac_res->sfty_ce_irq = platform_get_irq_byname_optional(pdev, "sfty_ce"); if (stmmac_res->sfty_ce_irq < 0) { if (stmmac_res->sfty_ce_irq == -EPROBE_DEFER)