From patchwork Sun Aug 20 10:26:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34366EE49A6 for ; Sun, 20 Aug 2023 10:27:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230338AbjHTK1Q (ORCPT ); Sun, 20 Aug 2023 06:27:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230335AbjHTK1L (ORCPT ); Sun, 20 Aug 2023 06:27:11 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BA8E1BB; Sun, 20 Aug 2023 03:23:56 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id 2adb3069b0e04-4fe11652b64so3455105e87.0; Sun, 20 Aug 2023 03:23:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692527034; x=1693131834; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zJH7/+si9b/KfqTSKBxRUP5/ijpoIPhIhDqlelDJelY=; b=sffEoRgVY9C46xe3jeqfnb/NdSnP4epsfcljuRKQKlLMo/GN8xEzC6UJTC5qXVthLk ZFbatSZ0AGBA3Bjxgl4JI27Juepb4hMjDQryptjEpue65DqcQK9iNBHBnzpyX5ijwFfp 6bcz7GImgMNvNMq2+yelkVPi1FGCB8U4sbincXLcjIGAi7PSLMWKeGMw/MkVoHm8p6Lc nHmtze+brJW7nyRCibBLG2MMO/14XIwN729HZe+/QEjUVbtQ7gZwhEHXSSbb78JbMIHo EGi0BRd9qT8gBeA8qzQxo4DQJalsMIGfSHeKfIorMBQA7tq9k2LhAww4Yll7kedGR0ne ro8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692527034; x=1693131834; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zJH7/+si9b/KfqTSKBxRUP5/ijpoIPhIhDqlelDJelY=; b=UORVNytouNOfCwaxTkLvO13XPihJ8UT4eM2XKt7WcvDfPQnU821/Ki2zygCYg+ZHh8 j8lVCh0zklWdc9YzcZIiDpooOchpf4QMMvZe2CF2d1M3RAw6RYEIHwWZ6eEL1f5X81k2 t0qijxmTgyPMuc826F15IZmgYc6lgtxW7bAjUcgySr+pWBDuyJKKQ4yt26yBRdTwFN5p QiQVANxY/wWE5UmGV6X5Xa3vyDz5KjDNwDnrQHeIuyTE0MxW32pcDf6YGMAgG66eHshP YPM25JXu9XyWF1wlieDNctkQM1mWtyp9zSqGPKnIeApk3ekGIBpEyUxuFGWJYPL005Hk ohMA== X-Gm-Message-State: AOJu0YxQaQ4KdKlQPkubOopuzRNRcJORmSNdkTFjYhb+Bfnr7g7Re76S 8L0dupC7s0LmQIPGyom/1Io= X-Google-Smtp-Source: AGHT+IHQLA6aFC0cYcEHyElnpiYWDjxmQIkQeMHlKJjj9w1g0h8CNdggn7yatseLJ2PWBadSJzZ+rg== X-Received: by 2002:a05:6512:31c8:b0:4fb:91c5:fd38 with SMTP id j8-20020a05651231c800b004fb91c5fd38mr3276295lfe.0.1692527033673; Sun, 20 Aug 2023 03:23:53 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.23.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:23:52 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v7 1/6] dt-bindings: iio: adc: mcp3911: add support for the whole MCP39xx family Date: Sun, 20 Aug 2023 12:26:05 +0200 Message-ID: <20230820102610.755188-2-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add those to the compatible string as the driver support is extended. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson Reviewed-by: Krzysztof Kozlowski --- Notes: v2: - No changes v3: - No changes v4: - No changes v5: - No changes v6: - No changes v7: - No changes .../devicetree/bindings/iio/adc/microchip,mcp3911.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml index f7b3fde4115a..06951ec5f5da 100644 --- a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml @@ -18,7 +18,13 @@ description: | properties: compatible: enum: + - microchip,mcp3910 - microchip,mcp3911 + - microchip,mcp3912 + - microchip,mcp3913 + - microchip,mcp3914 + - microchip,mcp3918 + - microchip,mcp3919 reg: maxItems: 1 From patchwork Sun Aug 20 10:26:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 553BFEE49AB for ; Sun, 20 Aug 2023 10:27:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230384AbjHTK1Q (ORCPT ); Sun, 20 Aug 2023 06:27:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58224 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230336AbjHTK1M (ORCPT ); Sun, 20 Aug 2023 06:27:12 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5937A1BC; Sun, 20 Aug 2023 03:23:57 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-4ff882397ecso3422469e87.3; Sun, 20 Aug 2023 03:23:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692527035; x=1693131835; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oZgU6wA7Pmpp+VVi1e/SiyvYotk5nrCsae8fMfP/TU8=; b=YvDF/i2IMPF/LEfh21+Oe5D8maqlyzoWZjma8ygZbTlESoDO1wFDnMkcrFj3+NDM+C CRqjAFLnYYfNmPImCO35w7WMEwYn7QinutBlnA/7AlGu+IdAA1B7Th3uYDqbPEKziMTC qtgKWMKtSyU3d97Fjum+rR4ZT0351MIznM+ZxkdiUI1Oh/0c3qFDExFS29YPABBhfAkZ EJTmLluhMx2a8PhUrzUkxrx17FeNVq+j4LJwwg5Qr/kGFwsOYtdUGl1rcMy3h5y0Y3K1 u06FTo32hka4+/l2CEGWAqrZxGYbV3pCKim7Wv4GG6kYAE+C/xHLsifyiYcM0mqpvYIy p/ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692527035; x=1693131835; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oZgU6wA7Pmpp+VVi1e/SiyvYotk5nrCsae8fMfP/TU8=; b=OnojUomBt/U2YEfykhrvlxO0DKi2if55ybtUmTLHbvT8s0gK4YHuwrA0XzGfvm3l0u j0jL+wcmE2hlfsDvHO2YeHvn7hXat3hF/D1Shli0S5w3r85ZVDg4Zof7ONf2M1uAivvZ HUBRurw8405RBr3utRaCmoTSaFkPU6Ng1rCiowRfpBsmR2yj8m0lA0s4mXFf+SUXk3Q9 EKbVvEEw4ekCweX31kWdPlzBA6/OYXbpTTFfdFXGoSrGMPD/10FuEPsUxviWBMQAscV5 X+vvh1/O+GwhGLwGPiUdfhCfWDNaJxWhIji7P5ZxNBZrfh1r/JIjDSzgS0qHBwnV/odq WzIQ== X-Gm-Message-State: AOJu0YyteXVNYQo2mJ4HesOI38nwaor+V18zGTUF+xqo6xIobPK9o2D2 R+Yidi3exPg+RBi8AOUedEQ= X-Google-Smtp-Source: AGHT+IHZ2HBQXFW0qIFZcelvjHk+6eC+3aJ/KAG/NUT1m74UVHtr4nHQpBk3pWdFiv85+yN4zrKN2A== X-Received: by 2002:a05:6512:615:b0:4fd:d213:dfd4 with SMTP id b21-20020a056512061500b004fdd213dfd4mr2350539lfe.20.1692527035484; Sun, 20 Aug 2023 03:23:55 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.23.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:23:54 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 2/6] iio: adc: mcp3911: make use of dev_err_probe() Date: Sun, 20 Aug 2023 12:26:06 +0200 Message-ID: <20230820102610.755188-3-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Simplify code by switch to dev_err_probe(). Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v5: - New patch in this series v6: - fix xmas tree order v7: - use dev_err_probe for config and scale function as well drivers/iio/adc/mcp3911.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 974c5bd923a6..7fb3ab4a4256 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -277,10 +277,7 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) if (adc->vref) { ret = regulator_get_voltage(adc->vref); if (ret < 0) { - dev_err(&adc->spi->dev, - "failed to get vref voltage: %d\n", - ret); - return ret; + return dev_err_probe(&adc->spi->dev, ret, "failed to get vref voltage\n"); } ref = ret / 1000; @@ -396,10 +393,9 @@ static int mcp3911_config(struct mcp3911 *adc) if (ret) device_property_read_u32(dev, "device-addr", &adc->dev_addr); if (adc->dev_addr > 3) { - dev_err(&adc->spi->dev, - "invalid device address (%i). Must be in range 0-3.\n", - adc->dev_addr); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, + "invalid device address (%i). Must be in range 0-3.\n", + adc->dev_addr); } dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr); @@ -466,6 +462,7 @@ static const struct iio_trigger_ops mcp3911_trigger_ops = { static int mcp3911_probe(struct spi_device *spi) { + struct device *dev = &spi->dev; struct iio_dev *indio_dev; struct mcp3911 *adc; int ret; @@ -482,10 +479,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get regulator (%ld)\n", - PTR_ERR(adc->vref)); - return PTR_ERR(adc->vref); + return dev_err_probe(dev, PTR_ERR(adc->vref), "failed to get regulator\n"); } } else { @@ -504,10 +498,7 @@ static int mcp3911_probe(struct spi_device *spi) if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; } else { - dev_err(&adc->spi->dev, - "failed to get adc clk (%ld)\n", - PTR_ERR(adc->clki)); - return PTR_ERR(adc->clki); + return dev_err_probe(dev, PTR_ERR(adc->clki), "failed to get adc clk\n"); } } From patchwork Sun Aug 20 10:26:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F600EE49AC for ; Sun, 20 Aug 2023 10:27:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230391AbjHTK1R (ORCPT ); Sun, 20 Aug 2023 06:27:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230340AbjHTK1M (ORCPT ); Sun, 20 Aug 2023 06:27:12 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C39BAE40; Sun, 20 Aug 2023 03:23:58 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-4fe457ec6e7so3462022e87.3; Sun, 20 Aug 2023 03:23:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692527037; x=1693131837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OqWrQxkbWf9wYQs+sFA06GminTdHA58J91bgcXwAllQ=; b=dWkqiQZ66jhFMPav1vMLgdgoNnPR96Rr2tGAiIFNA/b59heVTP5eTqNk12VTRQrSsA LPG4tDab08BT09tR3DYZ+WXPiZ0G2HdP1eMZLPwxWXoOgz7QMcdCTwnm0mwMJbftey6M R/T3PaG3XGhFtvCIb3iV7DVLJr0BHUNFIOY31j8ZxZcVfFBUqmltMhLo424iXZwmANjL tuRoXKswn/RxpwjaLlZRd3ZZJE2tmSWFXwO+v76NTRs/7iNgIf4N9h2FzZYuSethMTU0 TgSXEDEPo7wQsRjjm/sKN8Qurd3o1rs599bn8Fb01uj+wH4EZeXkcBnJVhA0F4XvcFUz HiVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692527037; x=1693131837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OqWrQxkbWf9wYQs+sFA06GminTdHA58J91bgcXwAllQ=; b=eA9HjVGb7CI1p2FO5B2I0B27T2aIhwm6g3Mvk+Kl7ZEjn0V0Vd/cLPawfMOKzpQqU4 QFMZv0LGWeIeA/7c3F6OikaHNp6w13RlL2gNSjgFnt1WeGwBj0se4wwU78xdXguu4gjF 8RlcP+87XfkXRz4h6EGKNBFO017XFWDkHgoKh8o1eUt8ZL6EQmLw66ilgQG2huxxLfAh Qo0wlluM8GU6BeOcoHfUuvTCMfGF/eZo9dly3nkOIhJj4NiwsrfMgI+QplRz8C4ndKEm Wu1l2/otMur6nUd94OL02e+PlZRAq4D4NO+sDN4CFOX8cl15S4QVFHbD9ZkyLigRKTz2 z6sQ== X-Gm-Message-State: AOJu0YyIteA1PWfJaxbKhuB00gFBFgEiWYKVfkm86vUCRgAPhEwbfj15 mmqGQ8WzXwruN9rDsM8dMy8= X-Google-Smtp-Source: AGHT+IG2tlht0icg5joxlVGWuLL+ilBRuAUZn7Ntxe6Fsv9Qr7bdJWCsmTKwDYuTw90L1bSLM2QvFQ== X-Received: by 2002:a05:6512:39c1:b0:4ff:8b28:7b22 with SMTP id k1-20020a05651239c100b004ff8b287b22mr2526638lfu.68.1692527036989; Sun, 20 Aug 2023 03:23:56 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:23:56 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 3/6] iio: adc: mcp3911: simplify usage of spi->dev Date: Sun, 20 Aug 2023 12:26:07 +0200 Message-ID: <20230820102610.755188-4-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Replace the usage of `adc->spi->dev` with `dev` to make the code prettier. Reviewed-by: Andy Shevchenko Suggested-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v4: - New patch in this series v5: - Introduce `struct device *dev` to more functions v6: - cosmetics v7: - compress some calls to two lines drivers/iio/adc/mcp3911.c | 50 ++++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 7fb3ab4a4256..31ee8d7f81de 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -269,6 +269,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, static int mcp3911_calc_scale_table(struct mcp3911 *adc) { + struct device *dev = &adc->spi->dev; u32 ref = MCP3911_INT_VREF_MV; u32 div; int ret; @@ -277,7 +278,7 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) if (adc->vref) { ret = regulator_get_voltage(adc->vref); if (ret < 0) { - return dev_err_probe(&adc->spi->dev, ret, "failed to get vref voltage\n"); + return dev_err_probe(dev, ret, "failed to get vref voltage\n"); } ref = ret / 1000; @@ -334,6 +335,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) struct iio_poll_func *pf = p; struct iio_dev *indio_dev = pf->indio_dev; struct mcp3911 *adc = iio_priv(indio_dev); + struct device *dev = &adc->spi->dev; struct spi_transfer xfer[] = { { .tx_buf = &adc->tx_buf, @@ -351,8 +353,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) adc->tx_buf = MCP3911_REG_READ(MCP3911_CHANNEL(0), adc->dev_addr); ret = spi_sync_transfer(adc->spi, xfer, ARRAY_SIZE(xfer)); if (ret < 0) { - dev_warn(&adc->spi->dev, - "failed to get conversion data\n"); + dev_warn(dev, "failed to get conversion data\n"); goto out; } @@ -397,7 +398,7 @@ static int mcp3911_config(struct mcp3911 *adc) "invalid device address (%i). Must be in range 0-3.\n", adc->dev_addr); } - dev_dbg(&adc->spi->dev, "use device address %i\n", adc->dev_addr); + dev_dbg(dev, "use device address %i\n", adc->dev_addr); ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) @@ -405,21 +406,19 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_CONFIG_VREFEXT; if (adc->vref) { - dev_dbg(&adc->spi->dev, "use external voltage reference\n"); + dev_dbg(dev, "use external voltage reference\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use internal voltage reference (1.2V)\n"); + dev_dbg(dev, "use internal voltage reference (1.2V)\n"); regval |= FIELD_PREP(MCP3911_CONFIG_VREFEXT, 0); } regval &= ~MCP3911_CONFIG_CLKEXT; if (adc->clki) { - dev_dbg(&adc->spi->dev, "use external clock as clocksource\n"); + dev_dbg(dev, "use external clock as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 1); } else { - dev_dbg(&adc->spi->dev, - "use crystal oscillator as clocksource\n"); + dev_dbg(dev, "use crystal oscillator as clocksource\n"); regval |= FIELD_PREP(MCP3911_CONFIG_CLKEXT, 0); } @@ -467,14 +466,14 @@ static int mcp3911_probe(struct spi_device *spi) struct mcp3911 *adc; int ret; - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); if (!indio_dev) return -ENOMEM; adc = iio_priv(indio_dev); adc->spi = spi; - adc->vref = devm_regulator_get_optional(&adc->spi->dev, "vref"); + adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { if (PTR_ERR(adc->vref) == -ENODEV) { adc->vref = NULL; @@ -487,13 +486,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - ret = devm_add_action_or_reset(&spi->dev, - mcp3911_cleanup_regulator, adc->vref); + ret = devm_add_action_or_reset(dev, mcp3911_cleanup_regulator, adc->vref); if (ret) return ret; } - adc->clki = devm_clk_get_enabled(&adc->spi->dev, NULL); + adc->clki = devm_clk_get_enabled(dev, NULL); if (IS_ERR(adc->clki)) { if (PTR_ERR(adc->clki) == -ENOENT) { adc->clki = NULL; @@ -506,7 +504,7 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - if (device_property_read_bool(&adc->spi->dev, "microchip,data-ready-hiz")) + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, 0, 2); else @@ -540,15 +538,14 @@ static int mcp3911_probe(struct spi_device *spi) mutex_init(&adc->lock); if (spi->irq > 0) { - adc->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d", - indio_dev->name, - iio_device_id(indio_dev)); + adc->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, + iio_device_id(indio_dev)); if (!adc->trig) return -ENOMEM; adc->trig->ops = &mcp3911_trigger_ops; iio_trigger_set_drvdata(adc->trig, adc); - ret = devm_iio_trigger_register(&spi->dev, adc->trig); + ret = devm_iio_trigger_register(dev, adc->trig); if (ret) return ret; @@ -557,20 +554,19 @@ static int mcp3911_probe(struct spi_device *spi) * Some platforms might not allow the option to power it down so * don't enable the interrupt to avoid extra load on the system. */ - ret = devm_request_irq(&spi->dev, spi->irq, - &iio_trigger_generic_data_rdy_poll, IRQF_NO_AUTOEN | IRQF_ONESHOT, - indio_dev->name, adc->trig); + ret = devm_request_irq(dev, spi->irq, &iio_trigger_generic_data_rdy_poll, + IRQF_NO_AUTOEN | IRQF_ONESHOT, + indio_dev->name, adc->trig); if (ret) return ret; } - ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, - NULL, - mcp3911_trigger_handler, NULL); + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, + mcp3911_trigger_handler, NULL); if (ret) return ret; - return devm_iio_device_register(&adc->spi->dev, indio_dev); + return devm_iio_device_register(dev, indio_dev); } static const struct of_device_id mcp3911_dt_ids[] = { From patchwork Sun Aug 20 10:26:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358742 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D4D0EE49B0 for ; Sun, 20 Aug 2023 10:27:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230238AbjHTK1R (ORCPT ); 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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:23:57 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 4/6] iio: adc: mcp3911: fix indentation Date: Sun, 20 Aug 2023 12:26:08 +0200 Message-ID: <20230820102610.755188-5-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The whole file does not make use of indentation properly. Do something about it. Reviewed-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v4: - New patch in this series v5: - Cosmetics v6: - Little rewording in commit message v7: - No changes drivers/iio/adc/mcp3911.c | 41 +++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 31ee8d7f81de..f9db08813645 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -33,7 +33,7 @@ #define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch)) #define MCP3911_REG_STATUSCOM 0x0a -#define MCP3911_STATUSCOM_DRHIZ BIT(12) +#define MCP3911_STATUSCOM_DRHIZ BIT(12) #define MCP3911_STATUSCOM_READ GENMASK(7, 6) #define MCP3911_STATUSCOM_CH1_24WIDTH BIT(4) #define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3) @@ -111,8 +111,7 @@ static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) return spi_write(adc->spi, &val, len + 1); } -static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, - u32 val, u8 len) +static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len) { u32 tmp; int ret; @@ -127,8 +126,8 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, } static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - long mask) + struct iio_chan_spec const *chan, + long mask) { switch (mask) { case IIO_CHAN_INFO_SCALE: @@ -141,9 +140,9 @@ static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, } static int mcp3911_read_avail(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - const int **vals, int *type, int *length, - long info) + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) { switch (info) { case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -212,8 +211,8 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, } static int mcp3911_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *channel, int val, - int val2, long mask) + struct iio_chan_spec const *channel, int val, + int val2, long mask) { struct mcp3911 *adc = iio_priv(indio_dev); int ret = -EINVAL; @@ -223,12 +222,12 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_SCALE: for (int i = 0; i < MCP3911_NUM_SCALES; i++) { if (val == mcp3911_scale_table[i][0] && - val2 == mcp3911_scale_table[i][1]) { + val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + MCP3911_GAIN_MASK(channel->channel), + MCP3911_GAIN_VAL(channel->channel, i), 1); } } break; @@ -246,8 +245,8 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, /* Enable offset*/ ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + MCP3911_STATUSCOM_EN_OFFCAL, + MCP3911_STATUSCOM_EN_OFFCAL, 2); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: @@ -255,7 +254,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, if (val == mcp3911_osr_table[i]) { val = FIELD_PREP(MCP3911_CONFIG_OSR, i); ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + val, 2); break; } } @@ -506,10 +505,10 @@ static int mcp3911_probe(struct spi_device *spi) if (device_property_read_bool(dev, "microchip,data-ready-hiz")) ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); + 0, 2); else ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + MCP3911_STATUSCOM_DRHIZ, 2); if (ret) return ret; @@ -517,12 +516,12 @@ static int mcp3911_probe(struct spi_device *spi) if (ret) return ret; - /* Set gain to 1 for all channels */ + /* Set gain to 1 for all channels */ for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(i), - MCP3911_GAIN_VAL(i, 0), 1); + MCP3911_GAIN_MASK(i), + MCP3911_GAIN_VAL(i, 0), 1); if (ret) return ret; } From patchwork Sun Aug 20 10:26:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358744 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4ADCDEE49AC for ; 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[83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:23:59 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 5/6] iio: adc: mcp3911: avoid ambiguity parameters in macros Date: Sun, 20 Aug 2023 12:26:09 +0200 Message-ID: <20230820102610.755188-6-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Name macro parameters after what they represent instead of 'x' and make sure the evaluation of that will have no side effects. Reviewed-by: Andy Shevchenko Signed-off-by: Marcus Folkesson --- Notes: v5: - New patch in this series v6: - change 'ch' to '(ch)' v7: - Reword commit message drivers/iio/adc/mcp3911.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index f9db08813645..281cc1211fd6 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -29,8 +29,8 @@ #define MCP3911_REG_MOD 0x06 #define MCP3911_REG_PHASE 0x07 #define MCP3911_REG_GAIN 0x09 -#define MCP3911_GAIN_MASK(ch) (GENMASK(2, 0) << 3 * ch) -#define MCP3911_GAIN_VAL(ch, val) ((val << 3 * ch) & MCP3911_GAIN_MASK(ch)) +#define MCP3911_GAIN_MASK(ch) (GENMASK(2, 0) << 3 * (ch)) +#define MCP3911_GAIN_VAL(ch, val) ((val << 3 * (ch)) & MCP3911_GAIN_MASK(ch)) #define MCP3911_REG_STATUSCOM 0x0a #define MCP3911_STATUSCOM_DRHIZ BIT(12) @@ -51,8 +51,8 @@ #define MCP3911_REG_GAINCAL_CH1 0x17 #define MCP3911_REG_VREFCAL 0x1a -#define MCP3911_CHANNEL(x) (MCP3911_REG_CHANNEL0 + x * 3) -#define MCP3911_OFFCAL(x) (MCP3911_REG_OFFCAL_CH0 + x * 6) +#define MCP3911_CHANNEL(ch) (MCP3911_REG_CHANNEL0 + (ch) * 3) +#define MCP3911_OFFCAL(ch) (MCP3911_REG_OFFCAL_CH0 + (ch) * 6) /* Internal voltage reference in mV */ #define MCP3911_INT_VREF_MV 1200 From patchwork Sun Aug 20 10:26:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Folkesson X-Patchwork-Id: 13358743 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7FC0EE49B2 for ; Sun, 20 Aug 2023 10:27:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230401AbjHTK1S (ORCPT ); Sun, 20 Aug 2023 06:27:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230351AbjHTK1N (ORCPT ); Sun, 20 Aug 2023 06:27:13 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32BE4E45; Sun, 20 Aug 2023 03:24:03 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-4fe1b00fce2so3415150e87.3; Sun, 20 Aug 2023 03:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1692527041; x=1693131841; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oCzqE3tP+PNxmVJIWD5ApwiZ9fuaucz/YJxFqbfZQq0=; b=sSpU/Xz2Q7JtPBMJ8OAf7u12WDmxaMvWHShKuV4E2QBy2oZa19TLooDdHO3V085ta4 t+dW8gjMXOSFdufW3fD7vGNfTmiYNHrGGvEldp8hvVkC+b8T7iCU3Npl43IXHes2+2ci 7oJJ/Ng722ymly86efBcYVYWZFgLbKwIHP2hjdxNZZIQW6m07j6K3z4ZpAXprbl+EvM3 JF6RMfHhlwYbcOfQl1TkSY54ez+sAjmnLarZrC33C5zWMEd3vlufGoPYNRhanXwV5B9J PTVXF/1UpMnN3ObzQF89Ds4V6O7T0guqsnVicGgVLPgTaYMJyfQNShe/wyMdcMArpsQL uySQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692527041; x=1693131841; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oCzqE3tP+PNxmVJIWD5ApwiZ9fuaucz/YJxFqbfZQq0=; b=cZOLGONict5DGONSRAzGRTq+Jp201p7krnjJZtQoXXfDOLJAfzydTgK0NEGOtb3hfd j9n25FagWN9HryAy32g9ErpCheA5e3A3PJ1C9h1dFmYHXigl+dd1nGdbvTqBxORbi2fG n3xpnXOYy/6T4p10TmlzbSfvECXD9Jwh5WrXPGBcnZ/1nLPVrSGWDJjkrQDiFzfbD2t7 khdMqwqS0vFyic+RGyiuvb8FTNIVeIDKLrCqOZpeeNvY/9HsLcQiq4z/A3C7/x3SOIV3 efRt6/pMPm4Ie7mxHAHgmWzL5DKD+vlEmJd22TVLUCWZDt4Ps2dHMk0tYXHUV59dujVi u6Gw== X-Gm-Message-State: AOJu0YyuNoNaRYYX6MvK1j4AA/eUJF0xaEFSIKItU6B9co3CtM9+Bj2p 5II+AzcDsWohSoL/wR5qrLs= X-Google-Smtp-Source: AGHT+IHz+orj+wRar8wWq46bmsVv+EapQnTKAUbZClqGwH0rPjwr3o34RJR//Ot6XIoZNh6VQiRZ9Q== X-Received: by 2002:a05:6512:2395:b0:4fb:73ce:8e7d with SMTP id c21-20020a056512239500b004fb73ce8e7dmr3538763lfv.15.1692527041328; Sun, 20 Aug 2023 03:24:01 -0700 (PDT) Received: from localhost.localdomain (83-233-6-197.cust.bredband2.com. [83.233.6.197]) by smtp.gmail.com with ESMTPSA id x2-20020ac25dc2000000b004ff9d22e486sm1193787lfq.226.2023.08.20.03.24.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Aug 2023 03:24:00 -0700 (PDT) From: Marcus Folkesson To: Marcus Folkesson , Kent Gustavsson , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , Cosmin Tanislav , Arnd Bergmann , ChiYuan Huang , Haibo Chen , Ramona Bolboaca , Ibrahim Tilki , ChiaEn Wu , William Breathitt Gray Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 6/6] iio: adc: mcp3911: add support for the whole MCP39xx family Date: Sun, 20 Aug 2023 12:26:10 +0200 Message-ID: <20230820102610.755188-7-marcus.folkesson@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230820102610.755188-1-marcus.folkesson@gmail.com> References: <20230820102610.755188-1-marcus.folkesson@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Microchip does have many similar chips, add support for those. The new supported chips are: - microchip,mcp3910 - microchip,mcp3912 - microchip,mcp3913 - microchip,mcp3914 - microchip,mcp3918 - microchip,mcp3919 Signed-off-by: Marcus Folkesson Reviewed-by: Andy Shevchenko --- Notes: v2: - Use callbacks rather than matching against enum for determine chip variants v3: - Fix cosmetics v4: - Do not pollute output variable upon error in *_get_osr() functions. - Fix cosmetics v5: - Reorder text in Kconfig - change val to u32 for *_get_osr(), *_set_osr() and *_set_scale() - avoid ambiguity parameters in macro v6: - cosmetics - Return on dev_err_probe() v7: - cosmetics - introduce _enable_offset() drivers/iio/adc/Kconfig | 6 +- drivers/iio/adc/mcp3911.c | 468 +++++++++++++++++++++++++++++++++----- 2 files changed, 417 insertions(+), 57 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index dc14bde31ac1..c25285b09dbb 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -785,8 +785,10 @@ config MCP3911 select IIO_BUFFER select IIO_TRIGGERED_BUFFER help - Say yes here to build support for Microchip Technology's MCP3911 - analog to digital converter. + Say yes here to build support for one of the following + Microchip Technology's analog to digital converters: + MCP3910, MCP3911, MCP3912, MCP3913, MCP3914, + MCP3918 and MCP3919. This driver can also be built as a module. If so, the module will be called mcp3911. diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 281cc1211fd6..54ba24d368c9 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -61,12 +61,56 @@ #define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 6) | (0 << 0)) & 0xff) #define MCP3911_REG_MASK GENMASK(4, 1) -#define MCP3911_NUM_CHANNELS 2 #define MCP3911_NUM_SCALES 6 +/* Registers compatible with MCP3910 */ +#define MCP3910_REG_STATUSCOM 0x0c +#define MCP3910_STATUSCOM_READ GENMASK(23, 22) +#define MCP3910_STATUSCOM_DRHIZ BIT(20) + +#define MCP3910_REG_GAIN 0x0b + +#define MCP3910_REG_CONFIG0 0x0d +#define MCP3910_CONFIG0_EN_OFFCAL BIT(23) +#define MCP3910_CONFIG0_OSR GENMASK(15, 13) + +#define MCP3910_REG_CONFIG1 0x0e +#define MCP3910_CONFIG1_CLKEXT BIT(6) +#define MCP3910_CONFIG1_VREFEXT BIT(7) + +#define MCP3910_REG_OFFCAL_CH0 0x0f +#define MCP3910_OFFCAL(ch) (MCP3910_REG_OFFCAL_CH0 + (ch) * 6) + +/* Maximal number of channels used by the MCP39XX family */ +#define MCP39XX_MAX_NUM_CHANNELS 8 + static const int mcp3911_osr_table[] = { 32, 64, 128, 256, 512, 1024, 2048, 4096 }; static u32 mcp3911_scale_table[MCP3911_NUM_SCALES][2]; +enum mcp3911_id { + MCP3910, + MCP3911, + MCP3912, + MCP3913, + MCP3914, + MCP3918, + MCP3919, +}; + +struct mcp3911; +struct mcp3911_chip_info { + const struct iio_chan_spec *channels; + unsigned int num_channels; + + int (*config)(struct mcp3911 *adc); + int (*get_osr)(struct mcp3911 *adc, u32 *val); + int (*set_osr)(struct mcp3911 *adc, u32 val); + int (*enable_offset)(struct mcp3911 *adc, bool enable); + int (*get_offset)(struct mcp3911 *adc, int channel, int *val); + int (*set_offset)(struct mcp3911 *adc, int channel, int val); + int (*set_scale)(struct mcp3911 *adc, int channel, u32 val); +}; + struct mcp3911 { struct spi_device *spi; struct mutex lock; @@ -74,14 +118,15 @@ struct mcp3911 { struct clk *clki; u32 dev_addr; struct iio_trigger *trig; - u32 gain[MCP3911_NUM_CHANNELS]; + u32 gain[MCP39XX_MAX_NUM_CHANNELS]; + const struct mcp3911_chip_info *chip; struct { - u32 channels[MCP3911_NUM_CHANNELS]; + u32 channels[MCP39XX_MAX_NUM_CHANNELS]; s64 ts __aligned(8); } scan; u8 tx_buf __aligned(IIO_DMA_MINALIGN); - u8 rx_buf[MCP3911_NUM_CHANNELS * 3]; + u8 rx_buf[MCP39XX_MAX_NUM_CHANNELS * 3]; }; static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) @@ -125,6 +170,114 @@ static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len return mcp3911_write(adc, reg, val, len); } +static int mcp3910_enable_offset(struct mcp3911 *adc, bool enable) +{ + unsigned int mask = MCP3910_CONFIG0_EN_OFFCAL; + + if (enable) + return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, mask, 3); + else + return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, 0, 3); +} + +static int mcp3910_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3910_OFFCAL(channel), val, 3); +} + +static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + ret = mcp3911_write(adc, MCP3910_OFFCAL(channel), val, 3); + if (ret) + return ret; + + return adc->chip->enable_offset(adc, 1); +} + +static int mcp3911_enable_offset(struct mcp3911 *adc, bool enable) +{ + unsigned int mask = MCP3911_STATUSCOM_EN_OFFCAL; + + if (enable) + return mcp3911_update(adc, MCP3911_REG_STATUSCOM, mask, mask, 2); + else + return mcp3911_update(adc, MCP3911_REG_STATUSCOM, mask, 0, 2); +} + +static int mcp3911_get_offset(struct mcp3911 *adc, int channel, int *val) +{ + return mcp3911_read(adc, MCP3911_OFFCAL(channel), val, 3); +} + +static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val) +{ + int ret; + + ret = mcp3911_write(adc, MCP3911_OFFCAL(channel), val, 3); + if (ret) + return ret; + + return adc->chip->enable_offset(adc, 1); +} + +static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG0, val, 3); + if (ret) + return ret; + + osr = FIELD_GET(MCP3910_CONFIG0_OSR, *val); + *val = 32 << osr; + return 0; +} + +static int mcp3910_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3910_CONFIG0_OSR, val); + unsigned int mask = MCP3910_CONFIG0_OSR; + + return mcp3911_update(adc, MCP3910_REG_CONFIG0, mask, osr, 3); +} + +static int mcp3911_set_osr(struct mcp3911 *adc, u32 val) +{ + int osr = FIELD_PREP(MCP3911_CONFIG_OSR, val); + unsigned int mask = MCP3911_CONFIG_OSR; + + return mcp3911_update(adc, MCP3911_REG_CONFIG, mask, osr, 2); +} + +static int mcp3911_get_osr(struct mcp3911 *adc, u32 *val) +{ + int ret, osr; + + ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + if (ret) + return ret; + + osr = FIELD_GET(MCP3911_CONFIG_OSR, *val); + *val = 32 << osr; + return ret; +} + +static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3910_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 3); +} + +static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val) +{ + return mcp3911_update(adc, MCP3911_REG_GAIN, + MCP3911_GAIN_MASK(channel), + MCP3911_GAIN_VAL(channel, val), 1); +} + static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask) @@ -181,20 +334,18 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, break; case IIO_CHAN_INFO_OFFSET: - ret = mcp3911_read(adc, - MCP3911_OFFCAL(channel->channel), val, 3); + + ret = adc->chip->get_offset(adc, channel->channel, val); if (ret) goto out; ret = IIO_VAL_INT; break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); + ret = adc->chip->get_osr(adc, val); if (ret) goto out; - *val = FIELD_GET(MCP3911_CONFIG_OSR, *val); - *val = 32 << *val; ret = IIO_VAL_INT; break; @@ -225,9 +376,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, val2 == mcp3911_scale_table[i][1]) { adc->gain[channel->channel] = BIT(i); - ret = mcp3911_update(adc, MCP3911_REG_GAIN, - MCP3911_GAIN_MASK(channel->channel), - MCP3911_GAIN_VAL(channel->channel, i), 1); + ret = adc->chip->set_scale(adc, channel->channel, i); } } break; @@ -237,24 +386,13 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, goto out; } - /* Write offset */ - ret = mcp3911_write(adc, MCP3911_OFFCAL(channel->channel), val, - 3); - if (ret) - goto out; - - /* Enable offset*/ - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, - MCP3911_STATUSCOM_EN_OFFCAL, - MCP3911_STATUSCOM_EN_OFFCAL, 2); + ret = adc->chip->set_offset(adc, channel->channel, val); break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: for (int i = 0; i < ARRAY_SIZE(mcp3911_osr_table); i++) { if (val == mcp3911_osr_table[i]) { - val = FIELD_PREP(MCP3911_CONFIG_OSR, i); - ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR, - val, 2); + ret = adc->chip->set_osr(adc, i); break; } } @@ -323,12 +461,60 @@ static int mcp3911_calc_scale_table(struct mcp3911 *adc) }, \ } +static const struct iio_chan_spec mcp3910_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + IIO_CHAN_SOFT_TIMESTAMP(2), +}; + static const struct iio_chan_spec mcp3911_channels[] = { MCP3911_CHAN(0), MCP3911_CHAN(1), IIO_CHAN_SOFT_TIMESTAMP(2), }; +static const struct iio_chan_spec mcp3912_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + IIO_CHAN_SOFT_TIMESTAMP(4), +}; + +static const struct iio_chan_spec mcp3913_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + IIO_CHAN_SOFT_TIMESTAMP(6), +}; + +static const struct iio_chan_spec mcp3914_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + MCP3911_CHAN(3), + MCP3911_CHAN(4), + MCP3911_CHAN(5), + MCP3911_CHAN(6), + MCP3911_CHAN(7), + IIO_CHAN_SOFT_TIMESTAMP(8), +}; + +static const struct iio_chan_spec mcp3918_channels[] = { + MCP3911_CHAN(0), + IIO_CHAN_SOFT_TIMESTAMP(1), +}; + +static const struct iio_chan_spec mcp3919_channels[] = { + MCP3911_CHAN(0), + MCP3911_CHAN(1), + MCP3911_CHAN(2), + IIO_CHAN_SOFT_TIMESTAMP(3), +}; + static irqreturn_t mcp3911_trigger_handler(int irq, void *p) { struct iio_poll_func *pf = p; @@ -341,7 +527,7 @@ static irqreturn_t mcp3911_trigger_handler(int irq, void *p) .len = 1, }, { .rx_buf = adc->rx_buf, - .len = sizeof(adc->rx_buf), + .len = (adc->chip->num_channels - 1) * 3, }, }; int scan_index; @@ -384,21 +570,6 @@ static int mcp3911_config(struct mcp3911 *adc) u32 regval; int ret; - ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); - - /* - * Fallback to "device-addr" due to historical mismatch between - * dt-bindings and implementation - */ - if (ret) - device_property_read_u32(dev, "device-addr", &adc->dev_addr); - if (adc->dev_addr > 3) { - return dev_err_probe(dev, -EINVAL, - "invalid device address (%i). Must be in range 0-3.\n", - adc->dev_addr); - } - dev_dbg(dev, "use device address %i\n", adc->dev_addr); - ret = mcp3911_read(adc, MCP3911_REG_CONFIG, ®val, 2); if (ret) return ret; @@ -433,7 +604,97 @@ static int mcp3911_config(struct mcp3911 *adc) regval &= ~MCP3911_STATUSCOM_READ; regval |= FIELD_PREP(MCP3911_STATUSCOM_READ, 0x02); - return mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + regval &= ~MCP3911_STATUSCOM_DRHIZ; + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3911_STATUSCOM_DRHIZ, 1); + + /* Disable offset to ignore any old values in offset register */ + regval &= ~MCP3911_STATUSCOM_EN_OFFCAL; + + ret = mcp3911_write(adc, MCP3911_REG_STATUSCOM, regval, 2); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3911_REG_GAIN, ®val, 1); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + + return mcp3911_write(adc, MCP3911_REG_GAIN, regval, 1); +} + +static int mcp3910_config(struct mcp3911 *adc) +{ + struct device *dev = &adc->spi->dev; + u32 regval; + int ret; + + ret = mcp3911_read(adc, MCP3910_REG_CONFIG1, ®val, 3); + if (ret) + return ret; + + regval &= ~MCP3910_CONFIG1_VREFEXT; + if (adc->vref) { + dev_dbg(dev, "use external voltage reference\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 1); + } else { + dev_dbg(dev, "use internal voltage reference (1.2V)\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_VREFEXT, 0); + } + + regval &= ~MCP3910_CONFIG1_CLKEXT; + if (adc->clki) { + dev_dbg(dev, "use external clock as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 1); + } else { + dev_dbg(dev, "use crystal oscillator as clocksource\n"); + regval |= FIELD_PREP(MCP3910_CONFIG1_CLKEXT, 0); + } + + ret = mcp3911_write(adc, MCP3910_REG_CONFIG1, regval, 3); + if (ret) + return ret; + + ret = mcp3911_read(adc, MCP3910_REG_STATUSCOM, ®val, 3); + if (ret) + return ret; + + /* Address counter incremented, cycle through register types */ + regval &= ~MCP3910_STATUSCOM_READ; + regval |= FIELD_PREP(MCP3910_STATUSCOM_READ, 0x02); + + regval &= ~MCP3910_STATUSCOM_DRHIZ; + if (device_property_read_bool(dev, "microchip,data-ready-hiz")) + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 0); + else + regval |= FIELD_PREP(MCP3910_STATUSCOM_DRHIZ, 1); + + ret = mcp3911_write(adc, MCP3910_REG_STATUSCOM, regval, 3); + if (ret) + return ret; + + /* Set gain to 1 for all channels */ + ret = mcp3911_read(adc, MCP3910_REG_GAIN, ®val, 3); + if (ret) + return ret; + + for (int i = 0; i < adc->chip->num_channels - 1; i++) { + adc->gain[i] = 1; + regval &= ~MCP3911_GAIN_MASK(i); + } + ret = mcp3911_write(adc, MCP3910_REG_GAIN, regval, 3); + if (ret) + return ret; + + /* Disable offset to ignore any old values in offset register */ + return adc->chip->enable_offset(adc, 0); } static void mcp3911_cleanup_regulator(void *vref) @@ -471,6 +732,7 @@ static int mcp3911_probe(struct spi_device *spi) adc = iio_priv(indio_dev); adc->spi = spi; + adc->chip = spi_get_device_match_data(spi); adc->vref = devm_regulator_get_optional(dev, "vref"); if (IS_ERR(adc->vref)) { @@ -499,16 +761,21 @@ static int mcp3911_probe(struct spi_device *spi) } } - ret = mcp3911_config(adc); + /* + * Fallback to "device-addr" due to historical mismatch between + * dt-bindings and implementation. + */ + ret = device_property_read_u32(dev, "microchip,device-addr", &adc->dev_addr); if (ret) - return ret; + device_property_read_u32(dev, "device-addr", &adc->dev_addr); + if (adc->dev_addr > 3) { + return dev_err_probe(dev, -EINVAL, + "invalid device address (%i). Must be in range 0-3.\n", + adc->dev_addr); + } + dev_dbg(dev, "use device address %i\n", adc->dev_addr); - if (device_property_read_bool(dev, "microchip,data-ready-hiz")) - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - 0, 2); - else - ret = mcp3911_update(adc, MCP3911_REG_STATUSCOM, MCP3911_STATUSCOM_DRHIZ, - MCP3911_STATUSCOM_DRHIZ, 2); + ret = adc->chip->config(adc); if (ret) return ret; @@ -517,7 +784,7 @@ static int mcp3911_probe(struct spi_device *spi) return ret; /* Set gain to 1 for all channels */ - for (int i = 0; i < MCP3911_NUM_CHANNELS; i++) { + for (int i = 0; i < adc->chip->num_channels - 1; i++) { adc->gain[i] = 1; ret = mcp3911_update(adc, MCP3911_REG_GAIN, MCP3911_GAIN_MASK(i), @@ -531,8 +798,8 @@ static int mcp3911_probe(struct spi_device *spi) indio_dev->info = &mcp3911_info; spi_set_drvdata(spi, indio_dev); - indio_dev->channels = mcp3911_channels; - indio_dev->num_channels = ARRAY_SIZE(mcp3911_channels); + indio_dev->channels = adc->chip->channels; + indio_dev->num_channels = adc->chip->num_channels; mutex_init(&adc->lock); @@ -568,14 +835,105 @@ static int mcp3911_probe(struct spi_device *spi) return devm_iio_device_register(dev, indio_dev); } +static const struct mcp3911_chip_info mcp3911_chip_info[] = { + [MCP3910] = { + .channels = mcp3910_channels, + .num_channels = ARRAY_SIZE(mcp3910_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3911] = { + .channels = mcp3911_channels, + .num_channels = ARRAY_SIZE(mcp3911_channels), + .config = mcp3911_config, + .get_osr = mcp3911_get_osr, + .set_osr = mcp3911_set_osr, + .enable_offset = mcp3911_enable_offset, + .get_offset = mcp3911_get_offset, + .set_offset = mcp3911_set_offset, + .set_scale = mcp3911_set_scale, + }, + [MCP3912] = { + .channels = mcp3912_channels, + .num_channels = ARRAY_SIZE(mcp3912_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3913] = { + .channels = mcp3913_channels, + .num_channels = ARRAY_SIZE(mcp3913_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3914] = { + .channels = mcp3914_channels, + .num_channels = ARRAY_SIZE(mcp3914_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3918] = { + .channels = mcp3918_channels, + .num_channels = ARRAY_SIZE(mcp3918_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, + [MCP3919] = { + .channels = mcp3919_channels, + .num_channels = ARRAY_SIZE(mcp3919_channels), + .config = mcp3910_config, + .get_osr = mcp3910_get_osr, + .set_osr = mcp3910_set_osr, + .enable_offset = mcp3910_enable_offset, + .get_offset = mcp3910_get_offset, + .set_offset = mcp3910_set_offset, + .set_scale = mcp3910_set_scale, + }, +}; static const struct of_device_id mcp3911_dt_ids[] = { - { .compatible = "microchip,mcp3911" }, + { .compatible = "microchip,mcp3910", .data = &mcp3911_chip_info[MCP3910] }, + { .compatible = "microchip,mcp3911", .data = &mcp3911_chip_info[MCP3911] }, + { .compatible = "microchip,mcp3912", .data = &mcp3911_chip_info[MCP3912] }, + { .compatible = "microchip,mcp3913", .data = &mcp3911_chip_info[MCP3913] }, + { .compatible = "microchip,mcp3914", .data = &mcp3911_chip_info[MCP3914] }, + { .compatible = "microchip,mcp3918", .data = &mcp3911_chip_info[MCP3918] }, + { .compatible = "microchip,mcp3919", .data = &mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(of, mcp3911_dt_ids); static const struct spi_device_id mcp3911_id[] = { - { "mcp3911", 0 }, + { "mcp3910", (kernel_ulong_t)&mcp3911_chip_info[MCP3910] }, + { "mcp3911", (kernel_ulong_t)&mcp3911_chip_info[MCP3911] }, + { "mcp3912", (kernel_ulong_t)&mcp3911_chip_info[MCP3912] }, + { "mcp3913", (kernel_ulong_t)&mcp3911_chip_info[MCP3913] }, + { "mcp3914", (kernel_ulong_t)&mcp3911_chip_info[MCP3914] }, + { "mcp3918", (kernel_ulong_t)&mcp3911_chip_info[MCP3918] }, + { "mcp3919", (kernel_ulong_t)&mcp3911_chip_info[MCP3919] }, { } }; MODULE_DEVICE_TABLE(spi, mcp3911_id);