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Sat, 09 Feb 2019 10:34:54 -0800 (PST) Message-ID: <68b71c15f32341468a868f6418e4fcb375bc49ba.camel@gmail.com> Subject: [PATCH] arm64/io: Don't use WZR in writel From: AngeloGioacchino Del Regno To: AngeloGioacchino Del Regno , Jens Axboe , Will Deacon , Catalin Marinas Date: Sat, 09 Feb 2019 19:34:53 +0100 User-Agent: Evolution 3.30.2 Mime-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190209_103457_420430_423B0066 X-CRM114-Status: GOOD ( 13.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From 33fb6d036de273bb71ac1c67d7a91b7a5148e659 Mon Sep 17 00:00:00 2001 From: "Angelo G. Del Regno" Date: Sat, 9 Feb 2019 18:56:46 +0100 Subject: [PATCH] arm64/io: Don't use WZR in writel This is a partial revert of commit ee5e41b5f21a ("arm64/io: Allow I/O writes to use {W,X}ZR") When we try to use the zero register directly on some SoCs, their security will make them freeze due to a firmware bug. This behavior is seen with the arm-smmu driver freezing on TLBI and TLBSYNC on MSM8996, MSM8998, SDM630, SDM660. Allocating a temporary register to store the zero for the write actually solves the issue on these SoCs. Signed-off-by: Angelo G. Del Regno Tested-by: Marc Gonzalez Reviewed-by: Marc Gonzalez Tested-by: Bjorn Andersson Reviewed-by: Bjorn Andersson Tested-by: AngeloGioacchino Del Regno --- arch/arm64/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index ee723835c1f4..a0a6d1aeb670 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -49,7 +49,7 @@ static inline void __raw_writew(u16 val, volatile void __iomem *addr) #define __raw_writel __raw_writel static inline void __raw_writel(u32 val, volatile void __iomem *addr) { - asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr)); + asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); } #define __raw_writeq __raw_writeq