From patchwork Mon Aug 28 14:58:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Goud, Srinivas" X-Patchwork-Id: 13368064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47DECC83F12 for ; Mon, 28 Aug 2023 15:00:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=69y95yOwtD+r9BhPsnt2hzeRSL6TgDdxxIb5M5EBHk4=; b=wV0ho4LVaTPgjP iVWKGmHjXsXa2Q8xEJqzNR0KxmI5JzqN5U4kbfltembJzQREI+ydfOyARwNIi1w6csYEoVp5lAphb aD00nqbtdrq5DeeIc3vs1OiCXV/xVZ5sHT7BU8o5gYMU5BILlb4PNJvJXYHizmFUhXTyaZLHBLI2W mGlo/TFltdfgDhBT1M2QWqq55r3sc/4hm9Kpm3bGrmVqa9v2O4MZ6eOFF1ISrqgJYvlcyGe7ogiGL /b9pbUyXJgzdmLMH+1iROK5iWQoHdQKYPtCqN1axa8qfL2vii6dumMiR9V2J83NGESL5Y623iru8h I/wG1ZbaVFGrFZuaD9UA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qadia-009kkI-1Q; Mon, 28 Aug 2023 14:59:52 +0000 Received: from mail-dm6nam11on20604.outbound.protection.outlook.com ([2a01:111:f400:7eaa::604] helo=NAM11-DM6-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qadiY-009kjI-1A for linux-arm-kernel@lists.infradead.org; Mon, 28 Aug 2023 14:59:51 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=dgVXz6eMQ/T443Dt28hC81At+98+MZU4+uJoXtqQameLLB7OBp7nje7P5sy8/CzZK3uQ3RVARvN8U2alOR3odE8tEFBjSJrkfgDpqw+FlW5G4EuG4y7XuwjoccwVh0Q/WgJLfmEFjL5q3ORjULS1ApwuOXIGMUO8I/8VmYrvAAcX3S6wHCRiDTEI01jaauuS9PwT2uv1VGucN0xvpkl9ppNCUA306OlCWbz5jgO30sw7P92C+6f2MbXTd/HbdDdW/wRf72pMFzjWVRdgWMj2thTHWdw9hsU5McOdc35b+uMP7j8CBFbpQRT4TmpkIzL1QO++qRsl8N7l65+zespxUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=4uEC8oJizXCfQmDSTLK5WRvnkKk52Rnj8gQ4cTGvBRs=; b=gT4bmZDipri8lE0Dp/8zCk0Z0JpMdmRxFsIfsyr1jLwSWyDPOIwF8vdg5myXIjEtHMoOGKmMK4m7EbxAiuBNJ1IkA1vdnY1jjRv0DAWhxvXuRDhcOnrQYRLVt9hkDt+fS8+JecypmPKDjRLkZ+TMnr7TkGszaqVlQwEQ5DX5vrBGglUh4bZLqhcdS75lkn/DM7CgalHmiaXn4Wljpr8OUJbQOEAwaqP/vXfGZu4jWZlflGIvHS4WwOPCbZXNeikGXZ3E59ugUN+RiO3sJpXvJuWogCF9s3m67QTBcCf8d736aIMDD+kD3PP/4mu4eT0ceFdnJzDMyE2ullWZjw20dg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=grandegger.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4uEC8oJizXCfQmDSTLK5WRvnkKk52Rnj8gQ4cTGvBRs=; b=cmCOExfyAaVWSHghGEgHjUccGpMclh2MO0LDvulXmMxlSnf2U0bG59bE1nMvjPJK2X5SPYJbEpXCSMxLI6mzMO6lsCd6un86f4rX0+IyiFUfgjIgH6LAEjJ3QsjGQaWEaM3joqx2aiMBoWIBmHaiXaiH1kNZWOAHGIAsbrwNewo= Received: from SA0PR13CA0029.namprd13.prod.outlook.com (2603:10b6:806:130::34) by SN7PR12MB7836.namprd12.prod.outlook.com (2603:10b6:806:34e::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.34; Mon, 28 Aug 2023 14:59:44 +0000 Received: from SN1PEPF0002636B.namprd02.prod.outlook.com (2603:10b6:806:130:cafe::9c) by SA0PR13CA0029.outlook.office365.com (2603:10b6:806:130::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.17 via Frontend Transport; Mon, 28 Aug 2023 14:59:44 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002636B.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.16 via Frontend Transport; Mon, 28 Aug 2023 14:59:43 +0000 Received: from SATLEXMB07.amd.com (10.181.41.45) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 28 Aug 2023 09:59:36 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 28 Aug 2023 07:59:25 -0700 Received: from xhdsgoud40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 28 Aug 2023 09:59:20 -0500 From: Srinivas Goud To: , , , , , , , , , CC: , , , , , , , , , "Srinivas Goud" Subject: [PATCH v3 1/3] dt-bindings: can: xilinx_can: Add ECC property 'xlnx,has-ecc' Date: Mon, 28 Aug 2023 20:28:43 +0530 Message-ID: <1693234725-3615719-2-git-send-email-srinivas.goud@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> References: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|SN7PR12MB7836:EE_ X-MS-Office365-Filtering-Correlation-Id: 97274339-79f2-4f0c-7ac3-08dba7d769e6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m3d8k262wmPZtG/KERrPKi2QbR3m2X9QCHnVfV0TesQKHqSUgI9OfvzF4QWdhHrGqa8vBzP+8qsl6kKeW9sh8Qy6+imhq1fS6nj+ODSPsg/S54NTeCSAQtcArHqVKC17dwToDuxk8frR2LjUiZD+GfUM3y/WDkSmbOpcj2bpmOMrg0Vn3AqE7bobScGsC7k9YQL3IG07dLFKzEa9ntX5VzDLM6a/k24cW5n5G07i+ckSVM3qK6XTLJxi/fZoPM3jjJpVnao4z6QFwlCaGcI0HR7aaGaGXU9zF2ArZT8v1gVLyRRTMI8/lkWtsR5aYdipKywgyZnrpgIPdmRGnFQsB1LT2IKyqrqqr9wZxeBRAFQJqa+dJ+2bUlt5lF+3k5aGCZJ2tXcI1tQJDKanwFuyx5P/Bfslc6E0m8mXYqjxte8zQgmO0D0/MQrTuHpoD9ze1nzZAMfKj32IyOUflZ+pi+kM9HeC6HJrpYvIgSCPutTD4Da6D+89j7Qco5nPAOoOtjhpEjFS/2ha/rfWhAmZ/xPkXT5FxdHDIfDkXaP6Yzxm796mYlv8wT733J+La2Z+AVx7LIgM0OSacgmHo7QXTV9caiBu8wEHzf/5/X0W6TGSMwr8C9+vwmH612YPhZNTQ6JgHsb6hjk7we1hoAruR1MvYwqjAP6G2BqSgxX3CGHnHDw5/bUfMk6jK1AFtzTnWC2RzspfIJnQT07d1N+MX8eJVhaGejOG1eqLWbrRukmbXSlsBYcq3JVFja8wUzUyjK/xIGlCJJNQyXCFEnGVg3O1ZVg+z7AA7dJFB+858+o= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(136003)(346002)(376002)(39860400002)(451199024)(1800799009)(82310400011)(186009)(36840700001)(40470700004)(46966006)(356005)(478600001)(921005)(81166007)(83380400001)(82740400003)(26005)(426003)(336012)(47076005)(36860700001)(2616005)(40480700001)(110136005)(6666004)(86362001)(5660300002)(2906002)(44832011)(7416002)(316002)(8936002)(4326008)(70206006)(36756003)(41300700001)(54906003)(8676002)(70586007)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2023 14:59:43.8951 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 97274339-79f2-4f0c-7ac3-08dba7d769e6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7836 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230828_075950_401036_23A2AFE7 X-CRM114-Status: GOOD ( 10.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org ECC feature added to Tx and Rx FIFOs for Xilinx AXI CAN Controller. Part of this feature configuration and counter registers added in IP for 1bit/2bit ECC errors. xlnx,has-ecc is optional property and added to Xilinx AXI CAN Controller node if ECC block enabled in the HW Signed-off-by: Srinivas Goud --- Changes in v3: Update commit description Changes in v2: None Documentation/devicetree/bindings/net/can/xilinx,can.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/can/xilinx,can.yaml b/Documentation/devicetree/bindings/net/can/xilinx,can.yaml index 64d57c3..c842610 100644 --- a/Documentation/devicetree/bindings/net/can/xilinx,can.yaml +++ b/Documentation/devicetree/bindings/net/can/xilinx,can.yaml @@ -49,6 +49,10 @@ properties: resets: maxItems: 1 + xlnx,has-ecc: + $ref: /schemas/types.yaml#/definitions/flag + description: CAN Tx and Rx fifo ECC enable flag (AXI CAN) + required: - compatible - reg @@ -137,6 +141,7 @@ examples: interrupts = ; tx-fifo-depth = <0x40>; rx-fifo-depth = <0x40>; + xlnx,has-ecc }; - | From patchwork Mon Aug 28 14:58:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Goud, Srinivas" X-Patchwork-Id: 13368066 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4DDD3C83F12 for ; Mon, 28 Aug 2023 15:00:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lk+ROtL2LPZRPvF32PNhPdDDqsW/ZXsvltZDiML2mjs=; b=O7qov3QNHa8Aby 3R7/B/+1Dy/qDEsL3jFr4vEf4fjFBVlCxhjuHBCiyYHq2HtzJafcPP+hq/RezmZU4nuuCgnlm2j4Q wBnwBt8+q3JjfeWDdl64+UjzZtKSlugenBYq/9zn9MtvCVyzvXLc1igdev/VIsxdi4hzAtRxjvAAo 0Sz/VkJ7GQUrNAtjcSwCTAPE/tieGRORzw4NNQ/12uVavqUC/ckj5zVaOmBguGFsAhQzD40RwaW+u 2vA/2vHiByjrSDy0w5UR0jEVAPilJOWn8LdfWspbtEI/147Eyo02d3Nw2VFlS6zxHSEbTpDs6jg+D l2dRK65o+dBhxUQN7kTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qadij-009kmb-2e; Mon, 28 Aug 2023 15:00:01 +0000 Received: from mail-bn1nam02on2061d.outbound.protection.outlook.com ([2a01:111:f400:7eb2::61d] helo=NAM02-BN1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qadid-009kkf-1y for linux-arm-kernel@lists.infradead.org; Mon, 28 Aug 2023 14:59:57 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AGgDYbP2jHsZSTVjv+mXU9F+9+G8cMnJUZVrR9NMF8Sb80WreYuMcUbZp23gBZBkEfJwLtF+PNFzxOcNOchVLyZartBsHUrjY+SgyhKsl7kpuAwYKsLcqAMW9/hqC90oorB/7wyy4n9P1oUOeCVjHHfH/RTpXJiBko6TNQ5NPqE8n6FgqfCluiNRTk3upe8VVmN1/8JpY7GIlnrXmOplBLhse1hZTLTrBHK1cEDEIqPSx/9p+o1pUkakETMRKS1tHZUyOXTwMk0P+exw3GXj/q6Z7SkhobC9KFlg9ePo2uVn4VREUGKXijSM/v/o0TCleATxgtt0AQSxCFXPwJTfFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=cg4JtQ9H7fOFLkHEXuEG35S8gN/ViMY+L1e/9zrjG+Q=; b=mzNepqnIHtgQhbS9XL6ZuEOpnAaqlwNGsFU51iBbi1uj1NI+WfZtQSW6q8wYesUZ4lFyECOAdNPWcUmE/iFanU7b0WTlNkjpxLEt1H9dtsbQAcGFS+62kNUuBh7xA1W/aI2FUX0Ee8euMGC0j0GGUA+Q0JH4qUQVdz8OvUvyN5sFIvmuC/i5hrt/WyB7Lpo+axedmPz1Gg63j/q5igP4MuJrjvXsapHEiVWOSz4nqydaIzG8N0JxuUnW+boQOfF0FnTTe5gls5UMgr2WAvXyjx1uVTihNjqx/NFAzyBlPbTEVPjHSPzZ/SkoMrE4NcyqOxqzIhAaoNjqTcKIwKJ5yg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=grandegger.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cg4JtQ9H7fOFLkHEXuEG35S8gN/ViMY+L1e/9zrjG+Q=; b=aNHUgKkMi6+5Q0kllfKXWOZtXmxtqpDVsKiY7tEG5YR8PcZo4SB30dvGww5mfzLs1zUl0gNpPZ3IHKzBpITJBWtRyYejjoAzK0CK4mQ78t64yBfGP1i9GoPIJFYmOS/9j7BkPudh4+vziba2BaKZC9uMDOUtU2heN6TmJ2xJZ4U= Received: from SA0PR13CA0020.namprd13.prod.outlook.com (2603:10b6:806:130::25) by SJ2PR12MB8651.namprd12.prod.outlook.com (2603:10b6:a03:541::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.27; Mon, 28 Aug 2023 14:59:45 +0000 Received: from SN1PEPF0002636B.namprd02.prod.outlook.com (2603:10b6:806:130:cafe::27) by SA0PR13CA0020.outlook.office365.com (2603:10b6:806:130::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.17 via Frontend Transport; Mon, 28 Aug 2023 14:59:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002636B.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.16 via Frontend Transport; Mon, 28 Aug 2023 14:59:45 +0000 Received: from SATLEXMB05.amd.com (10.181.40.146) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 28 Aug 2023 09:59:36 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 28 Aug 2023 09:59:30 -0500 Received: from xhdsgoud40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 28 Aug 2023 09:59:25 -0500 From: Srinivas Goud To: , , , , , , , , , CC: , , , , , , , , , "Srinivas Goud" Subject: [PATCH v3 2/3] can: xilinx_can: Add ECC support Date: Mon, 28 Aug 2023 20:28:44 +0530 Message-ID: <1693234725-3615719-3-git-send-email-srinivas.goud@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> References: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|SJ2PR12MB8651:EE_ X-MS-Office365-Filtering-Correlation-Id: 9cabce4a-a800-487a-f974-08dba7d76ae7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: o4cOedkUhyzVE7a+ebICpOtHpiFAEq++qADOvcY13mmD3trOwMHBS/ckO1gIsBb9So3jFZwXsoVo8VFSo2HFT8R5PofrPr/u1gthjKyoT3i/sy0EZeklkxZ4UgV8LZfzUQVFPVTz83YiqtQeelg4a+0lQwCtx6AXExVkj56s5ajeiVXSySBnsb7X59OA7uLKVyYFGqA/6bHnKQHfel3ohwoY6PDqTsadIVRUjMgQYIIzm8aJmobOItd12cKYi+M0SNGkKqZwZWmpCWfLEemC6CvIYft11bk5OKpjvDko+ktvHWnxNnUb4hyIxMoC3JQZr88JxtlONYkNF8ntcn0zFo8ouXK+40LK75j/ktWemGoz9I0Lqf2BmD8mtaZ9AWqB4lrKg+p4zwY/0AEVW40KPfmOwsC7YDL1WEZZg06Z6VFapTRtYPitBxDs0xdc6Fku0KzMQG+p3M6gaHfhd3Fd7ObKo6055Shv1VfW9msdH9skSCxKKhbxWs2gBwxVIP0azopDC4nOaNPpej/5PKPBfaWWTlxiBuekklId/6bAiUQqoAzQkIGVHXL+vyjpLsdglc8KXs4s4t3QdyN9FSvIsuT9pY9+FD5XRk2NAPM6YLJ5x3P4s5GV0Y5/VRo5hXI0r55g/rIe/eg9bvHNfq8okUnnT6VlV2gmAOquIoXpBB26RBJDO+1bRcGK+c0y0xNJFU9DSMTEJ9UE7p+TiyloOsPyY2qOaXXRhP7YTgkPAIPMMnlQj7EVqve4PSFl7onUiNd1JRS+KsClM5tQcbeipprCc9SkAjR9/ZX2vnsTxls= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(136003)(376002)(396003)(346002)(186009)(82310400011)(1800799009)(451199024)(46966006)(36840700001)(40470700004)(82740400003)(36756003)(81166007)(921005)(356005)(4326008)(8676002)(8936002)(54906003)(40460700003)(41300700001)(110136005)(316002)(6666004)(70206006)(70586007)(86362001)(478600001)(26005)(47076005)(40480700001)(336012)(36860700001)(44832011)(7416002)(83380400001)(2906002)(2616005)(5660300002)(426003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2023 14:59:45.5826 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9cabce4a-a800-487a-f974-08dba7d76ae7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8651 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230828_075955_772611_CE9D9AE5 X-CRM114-Status: GOOD ( 18.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add ECC support for Xilinx CAN Controller, so this driver reports 1bit/2bit ECC errors for FIFO's based on ECC error interrupt. ECC feature for Xilinx CAN Controller selected through 'xlnx,has-ecc' DT property Signed-off-by: Srinivas Goud --- Changes in v3: None Changes in v2: Address review comments drivers/net/can/xilinx_can.c | 129 ++++++++++++++++++++++++++++++++++++++----- 1 file changed, 114 insertions(+), 15 deletions(-) diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index abe58f1..798b32b 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c @@ -53,18 +53,23 @@ enum xcan_reg { XCAN_AFR_OFFSET = 0x60, /* Acceptance Filter */ /* only on CAN FD cores */ - XCAN_F_BRPR_OFFSET = 0x088, /* Data Phase Baud Rate - * Prescaler - */ - XCAN_F_BTR_OFFSET = 0x08C, /* Data Phase Bit Timing */ - XCAN_TRR_OFFSET = 0x0090, /* TX Buffer Ready Request */ - XCAN_AFR_EXT_OFFSET = 0x00E0, /* Acceptance Filter */ - XCAN_FSR_OFFSET = 0x00E8, /* RX FIFO Status */ - XCAN_TXMSG_BASE_OFFSET = 0x0100, /* TX Message Space */ + XCAN_F_BRPR_OFFSET = 0x88, /* Data Phase Baud Rate Prescaler */ + XCAN_F_BTR_OFFSET = 0x8C, /* Data Phase Bit Timing */ + XCAN_TRR_OFFSET = 0x90, /* TX Buffer Ready Request */ + + /* only on AXI CAN cores */ + XCAN_ECC_CFG_OFFSET = 0xC8, /* ECC Configuration */ + XCAN_TXTLFIFO_ECC_OFFSET = 0xCC, /* TXTL FIFO ECC error counter */ + XCAN_TXOLFIFO_ECC_OFFSET = 0xD0, /* TXOL FIFO ECC error counter */ + XCAN_RXFIFO_ECC_OFFSET = 0xD4, /* RX FIFO ECC error counter */ + + XCAN_AFR_EXT_OFFSET = 0xE0, /* Acceptance Filter */ + XCAN_FSR_OFFSET = 0xE8, /* RX FIFO Status */ + XCAN_TXMSG_BASE_OFFSET = 0x100, /* TX Message Space */ + XCAN_AFR_2_MASK_OFFSET = 0xA00, /* Acceptance Filter MASK */ + XCAN_AFR_2_ID_OFFSET = 0xA04, /* Acceptance Filter ID */ XCAN_RXMSG_BASE_OFFSET = 0x1100, /* RX Message Space */ XCAN_RXMSG_2_BASE_OFFSET = 0x2100, /* RX Message Space */ - XCAN_AFR_2_MASK_OFFSET = 0x0A00, /* Acceptance Filter MASK */ - XCAN_AFR_2_ID_OFFSET = 0x0A04, /* Acceptance Filter ID */ }; #define XCAN_FRAME_ID_OFFSET(frame_base) ((frame_base) + 0x00) @@ -124,6 +129,12 @@ enum xcan_reg { #define XCAN_IXR_TXFLL_MASK 0x00000004 /* Tx FIFO Full intr */ #define XCAN_IXR_TXOK_MASK 0x00000002 /* TX successful intr */ #define XCAN_IXR_ARBLST_MASK 0x00000001 /* Arbitration lost intr */ +#define XCAN_IXR_E2BERX_MASK BIT(23) /* RX FIFO two bit ECC error */ +#define XCAN_IXR_E1BERX_MASK BIT(22) /* RX FIFO one bit ECC error */ +#define XCAN_IXR_E2BETXOL_MASK BIT(21) /* TXOL FIFO two bit ECC error */ +#define XCAN_IXR_E1BETXOL_MASK BIT(20) /* TXOL FIFO One bit ECC error */ +#define XCAN_IXR_E2BETXTL_MASK BIT(19) /* TXTL FIFO Two bit ECC error */ +#define XCAN_IXR_E1BETXTL_MASK BIT(18) /* TXTL FIFO One bit ECC error */ #define XCAN_IDR_ID1_MASK 0xFFE00000 /* Standard msg identifier */ #define XCAN_IDR_SRR_MASK 0x00100000 /* Substitute remote TXreq */ #define XCAN_IDR_IDE_MASK 0x00080000 /* Identifier extension */ @@ -137,6 +148,11 @@ enum xcan_reg { #define XCAN_2_FSR_RI_MASK 0x0000003F /* RX Read Index */ #define XCAN_DLCR_EDL_MASK 0x08000000 /* EDL Mask in DLC */ #define XCAN_DLCR_BRS_MASK 0x04000000 /* BRS Mask in DLC */ +#define XCAN_ECC_CFG_REECRX_MASK BIT(2) /* Reset RX FIFO ECC error counters */ +#define XCAN_ECC_CFG_REECTXOL_MASK BIT(1) /* Reset TXOL FIFO ECC error counters */ +#define XCAN_ECC_CFG_REECTXTL_MASK BIT(0) /* Reset TXTL FIFO ECC error counters */ +#define XCAN_ECC_1BIT_CNT_MASK GENMASK(15, 0) /* FIFO ECC 1bit count mask */ +#define XCAN_ECC_2BIT_CNT_MASK GENMASK(31, 16) /* FIFO ECC 2bit count mask */ /* CAN register bit shift - XCAN___SHIFT */ #define XCAN_BRPR_TDC_ENABLE BIT(16) /* Transmitter Delay Compensation (TDC) Enable */ @@ -202,6 +218,13 @@ struct xcan_devtype_data { * @devtype: Device type specific constants * @transceiver: Optional pointer to associated CAN transceiver * @rstc: Pointer to reset control + * @ecc_enable: ECC enable flag + * @ecc_2bit_rxfifo_cnt: RXFIFO 2bit ECC count + * @ecc_1bit_rxfifo_cnt: RXFIFO 1bit ECC count + * @ecc_2bit_txolfifo_cnt: TXOLFIFO 2bit ECC count + * @ecc_1bit_txolfifo_cnt: TXOLFIFO 1bit ECC count + * @ecc_2bit_txtlfifo_cnt: TXTLFIFO 2bit ECC count + * @ecc_1bit_txtlfifo_cnt: TXTLFIFO 1bit ECC count */ struct xcan_priv { struct can_priv can; @@ -221,6 +244,13 @@ struct xcan_priv { struct xcan_devtype_data devtype; struct phy *transceiver; struct reset_control *rstc; + bool ecc_enable; + u64 ecc_2bit_rxfifo_cnt; + u64 ecc_1bit_rxfifo_cnt; + u64 ecc_2bit_txolfifo_cnt; + u64 ecc_1bit_txolfifo_cnt; + u64 ecc_2bit_txtlfifo_cnt; + u64 ecc_1bit_txtlfifo_cnt; }; /* CAN Bittiming constants as per Xilinx CAN specs */ @@ -523,6 +553,11 @@ static int xcan_chip_start(struct net_device *ndev) XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK | XCAN_IXR_ARBLST_MASK | xcan_rx_int_mask(priv); + if (priv->ecc_enable) + ier |= XCAN_IXR_E2BERX_MASK | XCAN_IXR_E1BERX_MASK | + XCAN_IXR_E2BETXOL_MASK | XCAN_IXR_E1BETXOL_MASK | + XCAN_IXR_E2BETXTL_MASK | XCAN_IXR_E1BETXTL_MASK; + if (priv->devtype.flags & XCAN_FLAG_RXMNF) ier |= XCAN_IXR_RXMNF_MASK; @@ -1127,6 +1162,58 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) priv->can.can_stats.bus_error++; } + if (priv->ecc_enable) { + u32 reg_ecc; + + reg_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET); + if (isr & XCAN_IXR_E2BERX_MASK) { + priv->ecc_2bit_rxfifo_cnt += + FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: RX FIFO 2bit ECC error count %lld\n", + __func__, priv->ecc_2bit_rxfifo_cnt); + } + if (isr & XCAN_IXR_E1BERX_MASK) { + priv->ecc_1bit_rxfifo_cnt += + FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: RX FIFO 1bit ECC error count %lld\n", + __func__, priv->ecc_1bit_rxfifo_cnt); + } + + reg_ecc = priv->read_reg(priv, XCAN_TXOLFIFO_ECC_OFFSET); + if (isr & XCAN_IXR_E2BETXOL_MASK) { + priv->ecc_2bit_txolfifo_cnt += + FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: TXOL FIFO 2bit ECC error count %lld\n", + __func__, priv->ecc_2bit_txolfifo_cnt); + } + if (isr & XCAN_IXR_E1BETXOL_MASK) { + priv->ecc_1bit_txolfifo_cnt += + FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: TXOL FIFO 1bit ECC error count %lld\n", + __func__, priv->ecc_1bit_txolfifo_cnt); + } + + reg_ecc = priv->read_reg(priv, XCAN_TXTLFIFO_ECC_OFFSET); + if (isr & XCAN_IXR_E2BETXTL_MASK) { + priv->ecc_2bit_txtlfifo_cnt += + FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: TXTL FIFO 2bit ECC error count %lld\n", + __func__, priv->ecc_2bit_txtlfifo_cnt); + } + if (isr & XCAN_IXR_E1BETXTL_MASK) { + priv->ecc_1bit_txtlfifo_cnt += + FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_ecc); + netdev_dbg(ndev, "%s: TXTL FIFO 1bit ECC error count %lld\n", + __func__, priv->ecc_1bit_txtlfifo_cnt); + } + + /* The counter reaches its maximum at 0xffff and does not overflow. + * Accept the small race window between reading and resetting ECC counters. + */ + priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK | + XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK); + } + if (cf.can_id) { struct can_frame *skb_cf; struct sk_buff *skb = alloc_can_err_skb(ndev, &skb_cf); @@ -1354,9 +1441,8 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id) { struct net_device *ndev = (struct net_device *)dev_id; struct xcan_priv *priv = netdev_priv(ndev); - u32 isr, ier; - u32 isr_errors; u32 rx_int_mask = xcan_rx_int_mask(priv); + u32 isr, ier, isr_errors, mask; /* Get the interrupt status from Xilinx CAN */ isr = priv->read_reg(priv, XCAN_ISR_OFFSET); @@ -1374,10 +1460,17 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id) if (isr & XCAN_IXR_TXOK_MASK) xcan_tx_interrupt(ndev, isr); + mask = XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK | + XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK | + XCAN_IXR_RXMNF_MASK; + + if (priv->ecc_enable) + mask |= XCAN_IXR_E2BERX_MASK | XCAN_IXR_E1BERX_MASK | + XCAN_IXR_E2BETXOL_MASK | XCAN_IXR_E1BETXOL_MASK | + XCAN_IXR_E2BETXTL_MASK | XCAN_IXR_E1BETXTL_MASK; + /* Check for the type of error interrupt and Processing it */ - isr_errors = isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK | - XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK | - XCAN_IXR_RXMNF_MASK); + isr_errors = isr & mask; if (isr_errors) { priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors); xcan_err_interrupt(ndev, isr); @@ -1796,6 +1889,7 @@ static int xcan_probe(struct platform_device *pdev) return -ENOMEM; priv = netdev_priv(ndev); + priv->ecc_enable = of_property_read_bool(pdev->dev.of_node, "xlnx,has-ecc"); priv->dev = &pdev->dev; priv->can.bittiming_const = devtype->bittiming_const; priv->can.do_set_mode = xcan_do_set_mode; @@ -1912,6 +2006,11 @@ static int xcan_probe(struct platform_device *pdev) priv->reg_base, ndev->irq, priv->can.clock.freq, hw_tx_max, priv->tx_max); + if (priv->ecc_enable) { + /* Reset FIFO ECC counters */ + priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK | + XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK); + } return 0; err_disableclks: From patchwork Mon Aug 28 14:58:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Goud, Srinivas" X-Patchwork-Id: 13368065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4AD33C83F15 for ; Mon, 28 Aug 2023 15:00:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KQZcAXD2afarqMQmsw1s46DgaXJQiLXUY9AXM3OVDoo=; b=0q84+43SBcjZfo ho2TGd+25Ept9FeJYeZz9PgPp7xcZ6wzWZrOr4onPwrGD4sKvi0VLwW0tKPrzqQWpV9oym0BCmOwK 1/YCYg1lGQ3lCKdMyNAcruikV3h6vf81Pvf04ER3LPYqRUBdZasGuk5eJ+ST109ACJoPL8QLnExZU Xfepj2JPqKPnyCfD1aEoYhxeKwtHOVOfxXZOiJCWV5v23uzDbmtxVUG2AFkKVNHOEesFnTHTkHxIO xtjUC3jr9ham9Xcg9o0nwegHi2TWGoKgsItYfUOIuLOw2Q5F0TLWX/t3XAWbZBC5lo9guLCQfTHiK s2tSJuEYkoqI95gw5iLw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qadij-009km2-0e; Mon, 28 Aug 2023 15:00:01 +0000 Received: from mail-bn8nam11on20600.outbound.protection.outlook.com ([2a01:111:f400:7eae::600] helo=NAM11-BN8-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qadiY-009kiu-2y for linux-arm-kernel@lists.infradead.org; Mon, 28 Aug 2023 14:59:52 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=gtNLGZKlQMjoFqCUU8Sqebz00NHliHKy8i9wVKqklDkCO4vtIXqHJ0JoAM7+Gr/ly+Axp6vXGrIP9W2+FTnJMouYqnDbyFXRQXdkBobCyalGnV14K3LtqyaJaDYw2j59lQFiW3OIpvZlCp4tf8NIKGVWZU5bMKUIjML9TqgyEFg34YhlloIHhIxcVR1T4+/mg6d4svyQlFW0iKXRQ4By62JrVnjDMDamK4oRbiVIhKOEUsmzlnfxQdVu6IPawddPXeGgrxJO+OXBOMZwvW/ydn7RaaIku2xovqdkwv3AGm/1Clx0pFRERhaAZd1CI7VWwHP1b9W5OEOEYoaTwXSmpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=YBugEgpNHH5ptwZZ2ho/bpfMJLxu0ihTRy/HgnxvITg=; b=Ykq1aJ+PG7jeSUuQrDiT1uGoPLaBxWSrIMmznRGcXgo4yHcU1QO62q02GKtlzMFquuopX391UfFxiyMBk654WYyrv5DBg8Nrt5Z6xW3bWM5rGgVbqSmHR6zliLfpnivXJNHtfdG2ryD20n5P5mKVTM7j6Szzrce7eCTluqP2sqYtBDr42e3Tkar1UkvmABqy5/QJtEM7JRYwztGA5n1kNG85slJpzxxlsr1UkBrX8siUuOnF/gEqgwOCxJfpjYWtMbIzZY/sjUg20JHGLOng6+pOBxCGdKfuXPTuP1HhVbOvq+JPuB8FNss9u0g8KlueWNfI5Wf4tgm27fR7lR8pHA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=grandegger.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YBugEgpNHH5ptwZZ2ho/bpfMJLxu0ihTRy/HgnxvITg=; b=O3OermqtpiZRcTjzmBRX8u3pX+vEfduh0fPbRVFcSsao7bahzzPKluhvyee6MsJRW4x8uPgnzXqL4l+3gNxhM5Kff5f4C8Ig2EPq2B7Sx+Qa7fDAju/2lD31zu2kv9/Z82TQAyvh02nrc5Fu/1+LMh8Sf0Eby996lYQj4PGO5jg= Received: from MW4PR04CA0117.namprd04.prod.outlook.com (2603:10b6:303:83::32) by CY8PR12MB7146.namprd12.prod.outlook.com (2603:10b6:930:5e::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.34; Mon, 28 Aug 2023 14:59:38 +0000 Received: from CO1PEPF000044F1.namprd05.prod.outlook.com (2603:10b6:303:83:cafe::df) by MW4PR04CA0117.outlook.office365.com (2603:10b6:303:83::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.35 via Frontend Transport; Mon, 28 Aug 2023 14:59:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by CO1PEPF000044F1.mail.protection.outlook.com (10.167.241.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.16 via Frontend Transport; Mon, 28 Aug 2023 14:59:38 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 28 Aug 2023 09:59:36 -0500 Received: from xhdsgoud40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 28 Aug 2023 09:59:31 -0500 From: Srinivas Goud To: , , , , , , , , , CC: , , , , , , , , , "Srinivas Goud" Subject: [PATCH v3 3/3] can: xilinx_can: Add ethtool stats interface for ECC errors Date: Mon, 28 Aug 2023 20:28:45 +0530 Message-ID: <1693234725-3615719-4-git-send-email-srinivas.goud@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> References: <1693234725-3615719-1-git-send-email-srinivas.goud@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F1:EE_|CY8PR12MB7146:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b33c171-3a23-4235-286d-08dba7d766a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: TkWQfWhKKCC4iGcw4RYigKuYEsOr8Pq+7XlKvpz0UhQFsofxhW3ojUiLbFsYjclALg31rVrjrgn0ZgTUk2v5jgmnIDfqqOceNxnuvGOTrWrDD2wskpU10JXBiEv3DkolIIZYHnDAdIfILR2fvaoxHqq6oDCdW+c9ejiDsTdY1WFAodE8k9H6paAf2WW2AwPBIXmKhm8eIy0rDEJXfR6sLwn8P7HY4lb3citK2kunz3gMkBUGeCDixPlIjA0VwTJ5XuPeKB7A47q/QVaq9dKMgKy6fGVV5eoWu6rJKhHWgT6Dq9J15toJjIZSM3ofEmzGflhD1pnV/NwXp+TDEJiwnB0cCumeYec77ba63dpxTwe3ZCgv3Z2ryxrloxWu+mCaGyiuIOr2hdwVF5crakHtAk7gSV+XGvLShBVzfobwN5q0XKF9u8gbmsbQeta6f0YFPUSYHzdiD1H41Tb/9PO7yanWbIpckdGl1hmchUPsbtwrpRT8UUMcbiavQc/LeJJG0J6pd7LbFmAjQYPuuM25XILiv1fWFpaylBDq6S7NxZhZjE2y9tt2gXr2dLvEVkxGry4rrgYYp2cuBQiSSHQ8kgGzuIyj014ksJHYqouY+hFRpnQKo1ucAjsByHRB3hqqbb1rpWGIfZuBFh90d8D73LsBu5BA27SjavBd4b/geNsbjq/gbHqUtvJPXHQc21LquxXqB/MR9aG8fmc6AK+NtPujbiUUq295tUHpINZOH9lY7ocLeR9S0EeGBxiSmaJKI9VOYgNZ6S7tcDUgXLwk0NJhWwKvTHTcd6yRj+UIuBI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(396003)(136003)(39860400002)(376002)(451199024)(1800799009)(82310400011)(186009)(36840700001)(40470700004)(46966006)(83380400001)(921005)(81166007)(356005)(478600001)(82740400003)(336012)(426003)(36860700001)(47076005)(26005)(2616005)(40480700001)(6666004)(86362001)(5660300002)(2906002)(8936002)(54906003)(7416002)(316002)(70586007)(8676002)(4326008)(41300700001)(36756003)(110136005)(70206006)(40460700003)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2023 14:59:38.3426 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b33c171-3a23-4235-286d-08dba7d766a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7146 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230828_075950_957855_B6D4C50C X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add ethtool stats interface for reading FIFO 1bit/2bit ECC errors information. Signed-off-by: Srinivas Goud --- Changes in v3: None Changes in v2: Add ethtool stats interface drivers/net/can/xilinx_can.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index 798b32b..50e0c9d 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c @@ -219,6 +219,7 @@ struct xcan_devtype_data { * @transceiver: Optional pointer to associated CAN transceiver * @rstc: Pointer to reset control * @ecc_enable: ECC enable flag + * @stats_lock: Lock for synchronizing hardware stats * @ecc_2bit_rxfifo_cnt: RXFIFO 2bit ECC count * @ecc_1bit_rxfifo_cnt: RXFIFO 1bit ECC count * @ecc_2bit_txolfifo_cnt: TXOLFIFO 2bit ECC count @@ -245,6 +246,7 @@ struct xcan_priv { struct phy *transceiver; struct reset_control *rstc; bool ecc_enable; + spinlock_t stats_lock; /* Lock for synchronizing hardware stats */ u64 ecc_2bit_rxfifo_cnt; u64 ecc_1bit_rxfifo_cnt; u64 ecc_2bit_txolfifo_cnt; @@ -1164,6 +1166,9 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) if (priv->ecc_enable) { u32 reg_ecc; + unsigned long flags; + + spin_lock_irqsave(&priv->stats_lock, flags); reg_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET); if (isr & XCAN_IXR_E2BERX_MASK) { @@ -1212,6 +1217,8 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) */ priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK | XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK); + + spin_unlock_irqrestore(&priv->stats_lock, flags); } if (cf.can_id) { @@ -1639,6 +1646,23 @@ static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv) return 0; } +static void ethtool_get_ethtool_stats(struct net_device *ndev, + struct ethtool_stats *stats, u64 *data) +{ + struct xcan_priv *priv = netdev_priv(ndev); + unsigned long flags; + int i = 0; + + spin_lock_irqsave(&priv->stats_lock, flags); + data[i++] = priv->ecc_2bit_rxfifo_cnt; + data[i++] = priv->ecc_1bit_rxfifo_cnt; + data[i++] = priv->ecc_2bit_txolfifo_cnt; + data[i++] = priv->ecc_1bit_txolfifo_cnt; + data[i++] = priv->ecc_2bit_txtlfifo_cnt; + data[i++] = priv->ecc_1bit_txtlfifo_cnt; + spin_unlock_irqrestore(&priv->stats_lock, flags); +} + static const struct net_device_ops xcan_netdev_ops = { .ndo_open = xcan_open, .ndo_stop = xcan_close, @@ -1648,6 +1672,7 @@ static const struct net_device_ops xcan_netdev_ops = { static const struct ethtool_ops xcan_ethtool_ops = { .get_ts_info = ethtool_op_get_ts_info, + .get_ethtool_stats = ethtool_get_ethtool_stats, }; /**