From patchwork Thu Aug 31 15:20:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AD23C83F2E for ; Thu, 31 Aug 2023 15:21:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241935AbjHaPVP (ORCPT ); Thu, 31 Aug 2023 11:21:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbjHaPVO (ORCPT ); Thu, 31 Aug 2023 11:21:14 -0400 Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2050.outbound.protection.outlook.com [40.107.102.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48E8FE5A; Thu, 31 Aug 2023 08:21:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Rt2gjxQiAXkR+hO6D6XTzgy/jVGq/HFDi3SnN+oixWH8FGBu38OStd89ME0lyajHzUB+mzCeJKFP55fLU9A+6IhF9LMyfRIxySCwgkuGYlDOYYpwWo9vVHwp9YWG3XJ8ksIVVAk0G/Zzb1dGlwHnbigJ4ZHTyKgVglGXkLwKdmWR2ar6wh297hXWEvsFrY0WBnWw1X7hB/R9uEK94O+THNLlYkZn4vaSIsArEjqgPzL6GVOnk7imf22WfrXYzWRfN2tR6ZfvedX7BZdG/siKgeQcDC7rJXT8wN2Vw22xiTT80P1qEvTBJmrEMJZxRSgVHYOmuD2ZV0/VdMVmrM/mSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OTWRHP2iB0XC+TH6ARURdFg69DtSOwvDtm+z57QfZdE=; b=Ipsqzp1d/T9hSpn90h/HTKR2WEyEfWSipNI6nD0OeJCNIhcQHvDOGG6Qkj0lj2rRnzFgMD6b4OzWrSnrhYF2Aand31KOi5prSeq5tiAPTOnsCsRe02RFOivmuZbfr36UbWmvjzYT/iwVsJMlcY3pFr4adk+IGzg/bBVlcgJNPFwZG3vpFLiJDXTqQgCIGU7jjX1MNqliVuNaRCVgrm3z6uoolXgoS3Cg631V876+Luev2NcY9vJ8XpWPw1V/of/TuJOGW0VfwTK6avuAe6svT4TMmGfxRHTFKUEgh52BmO0XkxOxj/eklaNE4xT/rVxNSo/pzRF7FHexgDwO7F/Drg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OTWRHP2iB0XC+TH6ARURdFg69DtSOwvDtm+z57QfZdE=; b=rUGGdCpTUV0FmBVjP67UcmtBmdP0P4oRmW6HSeR2QLaHGxRlwd8Bc9lHkRGZoMlFDmF8x32+dW7kqOXBXj7RJVLrEJT3lxsqxCPyaS65xfaoUvV/C9kn3iVfaYQqnt+aXROw/X9+bTpibMhap6NaJWt6nQHcw+FiIpodFCovI2k= Received: from MW3PR05CA0028.namprd05.prod.outlook.com (2603:10b6:303:2b::33) by CYYPR12MB8937.namprd12.prod.outlook.com (2603:10b6:930:cb::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22; Thu, 31 Aug 2023 15:21:08 +0000 Received: from MWH0EPF000989E7.namprd02.prod.outlook.com (2603:10b6:303:2b:cafe::8c) by MW3PR05CA0028.outlook.office365.com (2603:10b6:303:2b::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.12 via Frontend Transport; Thu, 31 Aug 2023 15:21:08 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E7.mail.protection.outlook.com (10.167.241.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:21:08 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:21:07 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 01/15] cxl/port: Pre-initialize component register mappings Date: Thu, 31 Aug 2023 10:20:17 -0500 Message-ID: <20230831152031.184295-2-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E7:EE_|CYYPR12MB8937:EE_ X-MS-Office365-Filtering-Correlation-Id: a31628c0-079a-4086-f204-08dbaa35e6d4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GiI9kYnQJfkKwGY6DwJuilh7RNnIfbVa3QAK5pkbVK0Wv04OotqxsTpJgVbBEw9BwBkRdSFdr2RS73ryV4D0OSZ/B4mjGpiux3jeC/FLu6tLRRYoEYWd2x0ILwT0vhdVvGDWnV6Fc+FWDQ46FSXWxzzTOnM4U69uASXaSDZldZgo6kcZf+nWcgNhJdIAVm7b9hRAhDn+JR6Inv37by5uVVx9KWHs85RVVdglUez7YoSwPcY3gHWnlLOl5/fxotGR7VRuvGpc6VkMPY/Ypf6BBzDdDCc1v1gP/eXQf1BMb3h0teTA7rwsPJCZ+G8WB1E3h0HqnUEDoOtpaS4Km039T03odmTrxgGKo+CwlredcmJuSVskkYCJ7szruIKJIxR/FM2pts9dzVUq/mILqR6oG73unKSXlZQI3HDO7fnNcg0QSeTi/EMkde5rZovdWW1GP3aWLGiBPMe2+uAZlWgvO5PNQ/B9hnp7CKKKw7olw9xMNXVrd1Ugz439h7bBtVaiLKy2LmrVeWYrf5/UM7oPJ6iiYhFCGkchlX3Mg2ryQIqnXVTrX/Imrm78TmCfgdKJbuGNWe2RNLZsG8RXevkr1t2lW+Tr+nxNgyv1V1PTbivDjqqayhy3JCufN6maLxSgkn7Ci6lyL33q5+xVl7FabiQM9hrL+b88wBXzi5ibWy/Yjy6uJbpcrBVo+7hD+GMGRl40//PLG8XikF4YrhAyssG6tPaQ9V0vvV2r3DmkQ2jBloO98tTQBXE8ihqnBmJrFG/AkNoj2XJEs8oBrAVXig== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(136003)(376002)(346002)(451199024)(1800799009)(82310400011)(186009)(46966006)(36840700001)(40470700004)(6666004)(2906002)(5660300002)(86362001)(316002)(478600001)(7416002)(2616005)(4326008)(47076005)(8676002)(7696005)(36860700001)(44832011)(8936002)(40460700003)(26005)(1076003)(82740400003)(40480700001)(41300700001)(336012)(426003)(36756003)(356005)(83380400001)(81166007)(54906003)(70206006)(70586007)(110136005)(16526019)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:21:08.4354 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a31628c0-079a-4086-f204-08dbaa35e6d4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E7.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8937 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter The component registers of a component may not exist and cxl_setup_comp_regs() will fail for that reason. In another case, Software may not use and set those registers up. cxl_setup_comp_regs() is then called with a base address of CXL_RESOURCE_NONE. Both are valid cases, but the function returns without initializing the register map. Now, a missing component register block is not necessarily a reason to fail (feature is optional or its existence checked later). Change cxl_setup_comp_regs() to also use components with the component register block missing. Thus, always initialize struct cxl_register_map with valid values, set @dev and make @resource CXL_RESOURCE_NONE. The change is in preparation of follow-on patches. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron --- drivers/cxl/core/port.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 724be8448eb4..6c06c36f8c7b 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -693,16 +693,18 @@ static struct cxl_port *cxl_port_alloc(struct device *uport_dev, static int cxl_setup_comp_regs(struct device *dev, struct cxl_register_map *map, resource_size_t component_reg_phys) { - if (component_reg_phys == CXL_RESOURCE_NONE) - return 0; - *map = (struct cxl_register_map) { .dev = dev, - .reg_type = CXL_REGLOC_RBI_COMPONENT, + .reg_type = CXL_REGLOC_RBI_EMPTY, .resource = component_reg_phys, - .max_size = CXL_COMPONENT_REG_BLOCK_SIZE, }; + if (component_reg_phys == CXL_RESOURCE_NONE) + return 0; + + map->reg_type = CXL_REGLOC_RBI_COMPONENT; + map->max_size = CXL_COMPONENT_REG_BLOCK_SIZE; + return cxl_setup_regs(map); } From patchwork Thu Aug 31 15:20:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A4B5C83F2E for ; Thu, 31 Aug 2023 15:21:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229891AbjHaPVa (ORCPT ); Thu, 31 Aug 2023 11:21:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343815AbjHaPV3 (ORCPT ); Thu, 31 Aug 2023 11:21:29 -0400 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2086.outbound.protection.outlook.com [40.107.223.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F402E5E; Thu, 31 Aug 2023 08:21:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=SSb+bYWtlmXyOHKCDW0yxw+SoP6d8QZYpK0YaRj0vWTwNATm+0tjLdoe6YYxTamw2XD5ieSxBp266imvmLggWNK8qWYQWIk/Ga+2xzo2SqCKRyHTJWyqXQL04l+gztOfE/DRTu/mYrgfJFZ87DpeuJ0IbXhTwl00AlP+Vou5ZqFMgSIGjUGhI/VlhKPaigF+Ll87n3cN+Jxy2R2aVo7ZeAlSsvYNpmowlsapSLs9m3Yn0AUG4dLQBjWD7P9JF4QYQPAkV7POpLB2kLBC93mRRcQ1Z3GyLNfe5y1x4AofRSlfEajLgw5edxL4uV1QWYkD0MFkKNn7WSJP/beYQhbLVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=1/+V7T4VGjo9read9sx1AAetl+wqpt56YUt+A9HeeTo=; b=PKSZ8K2v+bO35gymoNz8cvLlscD88Fi7vQAFvdvROU//KEnt7DhpvVumYzhsZex/K1Hcc6S7cRs5OI/ha5q+MuStw/hV/w5S8YUGCCNtJr5W/RX9dgTF/2G5nWdgeT/DQ8VaeUJ3ankPb2nATq0b+UUWvClS0ldVIkf9tM+JHlVCmbOF7CjTZOhpRLTmdiebKHMt4UZfq9O9O/r5QrD9R0KhkQMzJ066vcIPpaRRm9Lx7ZzDOPz9cEz5UvZ1cDZLsgC9SKCBdvG3daqBRs7Kl5/TCPYIxjy1eo11F5Lfbxz0pCplKh9DmT0eI961WBnQklv+sOnXCLdE/OqycEXNzA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1/+V7T4VGjo9read9sx1AAetl+wqpt56YUt+A9HeeTo=; b=rMp7Q1K2vWJ6tSkzcUlTQLPwYECwXFDpu5ib7p0dgkECJMORjwicacmkgT79QbK+j/5ezZc+L3OgoZcl/gRivnM1jbBevnTTTAcWU2slEbl9GmCuZjaqyxmqrGfxWj7G5n7sPo3O7KVpPBOPDXSdSYJRE/h+OesW5xXKP3bi21Q= Received: from MW4P220CA0009.NAMP220.PROD.OUTLOOK.COM (2603:10b6:303:115::14) by CY5PR12MB6527.namprd12.prod.outlook.com (2603:10b6:930:30::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.35; Thu, 31 Aug 2023 15:21:20 +0000 Received: from MWH0EPF000989EB.namprd02.prod.outlook.com (2603:10b6:303:115:cafe::1) by MW4P220CA0009.outlook.office365.com (2603:10b6:303:115::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.23 via Frontend Transport; Thu, 31 Aug 2023 15:21:20 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989EB.mail.protection.outlook.com (10.167.241.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:21:19 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:21:18 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 02/15] cxl/regs: Prepare for multiple users of register mappings Date: Thu, 31 Aug 2023 10:20:18 -0500 Message-ID: <20230831152031.184295-3-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EB:EE_|CY5PR12MB6527:EE_ X-MS-Office365-Filtering-Correlation-Id: 6710e362-4a23-456b-8d14-08dbaa35ed90 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hKg3yDdQcP1wUx8I3PWvOtF6MlDd4EsAjKV1p2ai5464la2Wva7qwMJo+vTU9luUzxO5C9ulIowa+KWGAFPL8eI5pDlBcBeW1QXYhtc+SpHQfaik07SD059mMNkwZO24fN3QmDWXs2UkgDl5bBNfl183FB0QqQBoRboBCPxjXx4LkACCow4up+6HylWoCVpVKdTDajhd+baGqB5GF1ndaltCBOvEgbyWlG8gxvhC0srnPM5I19l4PPUSopctnl2RO9szAwvuat4KJLDli6/Ab3wPrPilQW2uy1YyQVVf32AvhiCF5dkhWqsv1Z63FftszDg21nh57mjGTzM8naq5XyCX1HNY5qewlMIa0I/Qf0tZUDRJDuGH/caks8IQGWjMzDyAZZXQnwmE4A8LFa9NjT4xJM22AtmfHXuBjEnNmnl7fmyegW/GjFr3ttnRh+TxNb1LWSfvElQM2fDB+Mf6UIPqt++QMMqu3y6m+xo7CGnXOdF/AtLWBUYt4MVxDZq02zqo8yxp24NX7GDoe2JyOMAosP+Mdw1lqFF8Y2tSfMWe15fE5dRvY+ejBQYILS0OaI8URRZwGa0zebKbi1UVt/FYFfQEDFIAtmyXHjO5uUGSG+8R3KA1Ww44MZzaHi0TABO2zCI/+xr4f1uqi94lS+B4BmKhxDIX/1RMN54yxNP5KeBRXtrEI/WgYZaEMT4tEF3Na4gJePVA6y+2MwJcljXSCKOPOHaKMcnkF/8eShyQR9LW4+pQZD1EASftbR05IaT5DKnp+5jnWGQl2te4nA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(346002)(136003)(376002)(39860400002)(1800799009)(186009)(82310400011)(451199024)(46966006)(36840700001)(40470700004)(81166007)(356005)(82740400003)(8936002)(70206006)(478600001)(110136005)(70586007)(7696005)(54906003)(316002)(41300700001)(40460700003)(16526019)(44832011)(1076003)(26005)(83380400001)(5660300002)(36756003)(2616005)(2906002)(86362001)(47076005)(8676002)(36860700001)(40480700001)(426003)(336012)(4326008)(7416002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:21:19.7156 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6710e362-4a23-456b-8d14-08dbaa35ed90 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6527 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter The function devm_cxl_iomap_block() is used to map register mappings of CXL component or device registers. A @dev is used to unmap the IO regions during device removal. Now, there are multiple devices using the register mappings. E.g. the RAS cap of the Component Registers is used by cxl_pci, the HDM cap used in cxl_mem. This could cause IO blocks not being freed and a subsequent reinitialization to fail if the same device is used for both. To prevent that, expand cxl_map_component_regs() to pass a @dev to be used with devm to IO unmap. This allows to pass the device that actually is creating and using the IO region. For symmetry also change the function i/f of cxl_map_device_regs(). Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron --- drivers/cxl/core/hdm.c | 3 ++- drivers/cxl/core/regs.c | 4 ++-- drivers/cxl/cxl.h | 2 ++ drivers/cxl/pci.c | 4 ++-- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 4449b34a80cc..17c8ba8c75e0 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -98,7 +98,8 @@ static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb, return -ENODEV; } - return cxl_map_component_regs(&map, regs, BIT(CXL_CM_CAP_CAP_ID_HDM)); + return cxl_map_component_regs(&map, &port->dev, regs, + BIT(CXL_CM_CAP_CAP_ID_HDM)); } static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index 6281127b3e9d..dfc3e272e7d8 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -201,10 +201,10 @@ void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr, } int cxl_map_component_regs(const struct cxl_register_map *map, + struct device *dev, struct cxl_component_regs *regs, unsigned long map_mask) { - struct device *dev = map->dev; struct mapinfo { const struct cxl_reg_map *rmap; void __iomem **addr; @@ -235,9 +235,9 @@ int cxl_map_component_regs(const struct cxl_register_map *map, EXPORT_SYMBOL_NS_GPL(cxl_map_component_regs, CXL); int cxl_map_device_regs(const struct cxl_register_map *map, + struct device *dev, struct cxl_device_regs *regs) { - struct device *dev = map->dev; resource_size_t phys_addr = map->resource; struct mapinfo { const struct cxl_reg_map *rmap; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 76d92561af29..ec8ba9ebcf64 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -274,9 +274,11 @@ void cxl_probe_component_regs(struct device *dev, void __iomem *base, void cxl_probe_device_regs(struct device *dev, void __iomem *base, struct cxl_device_reg_map *map); int cxl_map_component_regs(const struct cxl_register_map *map, + struct device *dev, struct cxl_component_regs *regs, unsigned long map_mask); int cxl_map_device_regs(const struct cxl_register_map *map, + struct device *dev, struct cxl_device_regs *regs); int cxl_map_pmu_regs(struct pci_dev *pdev, struct cxl_pmu_regs *regs, struct cxl_register_map *map); diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 48f88d96029d..88ddcff8a0b2 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -827,7 +827,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (rc) return rc; - rc = cxl_map_device_regs(&map, &cxlds->regs.device_regs); + rc = cxl_map_device_regs(&map, cxlds->dev, &cxlds->regs.device_regs); if (rc) return rc; @@ -844,7 +844,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) cxlds->component_reg_phys = map.resource; - rc = cxl_map_component_regs(&map, &cxlds->regs.component, + rc = cxl_map_component_regs(&map, cxlds->dev, &cxlds->regs.component, BIT(CXL_CM_CAP_CAP_ID_RAS)); if (rc) dev_dbg(&pdev->dev, "Failed to map RAS capability.\n"); From patchwork Thu Aug 31 15:20:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0EE9C83F2E for ; Thu, 31 Aug 2023 15:21:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346531AbjHaPVr (ORCPT ); Thu, 31 Aug 2023 11:21:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236874AbjHaPVq (ORCPT ); Thu, 31 Aug 2023 11:21:46 -0400 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2074.outbound.protection.outlook.com [40.107.94.74]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B657410C0; Thu, 31 Aug 2023 08:21:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=aVyXXiL3p3uVT12sRbl2pIP1moZ/Ul/d8uG24QqwE9LQRCFTkpQejzUmSyNsJ3HgUjhk/FRnyOJYcEWcT5W/NVu0TAg3pQhtZTAg4MKgYuZ49/hZ+rP6nWUlyYDHicG0JSgJ7x0KwbJRAswJDfmiGygKc21UClXym8QMeeznhAG5w944YhwLODHQSy4BE+YcJo77zvsFoaSpEadtz4LaAvnKDqYWOijJni56FQWHIMbt97p7FkanZRcrC2B5BPfxGms4sUawWUnsb/snioEQmx/qnyw27bevE2ZcbLPAaxKlRCFi51h8DFJ08yLsbOPCmTh08BZnzR4kepa/j+Npug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=BKlpMDJDL9fWN792EBmuV7O/wcdDmYalrl04zaCbHe0=; b=myDcGJQA5uaMywE9EClV48rOIQBm/3YrvfSfAdHuDhKP64ajMIv1IA1qvun68GeTLBHi/NiExQW/fS2Ve11w7ManXzuTD2ie6sKDWx99qQoYhr3s+wG2GuN9JUYpC+8sz+xogZs/mpzDzhcwS4XE0mz2YjVe9m6ex005ntZ4hABtdkHOp/kisK4Hpw03xZ1v/aMjWc5IuMrJXNQTalChfmrU/cWdsiMfprKljySMYZ5kOqssYx8LyVfW5ltCQm8Cn1dPTL3AVDfu+znutzxRcnMV/iLg7Ar8I10BCjGJh9KeqjRaSrphWQP4YMw3+F1g5QRXmXQt0FmGxGQ9zg6mLw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=BKlpMDJDL9fWN792EBmuV7O/wcdDmYalrl04zaCbHe0=; b=fpwv1BdsRrZHSR5luhZAUpsq6GBS5VY19f4KGmFE/AUkX+AP/wdNrYoU+aYxZpqUI1FHajgSzFFvc7+VeasqHIJ5xu1FxX+qTcuJV/cHqggYKKr+y8R+lQLGP9IJ/mpm53G5k6bkdXH0fHNK3vFcTAhPv0y7ztNyAsllFsZHu/E= Received: from MW2PR16CA0010.namprd16.prod.outlook.com (2603:10b6:907::23) by DS0PR12MB8018.namprd12.prod.outlook.com (2603:10b6:8:149::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.21; Thu, 31 Aug 2023 15:21:30 +0000 Received: from MWH0EPF000989E9.namprd02.prod.outlook.com (2603:10b6:907:0:cafe::31) by MW2PR16CA0010.outlook.office365.com (2603:10b6:907::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.21 via Frontend Transport; Thu, 31 Aug 2023 15:21:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E9.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:21:30 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:21:29 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 03/15] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state Date: Thu, 31 Aug 2023 10:20:19 -0500 Message-ID: <20230831152031.184295-4-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E9:EE_|DS0PR12MB8018:EE_ X-MS-Office365-Filtering-Correlation-Id: 1bc8ffae-ea59-4405-ead0-08dbaa35f408 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: iQAAejFZcPOf+v9qLHfWMWgWF+RhUsCFjxdp0YWwneYt53RhTyDqyejkaF2cr8Qfbk/zOk5y1WtaJeCXchOr8g26CrpACdmgNz+ZdilVi2cn2KWHrMqC6Jb543ddncOjt4vCNDyPJ7PFfSRJVTrbAVWH2aDygVgVPMiIHFupplJBUo55C5uBXnbWfad1KXRUPKGmanmmy7CjvX2+NGczNyHF4RIFokTUx8ZvT12Oh+CTyZ6sEtZG/S59ycqDRH2BZ+H/c2ftuOwMkyPbQxuJhCYDE+rx0rDAbBE5X6f97ZV1XpzaoiGNsiyjir2uKxMLAZVaAapFroIRAMtmwU9b79AnYzRm1/iQQlwW6fzMxXHr/s4uNJoSsmOUVpsdGD6G0tv52QzjQzTtta1k9fP0wzC5+6xiTonjc/qZ8I9qV5EMenMoVQkcQ/DNgLDlTzoACKldpCWJkAzbBt4l08lrDZJTaGhZw8g80Q4p9L4XX5wmUGy44zjjOwadVADKVa55fv1jt/nAZioijU1YONz+TAjsVemTlhOLujjvnObgT1lAW2XJJcFzkMdkwx7UbfwXd6WvT9rt+cRmB1NaUk8cfaXhQwkpUJURkvLh8qLh0kb887t1Cvs5BvgPO4NTDF1JZCstxMXl0ZTw023gzSyPJrs16XZ66hnapzKnR2hNdWYSrPOcgH1JfeLHxompBgtK6m1vx+AKMPMWa6rtwlYUtrEbeP5vl1vEkWKlAQ57KZ8QGB/TRj9DDgwc96EOxULbNdVhAHMkzWQJwO2x+hYi3g== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(346002)(39860400002)(376002)(136003)(1800799009)(186009)(451199024)(82310400011)(40470700004)(36840700001)(46966006)(356005)(82740400003)(6666004)(7696005)(40460700003)(36756003)(36860700001)(86362001)(81166007)(40480700001)(47076005)(1076003)(2616005)(2906002)(426003)(336012)(16526019)(26005)(83380400001)(478600001)(110136005)(8936002)(70586007)(70206006)(8676002)(4326008)(5660300002)(7416002)(44832011)(41300700001)(54906003)(316002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:21:30.5708 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1bc8ffae-ea59-4405-ead0-08dbaa35f408 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8018 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter Same as for ports and dports, also store the endpoint's Component Register mappings, use struct cxl_dev_state for that. Keep the Component Register base address @component_reg_phys a bit to not break functionality. It will be removed after the transition in a later patch. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang --- drivers/cxl/core/mbox.c | 2 ++ drivers/cxl/cxlmem.h | 2 ++ drivers/cxl/pci.c | 10 ++++++---- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index d6d067fbee97..4c4e33de4d74 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -1333,6 +1333,8 @@ struct cxl_memdev_state *cxl_memdev_state_create(struct device *dev) mutex_init(&mds->mbox_mutex); mutex_init(&mds->event.log_lock); mds->cxlds.dev = dev; + mds->cxlds.comp_map.dev = dev; + mds->cxlds.comp_map.resource = CXL_RESOURCE_NONE; mds->cxlds.type = CXL_DEVTYPE_CLASSMEM; return mds; diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 79e99c873ca2..607ee34b0ce7 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -382,6 +382,7 @@ enum cxl_devtype { * * @dev: The device associated with this CXL state * @cxlmd: The device representing the CXL.mem capabilities of @dev + * @comp_map: component register capability mappings * @regs: Parsed register blocks * @cxl_dvsec: Offset to the PCIe device DVSEC * @rcd: operating in RCD mode (CXL 3.0 9.11.8 CXL Devices Attached to an RCH) @@ -396,6 +397,7 @@ enum cxl_devtype { struct cxl_dev_state { struct device *dev; struct cxl_memdev *cxlmd; + struct cxl_register_map comp_map; struct cxl_regs regs; int cxl_dvsec; bool rcd; diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 88ddcff8a0b2..f8ad601b314e 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -836,15 +836,17 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) * still be useful for management functions so don't return an error. */ cxlds->component_reg_phys = CXL_RESOURCE_NONE; - rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map); + rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, + &cxlds->comp_map); if (rc) dev_warn(&pdev->dev, "No component registers (%d)\n", rc); - else if (!map.component_map.ras.valid) + else if (!cxlds->comp_map.component_map.ras.valid) dev_dbg(&pdev->dev, "RAS registers not found\n"); - cxlds->component_reg_phys = map.resource; + cxlds->component_reg_phys = cxlds->comp_map.resource; - rc = cxl_map_component_regs(&map, cxlds->dev, &cxlds->regs.component, + rc = cxl_map_component_regs(&cxlds->comp_map, cxlds->dev, + &cxlds->regs.component, BIT(CXL_CM_CAP_CAP_ID_RAS)); if (rc) dev_dbg(&pdev->dev, "Failed to map RAS capability.\n"); From patchwork Thu Aug 31 15:20:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371660 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73114C83F10 for ; Thu, 31 Aug 2023 15:22:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345141AbjHaPWK (ORCPT ); Thu, 31 Aug 2023 11:22:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343815AbjHaPWJ (ORCPT ); Thu, 31 Aug 2023 11:22:09 -0400 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2078.outbound.protection.outlook.com [40.107.244.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55CF9E74; Thu, 31 Aug 2023 08:21:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=eevgLRQQ+Zc0V2UtAwxphkWGdn67hvoYcD03hAjc5sdGKyAkwB7DXywZdoqv00SnwaeOy+4i9kTtSAEBs7JwLbmW5z1jWvE2At1Z87AKWeT4zKCsJkRovelMyS0xvFEQbVwdp6ZJho/iGgzGrJzPbMvQzUVtvpgJrSUtksnVYVli4p02AskOX8Z59JXObt4uHurzw5oiY9Ovrsa7Gf4gX4z6zm6r7ggIuz+SjY4p9wRoDZ6Zep22R5adBeWY8wMdsGFQ/f3zDeBAoFq7BM844TGsCjfruAJwSXwxv9S45aTO8ePMzoeTEc7FGHsFdG/duEgeajw2pQs1bnosjMy45A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ez/GtIEBkZtSlarHIWr7C1gHp8BkLT1hF52qsJuG3DQ=; b=FGozI13qNp377cD8lWdAIBOS5a2T9NTZr2B/l+wsn4N15hSofSlNBWo1X1mTBkb/026+M/waQOr2tASF6zw/ABEQwfZ9Naki+9SKZ3YNhsPD8X/Al4uBo2OlGI83aqQi5rOOPT0M/clvZUmp0O605l0tF+aOAryoG3iW6+Bh19ahYqT0km6GxhCmOR5wL6b2AA6A3M0wFgjIAbZraJfiA1YpxZh+ZTu+hrViPKmFAVnvNaR48WsRqxS2EULoPlsM3DELek7SVCjqWrTdb5I6BDgfIl8mJn+tjzcBYM1Wl7WhT0eaquDOBnRrErIwxJmE0mDi1SlMhFBeIoIviY3yxg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ez/GtIEBkZtSlarHIWr7C1gHp8BkLT1hF52qsJuG3DQ=; b=LZgTh78c9Ehvk8W0a5RBYXinfFXRE5PgnhOml+YkFFvXe8o+eMd61Rzwa0QtrQxs6mGMf0Tx2mnOwM4R93NO16LZ75io4WBB7EUDzszFECHXtx101hSrMNWcvqdZO51rh6kJPIDvbHs/FOc/+/L2X0QXO4p5mw4Oe4Y4teQRY74= Received: from SJ0PR05CA0164.namprd05.prod.outlook.com (2603:10b6:a03:339::19) by PH7PR12MB5736.namprd12.prod.outlook.com (2603:10b6:510:1e3::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22; Thu, 31 Aug 2023 15:21:41 +0000 Received: from MWH0EPF000989E8.namprd02.prod.outlook.com (2603:10b6:a03:339:cafe::b) by SJ0PR05CA0164.outlook.office365.com (2603:10b6:a03:339::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.20 via Frontend Transport; Thu, 31 Aug 2023 15:21:41 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E8.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:21:41 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:21:40 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 04/15] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability Date: Thu, 31 Aug 2023 10:20:20 -0500 Message-ID: <20230831152031.184295-5-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E8:EE_|PH7PR12MB5736:EE_ X-MS-Office365-Filtering-Correlation-Id: e48fbe66-603f-433a-0455-08dbaa35fa92 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: t7SNGLReTDuq9QzDfxd3Ehuyajj6YdI2eCeoJCOY2sQK3iu3NGuHh0BT5s6/7bYtcwhNkrhn1jtMi63Ni5gLrdiZ/GHq7tEWvmdsy3FvIHrGtVMgCqIFGi+PNRHbCHd6WJonyB+n67tbEN9wamuUDV8lA8LFetc76vBYlKqak2dwk6iUQpbMpmw2NiDxGInmugoDfTwfNOOnJl+US0gKBO/I0BPviCQ41zCdB/tbiuDXOZaQxaYh4FhafrNVb8ZYKH81W7MRPDp508FLgtS3ZCrVrd4wzcsUxUpGRXl58sqe4KBE1n0zFIfEUxUyjxHaC97zXDW5qLCn3EnpHWvrp/BZy2eUFTG4HRfsWQNaBYkp4iSkOsn9mQF/+7sviBMUSi8sTPHrDDvGa5w7UWh8gt21NC4FxQ+/QwYesgJnJ0DrW9RanYljvmZ28SQZBlrL8G6Y3viR6IME774kfn6V6HDJJE97f/CtRXuxIf/rMFmV8I0GwIawTWu6kwGkvMCeKAh4CmrdMyvnFDYsJY1klueLN4hVC1mqX25/mCQzlMP5Z52rnbsnJ864cyV4rqWqTugh9esbZQkx385tLQIQ7Mn+XTWJjvLQ6JtCXc3GQnd2BRV5NDoDqzAfjY1cFmgEHndMRvygM57ebzE9WIHP6XB51achD9fetvG6kxHHhkjMOskYJpLBOUNs+T3qrnISN7HzHIumxlkrCtGRgclECFMLGRNXKIL0XCVYu68HS7+gojHwHCrmeFI0U14eesqj2oAp6vXb4aUsbZpWLVytHA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(376002)(346002)(136003)(1800799009)(451199024)(82310400011)(186009)(40470700004)(36840700001)(46966006)(6666004)(2906002)(5660300002)(86362001)(316002)(478600001)(7416002)(2616005)(47076005)(4326008)(8676002)(7696005)(36860700001)(44832011)(8936002)(40460700003)(26005)(1076003)(82740400003)(40480700001)(41300700001)(336012)(426003)(36756003)(356005)(81166007)(83380400001)(70206006)(70586007)(110136005)(54906003)(16526019)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:21:41.5512 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e48fbe66-603f-433a-0455-08dbaa35fa92 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5736 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter Now, that the Component Register mappings are stored, use them to enable and map the HDM decoder capabilities. The Component Registers do not need to be probed again for this, remove probing code. The HDM capability applies to Endpoints, USPs and VH Host Bridges. The Endpoint's component register mappings are located in the cxlds and else in the port's structure. Provide a helper function cxl_port_get_comp_map() to locate the mappings depending on the component's type. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Dave Jiang Signed-off-by: Dan Williams --- drivers/cxl/core/hdm.c | 65 +++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 30 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 17c8ba8c75e0..892a1fb5e4c6 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -81,27 +81,6 @@ static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm) cxlhdm->interleave_mask |= GENMASK(14, 12); } -static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb, - struct cxl_component_regs *regs) -{ - struct cxl_register_map map = { - .dev = &port->dev, - .resource = port->component_reg_phys, - .base = crb, - .max_size = CXL_COMPONENT_REG_BLOCK_SIZE, - }; - - cxl_probe_component_regs(&port->dev, crb, &map.component_map); - if (!map.component_map.hdm_decoder.valid) { - dev_dbg(&port->dev, "HDM decoder registers not implemented\n"); - /* unique error code to indicate no HDM decoder capability */ - return -ENODEV; - } - - return cxl_map_component_regs(&map, &port->dev, regs, - BIT(CXL_CM_CAP_CAP_ID_HDM)); -} - static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) { struct cxl_hdm *cxlhdm; @@ -146,6 +125,22 @@ static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) return true; } +static struct cxl_register_map *cxl_port_get_comp_map(struct cxl_port *port) +{ + /* + * HDM capability applies to Endpoints, USPs and VH Host + * Bridges. The Endpoint's component register mappings are + * located in the cxlds. + */ + if (is_cxl_endpoint(port)) { + struct cxl_memdev *memdev = to_cxl_memdev(port->uport_dev); + + return &memdev->cxlds->comp_map; + } + + return &port->comp_map; +} + /** * devm_cxl_setup_hdm - map HDM decoder component registers * @port: cxl_port to map @@ -156,7 +151,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, { struct device *dev = &port->dev; struct cxl_hdm *cxlhdm; - void __iomem *crb; + struct cxl_register_map *comp_map; int rc; cxlhdm = devm_kzalloc(dev, sizeof(*cxlhdm), GFP_KERNEL); @@ -165,19 +160,29 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, cxlhdm->port = port; dev_set_drvdata(dev, cxlhdm); - crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE); - if (!crb && info && info->mem_enabled) { - cxlhdm->decoder_count = info->ranges; - return cxlhdm; - } else if (!crb) { + comp_map = cxl_port_get_comp_map(port); + + if (comp_map->resource == CXL_RESOURCE_NONE) { + if (info && info->mem_enabled) { + cxlhdm->decoder_count = info->ranges; + return cxlhdm; + } dev_err(dev, "No component registers mapped\n"); return ERR_PTR(-ENXIO); } - rc = map_hdm_decoder_regs(port, crb, &cxlhdm->regs); - iounmap(crb); - if (rc) + if (!comp_map->component_map.hdm_decoder.valid) { + dev_dbg(&port->dev, "HDM decoder registers not implemented\n"); + /* unique error code to indicate no HDM decoder capability */ + return ERR_PTR(-ENODEV); + } + + rc = cxl_map_component_regs(comp_map, dev, &cxlhdm->regs, + BIT(CXL_CM_CAP_CAP_ID_HDM)); + if (rc) { + dev_dbg(dev, "Failed to map HDM capability.\n"); return ERR_PTR(rc); + } parse_hdm_decoder_caps(cxlhdm); if (cxlhdm->decoder_count == 0) { From patchwork Thu Aug 31 15:20:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59935C83F2E for ; Thu, 31 Aug 2023 15:22:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343815AbjHaPWR (ORCPT ); Thu, 31 Aug 2023 11:22:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346541AbjHaPWR (ORCPT ); Thu, 31 Aug 2023 11:22:17 -0400 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2054.outbound.protection.outlook.com [40.107.93.54]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9157110D0; Thu, 31 Aug 2023 08:21:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=U3tMkNjI0IZGZ8xoIPncBtHJKYhR0WgyCfOVHL6IVMBfzdwQ7hQw6J5FxRnqbb/gs2FBt0jDzHL1l8BcXYx74wLaXHtbtTu2Rw7fTIrl5bnY+LtK81zJRFvBAOJRToaMfkOmdM+GiY1cfYL5KiuPffQvWDb4RK/QJMdv8G2l0pRiW3tQxl1LZOD49rzFmQhY+hCCz5449d5i6mO0Pj79I1HH56KNxXaqd7xKX8/W5uTqiiLaI6ICpESL0dvSGbyBDss9+KOwGD0iUt289iABIqrgeiQw2SH+k/am9pfj8hW4QP7nmHUdgiQemdLztHUN9CFnR301cskNcd8soL2hnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=lJgXFYZ9wbemLABODh/lNfldKXu+EY5UKueoeWpDyzg=; b=Y7n2VyHFYYDW05LHuP5ly2ldiVPA65bkm/xtK2+1vdW6Q4AhRIgJ/U/5OPStT9LfwXwGn5eZiYltNEswFQ8rkNCZ3PLW3luhcM5tSUYxUaMjujR3zRUvdpwkJtshJmWoHDg6KhDvSSuU3jLTov0Gh8zyPnbfAcGCCr2WNl1yhzREJf+nayzvgkXYTvOfmm8r+/LLyqCQ9qEokRpARoSQhPZywxqDvh68D7RPz44IySp3SKRZEBKy25iXyx5Uky7HyhGJF43qhQcuwQc4elQ0Ds8q5rlprx+mhPJhPR4jXEqISdELeGLMPvo39QMS9xiWmmHj7F4LA9Ah3nVn6EDpMw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lJgXFYZ9wbemLABODh/lNfldKXu+EY5UKueoeWpDyzg=; b=alQ0qOQzr5U0LEbBUPOsXT0WrnbLGC7TcepXZKMHiaq6Bndl6WhUMzkugEr9pBuQm0p9EG1QGbCextCn2gIEDXbVJ60yY7NtmoZPjwxYXjo4Ey8PHENrgIjBosPxcgMwXikwD4BCcNX0nZGLg+dYj92zyR8rLMbDC+re9zNnJJM= Received: from MW4PR04CA0352.namprd04.prod.outlook.com (2603:10b6:303:8a::27) by DM4PR12MB6109.namprd12.prod.outlook.com (2603:10b6:8:ae::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22; Thu, 31 Aug 2023 15:21:52 +0000 Received: from MWH0EPF000989E5.namprd02.prod.outlook.com (2603:10b6:303:8a:cafe::43) by MW4PR04CA0352.outlook.office365.com (2603:10b6:303:8a::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.21 via Frontend Transport; Thu, 31 Aug 2023 15:21:52 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E5.mail.protection.outlook.com (10.167.241.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.16 via Frontend Transport; Thu, 31 Aug 2023 15:21:52 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:21:51 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 05/15] cxl/pci: Remove Component Register base address from struct cxl_dev_state Date: Thu, 31 Aug 2023 10:20:21 -0500 Message-ID: <20230831152031.184295-6-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E5:EE_|DM4PR12MB6109:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b0fbafb-4fd8-422b-705a-08dbaa36011b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: HRnv7UHe//IKxHTi+EmqhxcjwFa/tYtR6fYEy++r9zW1jy/32sady3aE/gYY2eQF+qJLMRnnyxdmw3eBbKvaiqHFziFS6sFJSO9rSgkYexTJHEqu62csVaywc3+vzpp+66sfC3siX3OiJsftuZCccQVYotLIFgNTto6Opt2Wp+OJ+yAbf1x61bexCRRfEo7uJuXpaxyMQAwraiRi+V5Yzyya8FT6sNKr2ie811qPT3q3vhs06FKn6me2h4jUyVU8RgCm5tZanySvGrepJ1LXP3XFl30U7YiRpP4yxaXbvWekw2lB/iOKwVEzQ9GpbidNQPZszzDY+p7vllNuvo1oYchCzdIKzO6GF8Cr0nIQnWj0G7OyweSelwN8GRnjlnV5VuD+YVFIx5pFpooUxAsPzgfoG20vUhMlZJi5Zpcxr5hp9WDmSD5Tbqkln0gl55eHEfEXa/q9dJcrAVoGp/JnNAKoOXTNlfErnsUXZmslOV1HJR7gR2C1mdb2WGdZelzByl7jqEWx0v+dR6vf28MOQSj8pNP8AcitKz8t90Vzr8kcNEgDARd0qv2V56+3tuKJAM43DvgbKYe81o0HPT8xaw3MtyRbF2sLhg4PWS8AFwpPUy4O2qU56W9kBzNeQZCEv5Lko4Bmw6e4P15tyKeAmIJ+NFYLWgeNfBgT2qWA7zsy7QB4BoAnsppa9pzGx9bdmRUyUFTB+B+yLIeKERqrOc8gYc+FXyiNDIuYocGiEGBrTWUl//O9+2DMDRc7iZW2JMqCpAZCvGlCf6rTaoBSFA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(136003)(396003)(346002)(39860400002)(451199024)(82310400011)(1800799009)(186009)(46966006)(40470700004)(36840700001)(356005)(82740400003)(110136005)(54906003)(70586007)(70206006)(7416002)(426003)(6666004)(336012)(1076003)(81166007)(83380400001)(316002)(86362001)(7696005)(2616005)(2906002)(41300700001)(478600001)(4326008)(36756003)(8936002)(8676002)(47076005)(44832011)(16526019)(26005)(36860700001)(40460700003)(5660300002)(40480700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:21:52.5026 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b0fbafb-4fd8-422b-705a-08dbaa36011b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6109 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter The Component Register base address @component_reg_phys is no longer used after the rework of the Component Register setup which now uses struct member @comp_map instead. Remove the base address. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang --- drivers/cxl/cxlmem.h | 2 -- drivers/cxl/mem.c | 4 ++-- drivers/cxl/pci.c | 3 --- tools/testing/cxl/test/mem.c | 1 - 4 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 607ee34b0ce7..fdfa6e5dd739 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -390,7 +390,6 @@ enum cxl_devtype { * @dpa_res: Overall DPA resource tree for the device * @pmem_res: Active Persistent memory capacity configuration * @ram_res: Active Volatile memory capacity configuration - * @component_reg_phys: register base of component registers * @serial: PCIe Device Serial Number * @type: Generic Memory Class device or Vendor Specific Memory device */ @@ -405,7 +404,6 @@ struct cxl_dev_state { struct resource dpa_res; struct resource pmem_res; struct resource ram_res; - resource_size_t component_reg_phys; u64 serial; enum cxl_devtype type; }; diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 317c7548e4e9..3af3218ebe0e 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -49,7 +49,6 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, struct cxl_dport *parent_dport) { struct cxl_port *parent_port = parent_dport->port; - struct cxl_dev_state *cxlds = cxlmd->cxlds; struct cxl_port *endpoint, *iter, *down; int rc; @@ -65,8 +64,9 @@ static int devm_cxl_add_endpoint(struct device *host, struct cxl_memdev *cxlmd, ep->next = down; } + /* The Endpoint's component regs are located in cxlds. */ endpoint = devm_cxl_add_port(host, &cxlmd->dev, - cxlds->component_reg_phys, + CXL_RESOURCE_NONE, parent_dport); if (IS_ERR(endpoint)) return PTR_ERR(endpoint); diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index f8ad601b314e..b71f1c7d16ce 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -835,7 +835,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) * If the component registers can't be found, the cxl_pci driver may * still be useful for management functions so don't return an error. */ - cxlds->component_reg_phys = CXL_RESOURCE_NONE; rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &cxlds->comp_map); if (rc) @@ -843,8 +842,6 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) else if (!cxlds->comp_map.component_map.ras.valid) dev_dbg(&pdev->dev, "RAS registers not found\n"); - cxlds->component_reg_phys = cxlds->comp_map.resource; - rc = cxl_map_component_regs(&cxlds->comp_map, cxlds->dev, &cxlds->regs.component, BIT(CXL_CM_CAP_CAP_ID_RAS)); diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 464fc39ed277..aa44d111fd28 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -1423,7 +1423,6 @@ static int cxl_mock_mem_probe(struct platform_device *pdev) cxlds->serial = pdev->id; if (is_rcd(pdev)) { cxlds->rcd = true; - cxlds->component_reg_phys = CXL_RESOURCE_NONE; } rc = cxl_enumerate_cmds(mds); From patchwork Thu Aug 31 15:20:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6606FC83F10 for ; Thu, 31 Aug 2023 15:22:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346563AbjHaPWk (ORCPT ); Thu, 31 Aug 2023 11:22:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346541AbjHaPWf (ORCPT ); Thu, 31 Aug 2023 11:22:35 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2080.outbound.protection.outlook.com [40.107.220.80]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8286CE79; Thu, 31 Aug 2023 08:22:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nxwY8Z4SPoBvgKg1LNqJUW1d12DHoq0n1Nr4HMZUzLo8aTmnsrfJpivGxpanVY7EN5kDGzywocUaMPlbyUkg4FcjyF+DPfvp6aHIVsis3ugOBihgJu5/JBM/jo0w5CzUf87fboKM+GtE4peP3ekiT9C0sJvHEP1KD4Aah3byqDMEeZWeHHfsr8qpjq5U8/xblKXcdTbP0AutpfCCO1I5iSW1TecqjEV7/tP19SOSFW0P6mQtuRFTWHaiqaFJN26lkgWYA+w4BCUalUoFqgxeucwPdoHpD3+opYvIG1EI3S2WJ8AChluZq3jS6iY9T/7j9X5QgvEtmNcEbmtbHeKlDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=4QcZ53O3679akSY/4aegxTJ4ylAgFghUHLuI0medMLA=; b=hvQ2Q445WYkDbRnr+0bH8br9/4FYnlyg6h/GvFrjE47jhOAN/MISJoGoBSw+LRC2AJ3zAN6yNku46WvDonDVQYcDbvdgnYPu3Fpl5wPEcj7vOTFm+N/myKgxfNY7VSybMaNrlDFIhMUtnQOLDbOi7nO4XWrSpNKPjuARYBSImk3r0GMERrvdU40eTJ7sY7WAq9gEg3mXaMR5AAy9HjM+bYqmxgL0uqAunWMICfPWadVBpi+WZ4R3VaZfysQA24fL90xoEKd8oBWgIh/xgSlDpUv/ZEre/K0nRT0e8ngWEOF64ULzMMnnPra4heueiPSzLALrRpp65QI8H6oZ9Qr8fA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4QcZ53O3679akSY/4aegxTJ4ylAgFghUHLuI0medMLA=; b=Buw7gO0bZJf6zuoUo8cljudLf53B4kPcsXVMAa+zbypabTQDH0Q/eaU0ZPLlifDGXGFv+3EsIievWeLFSwp2weKygQ+DubjenET7dhdD7JTzwZWw/LFQ2vIvvgI+HGH0v405RG/GUHulF/Wm2SgmgPZhzZybPOTuJzYwo9YrnLo= Received: from MW2PR16CA0033.namprd16.prod.outlook.com (2603:10b6:907::46) by PH7PR12MB7186.namprd12.prod.outlook.com (2603:10b6:510:202::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22; Thu, 31 Aug 2023 15:22:04 +0000 Received: from MWH0EPF000989E9.namprd02.prod.outlook.com (2603:10b6:907:0:cafe::b3) by MW2PR16CA0033.outlook.office365.com (2603:10b6:907::46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.21 via Frontend Transport; Thu, 31 Aug 2023 15:22:03 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989E9.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:22:03 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:22:02 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 06/15] cxl/port: Remove Component Register base address from struct cxl_port Date: Thu, 31 Aug 2023 10:20:22 -0500 Message-ID: <20230831152031.184295-7-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E9:EE_|PH7PR12MB7186:EE_ X-MS-Office365-Filtering-Correlation-Id: 019c68a5-45a3-4c9c-54c7-08dbaa3607b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PmN/+ZEyH0SqSfGH65qEs3sT/tXzC+xm6BlqlBIBLt8pYqfTEPBxc2kV21HjVPNTIxGM4gwwFK+J+Vbe8PC/YKRQ7ulpCyzB0Zg9ThmJrjVlwfaU0cmL20tOMEPXX9+aGY1a2faZlmy97PjTtcaNjo6Xb+LUFF8YZNsuBPBNE7UVmlFrkfjKZy+bLKQxKt4ni5Bly4WSpD7Yc+9v+dPPCuu0Cx31syD4C5TmMjS52EjKYopZvwIJc6sOP1TwX8Qb/1dRUXpFtGO/93OlNtPz4Pg8F+9j2aedc59UI6mDjR3u4h3mwnz3NKnca4KF1pSAihmuALXUJTnyYa2EHHSUgdvUS21TZ3eZXFL0wfWa9H6ysbMyYt0sXPA1YY3GO2g/pFqKaG2fah4mDLsks9mADYQkC6qJ6JX24BqS/HYEqeZWkqU/5BOzi5Gzg+2P5Oh/bwBT5hup9OE/KRXYdyyeoVUu7ayrpxWh35fOKs+FckZ/BepD6d1Y4pUf5Pm3UGdvobWaCcLpaXWA/uAvKim4751tF5XZQUklcsRI+1Hay+zdyXziGL6MJlOczmDC//2kSoTKRTNupd2EqTYuCpqtUzybMhn1msgS0ebKvg2nzGUoTQijbGtL2B9QkRDFgmGiiGMij6X75wJQDVhk6P9ZFPMt/GvAuv9OojsSGBQ2Ir8ZVjD/ByZuc3uhseL8EUXbftl2rDmhmqP8/G+8glubs9hGtZ23/nuUectdxNaMXn/cUIw4Ga59vFvyr+0/vFn4hc5XYSSztoKFLma17wxaQQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(376002)(39860400002)(346002)(396003)(451199024)(82310400011)(1800799009)(186009)(46966006)(36840700001)(40470700004)(356005)(82740400003)(110136005)(54906003)(70586007)(70206006)(7416002)(426003)(6666004)(336012)(1076003)(83380400001)(81166007)(316002)(86362001)(7696005)(2616005)(2906002)(41300700001)(478600001)(4326008)(36756003)(8936002)(8676002)(47076005)(44832011)(16526019)(26005)(36860700001)(40460700003)(5660300002)(40480700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:22:03.5865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 019c68a5-45a3-4c9c-54c7-08dbaa3607b4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7186 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Robert Richter The Component Register base address @component_reg_phys is no longer used after the rework of the Component Register setup which now uses struct member @comp_map instead. Remove the base address. Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang --- drivers/cxl/core/port.c | 4 +--- drivers/cxl/cxl.h | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 6c06c36f8c7b..9151ec5b879b 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -618,7 +618,6 @@ static int devm_cxl_link_parent_dport(struct device *host, static struct lock_class_key cxl_port_key; static struct cxl_port *cxl_port_alloc(struct device *uport_dev, - resource_size_t component_reg_phys, struct cxl_dport *parent_dport) { struct cxl_port *port; @@ -669,7 +668,6 @@ static struct cxl_port *cxl_port_alloc(struct device *uport_dev, } else dev->parent = uport_dev; - port->component_reg_phys = component_reg_phys; ida_init(&port->decoder_ida); port->hdm_end = -1; port->commit_end = -1; @@ -731,7 +729,7 @@ static struct cxl_port *__devm_cxl_add_port(struct device *host, struct device *dev; int rc; - port = cxl_port_alloc(uport_dev, component_reg_phys, parent_dport); + port = cxl_port_alloc(uport_dev, parent_dport); if (IS_ERR(port)) return port; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index ec8ba9ebcf64..b4383697180f 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -578,7 +578,6 @@ struct cxl_dax_region { * @nr_dports: number of entries in @dports * @hdm_end: track last allocated HDM decoder instance for allocation ordering * @commit_end: cursor to track highest committed decoder for commit ordering - * @component_reg_phys: component register capability base address (optional) * @dead: last ep has been removed, force port re-creation * @depth: How deep this port is relative to the root. depth 0 is the root. * @cdat: Cached CDAT data @@ -598,7 +597,6 @@ struct cxl_port { int nr_dports; int hdm_end; int commit_end; - resource_size_t component_reg_phys; bool dead; unsigned int depth; struct cxl_cdat { From patchwork Thu Aug 31 15:20:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 13371663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6602C83F10 for ; Thu, 31 Aug 2023 15:22:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346574AbjHaPWw (ORCPT ); Thu, 31 Aug 2023 11:22:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233884AbjHaPWs (ORCPT ); Thu, 31 Aug 2023 11:22:48 -0400 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2053.outbound.protection.outlook.com [40.107.93.53]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4646F10D5; Thu, 31 Aug 2023 08:22:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=SAhsC5I1V1qYFQKBh7Em/kZYVOfqVJSHWUd3rnCSfTA2PxsDT/tX0Yy8uU/leJ0W/xev+0oBP1Tmp6yFysS03JXp2bFzR4GPSpxFeFKX+c4XZ0bmECKJdOcagBEvjJOjdIxDXVDLUHcvW/+0J21DXcEcnqwgsyET3STeN26yKnfzLZDnvzURpVgy/K/Y3K1Xe6mFdd0dOyi6J6pNPxV5SUDM53lL47bGj07sGgMPa8SZR8chL8sPGukBy98I3oM4pv9jtlkTOQnuY+R0LM091dsBy/VG05g0XsXMK9jcGi6Vv6O0bjxpBavEG2L//e8rIbn92ISRfhQKpkh6UBnLiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RjhxeWmooZgDt0YNaed47YGpM5qYtRJmnSjV1avFr5E=; b=MXleGspxDpAfc4WWW52424zc+r2y8lZRrX9M3EISbkR7J35gUPo8xRaiVMe7Dt0W0yUCv1Kyk4eqvFp3Z6fnUKaW7iZ3goWOM0TNiKZXnk4FdZE4ToPI/WNSiZC0R2aaBQOA/wYzqcsOpSKQ0u3u2qjIwHRFZ5I9PrBwP86c2bJpjY7gv2r4iiXgUrhlj636oR86zvuIMyCOo7bWi5lK8Plq6uF5FuJ5SZqLRrlDgw5KFEAKMldnZurJu9uerjIEVcVlQ8IUonUaTj8CT4mF1+aWGrGwLJybnCj1joyAsXS7cvI6FETFQZTc4v08z0HoL3AWc4QyGz4sYTvUAHujdA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RjhxeWmooZgDt0YNaed47YGpM5qYtRJmnSjV1avFr5E=; b=kf7WFxzYyQL9qteCIVt5l101iSIaVpn8ECpT6LNRoPezWyUp9vJlWhZFXgcWqlzOxJZfuJU5HMjR4Ljh0F+vZpbc1xLZRU4HwsnHLLbpFTa+r3tqMZ9rK29fGXGmPFPwmwQq9/IF5C1GKbNZfV/gxi3DoiBsAXB2349MmAOWiZw= Received: from MW4PR04CA0050.namprd04.prod.outlook.com (2603:10b6:303:6a::25) by DS7PR12MB5933.namprd12.prod.outlook.com (2603:10b6:8:7c::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22; Thu, 31 Aug 2023 15:22:15 +0000 Received: from MWH0EPF000989EA.namprd02.prod.outlook.com (2603:10b6:303:6a:cafe::3d) by MW4PR04CA0050.outlook.office365.com (2603:10b6:303:6a::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6745.22 via Frontend Transport; Thu, 31 Aug 2023 15:22:14 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989EA.mail.protection.outlook.com (10.167.241.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6745.17 via Frontend Transport; Thu, 31 Aug 2023 15:22:14 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 31 Aug 2023 10:22:13 -0500 From: Terry Bowman To: , , , , , , , CC: , , , Subject: [PATCH v10 07/15] cxl/pci: Add RCH downstream port AER register discovery Date: Thu, 31 Aug 2023 10:20:23 -0500 Message-ID: <20230831152031.184295-8-terry.bowman@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230831152031.184295-1-terry.bowman@amd.com> References: <20230831152031.184295-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EA:EE_|DS7PR12MB5933:EE_ X-MS-Office365-Filtering-Correlation-Id: 797607b8-caba-4ebd-7567-08dbaa360e57 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Q1WjPdnbUNtUanD4u7Okwqah+hPWOdpmX0SkQJtwAo7QFv9+V1jpKVDBFqINtZ6q3iP2lOU7ziDGQDJtkcA1ZBQfN7BCxq+Mf/So3Y6JoBzkBGYipZL/wE+FnwMlHKbz7jAxyanT8vIt4eg4FCId5JftPvUpqO+VtcHlQLdifgteR8iAgfKDyvGHMQNsK0qTSLaLSENcjS4R+uXtFUSpYRk1rtELy29uGKvm+fL9XaGWhdW0D08WEFQWgFMO29ttu8Sz0Ualj/ky4LUsZ9BnnaOlj6LlL6CyArMraEjhQ4f0YEYyQObbfevY7gT6nTM4mFKHS2QSuzv6XqwWR0cwEJCZcD2bxxRE5mc1O2K/v7cpvF/8Lqp2lr+pjYah7TTgbNpmzL1WKUrii/p1FGH29WK5wNRxJ06uIkWlzyAG/cK54BUH6ur3YJA9q+fIrJJs02Kf5GUcIG/qDyeRrD4l3DVGvqulhi4REE4aSy7tI5KfH5dvqq9dNvewrBDh0Z5ISIYLsFowlq8bbnYUBlDSoYo+P6p3RnjDsy3+tpLXZKq/H83wTL5xp5t9Zlech8nMq8Q3Aadee5/+W4/+qnOzLIz1B9l4k+v6HCYOVA//fzTXxivTLD/EnWlBYZdaD1C1KoNAXFm7jK9RQSryg8PephaSvBIn32H8h2Ti5cNqbbu319p9yzh1lXhSpWYE5DeCvobLH5TeEtFrHNA3XqDoApt8gFLB+Skzn+SJkw3zxE7Oa8KaBMKi4/5mhERfxAN03v4p6mbJW2ypfiF5B8HEHw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(376002)(136003)(396003)(39860400002)(82310400011)(186009)(1800799009)(451199024)(36840700001)(40470700004)(46966006)(40480700001)(82740400003)(36756003)(41300700001)(336012)(426003)(1076003)(26005)(40460700003)(16526019)(356005)(110136005)(70586007)(70206006)(83380400001)(81166007)(54906003)(316002)(478600001)(6666004)(2906002)(5660300002)(86362001)(44832011)(8936002)(2616005)(7416002)(36860700001)(7696005)(8676002)(4326008)(47076005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 15:22:14.7063 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 797607b8-caba-4ebd-7567-08dbaa360e57 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5933 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Restricted CXL host (RCH) downstream port AER information is not currently logged while in the error state. One problem preventing the error logging is the AER and RAS registers are not accessible. The CXL driver requires changes to find RCH downstream port AER and RAS registers for purpose of error logging. RCH downstream ports are not enumerated during a PCI bus scan and are instead discovered using system firmware, ACPI in this case.[1] The downstream port is implemented as a Root Complex Register Block (RCRB). The RCRB is a 4k memory block containing PCIe registers based on the PCIe root port.[2] The RCRB includes AER extended capability registers used for reporting errors. Note, the RCH's AER Capability is located in the RCRB memory space instead of PCI configuration space, thus its register access is different. Existing kernel PCIe AER functions can not be used to manage the downstream port AER capabilities and RAS registers because the port was not enumerated during PCI scan and the registers are not PCI config accessible. Discover RCH downstream port AER extended capability registers. Use MMIO accesses to search for extended AER capability in RCRB register space. [1] CXL 3.0 Spec, 9.11.2 - System Firmware View of CXL 1.1 Hierarchy [2] CXL 3.0 Spec, 8.2.1.1 - RCH Downstream Port RCRB Co-developed-by: Robert Richter Signed-off-by: Robert Richter Signed-off-by: Terry Bowman Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang --- drivers/cxl/core/core.h | 1 + drivers/cxl/core/port.c | 6 ++++++ drivers/cxl/core/regs.c | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 45e7e044cf4a..f470ef5c0a6a 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -73,6 +73,7 @@ struct cxl_rcrb_info; resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri, enum cxl_rcrb which); +u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb); extern struct rw_semaphore cxl_dpa_rwsem; diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 9151ec5b879b..da4f1b303d6c 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -979,6 +979,8 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, return ERR_PTR(-ENOMEM); if (rcrb != CXL_RESOURCE_NONE) { + struct pci_host_bridge *host_bridge; + dport->rcrb.base = rcrb; component_reg_phys = __rcrb_to_component(dport_dev, &dport->rcrb, CXL_RCRB_DOWNSTREAM); @@ -987,6 +989,10 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev, return ERR_PTR(-ENXIO); } + host_bridge = to_pci_host_bridge(dport_dev); + if (host_bridge->native_cxl_error) + dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base); + dport->rch = true; } diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c index dfc3e272e7d8..c8562cdbd17b 100644 --- a/drivers/cxl/core/regs.c +++ b/drivers/cxl/core/regs.c @@ -470,6 +470,41 @@ int cxl_setup_regs(struct cxl_register_map *map) } EXPORT_SYMBOL_NS_GPL(cxl_setup_regs, CXL); +u16 cxl_rcrb_to_aer(struct device *dev, resource_size_t rcrb) +{ + void __iomem *addr; + u16 offset = 0; + u32 cap_hdr; + + if (WARN_ON_ONCE(rcrb == CXL_RESOURCE_NONE)) + return 0; + + if (!request_mem_region(rcrb, SZ_4K, dev_name(dev))) + return 0; + + addr = ioremap(rcrb, SZ_4K); + if (!addr) { + release_mem_region(rcrb, SZ_4K); + return 0; + } + + cap_hdr = readl(addr + offset); + while (PCI_EXT_CAP_ID(cap_hdr) != PCI_EXT_CAP_ID_ERR) { + offset = PCI_EXT_CAP_NEXT(cap_hdr); + if (!offset) + break; + cap_hdr = readl(addr + offset); + } + + if (offset) + dev_dbg(dev, "found AER extended capability (0x%x)\n", offset); + + iounmap(addr); + release_mem_region(rcrb, SZ_4K); + + return offset; +} + resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri, enum cxl_rcrb which) {