From patchwork Tue Sep 5 10:08:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dharma Balasubiramani X-Patchwork-Id: 13374410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7CE2C83F3E for ; Tue, 5 Sep 2023 10:09:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=mj3zSeowH0Ut3lw6eXF3fOPKeEBqB3mK++AF0cBnzJI=; b=ncKdZHEz+TClLH M6O513FD9yV/xJ1e6cQnGINpx6PbcfIl4RUpn7F3J3E44fLfjCvvkIFzaysBAmmIcG5OMg4kivpyY ovRWlEOpzBp4ft0eTsVhF8mOby+kImKWbacTkvxrh+wzoj3lDAAnzuYwSBqrl71Zr+dQUR7pkpKeO oHnLmgQLLmu0Op/uz8UCiLSRQtwU5+zP0RbIyesotW2DzH/Pc9VV7hXHaArHBObxjXV7J8NIC+LQ2 ExQXRolgEkENhgyCfI5n2SXe2E6jQEswfrsf9n9M0Ysg4kE4yZR6ClucUAM4T0wYXBWoItGffVYlY KuKYlok2Yu0ajOsHRyuA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdSzX-005fhf-0q; Tue, 05 Sep 2023 10:09:03 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdSzT-005fgy-35 for linux-arm-kernel@lists.infradead.org; Tue, 05 Sep 2023 10:09:01 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1693908539; x=1725444539; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=+8MX5ACtp0E3yDFO037e/NmBawdAVmspJKr7wW6W9gE=; b=gqWbhrToHr+wUwszC+nz60vNsn4bDPsJSUnBWJS+CG1BSMDwg3L8bME6 lOCBi2pDANYE7fSJer/aYd7/nu3hQ1V9wJa+BLULqyVFlOhrbeB9vtIB9 lM+Uf4VoETeKpcK9ePF6198EnvuhawPqeeJyor5ojW+2ts4rn7mcLZ6xG Nnd/DtjJX5we/u4UZvxiZKf39iQNpv9Uq6bhICjTr9jmRSYx7PR5qFaHN mB1LnTdf0VzQ3ZuUlp+TdkG119WnF3Vch2kRR9jIMuHmO2j8ibyxu6/o5 zdBIoJjbWzMvVdE/d2OwNvoPEkYSZLSfZylhTbh5IBaNjZOeuzERR/Zsl g==; X-IronPort-AV: E=Sophos;i="6.02,229,1688454000"; d="scan'208";a="2881960" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Sep 2023 03:08:43 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 5 Sep 2023 03:08:43 -0700 Received: from che-lt-i70843lx.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 5 Sep 2023 03:08:40 -0700 From: Dharma Balasubiramani To: , , , , Subject: [linux][PATCH] counter: microchip-tcb-capture: Fix the use of internal GCLK logic Date: Tue, 5 Sep 2023 15:38:35 +0530 Message-ID: <20230905100835.315024-1-dharma.b@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230905_030900_131609_5BDDF2EE X-CRM114-Status: GOOD ( 10.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hari.prasathge@microchip.com, balamanikandan.gunasundar@microchip.com, Dharma Balasubiramani Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As per the datasheet, the clock selection Bits 2:0 – TCCLKS[2:0] should be set to 0 while using the internal GCLK (TIMER_CLOCK1). Fixes: 106b104137fd ("counter: Add microchip TCB capture counter") Signed-off-by: Dharma Balasubiramani --- drivers/counter/microchip-tcb-capture.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index e2d1dc6ca668..c7af13aca36c 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -98,7 +98,7 @@ static int mchp_tc_count_function_write(struct counter_device *counter, priv->qdec_mode = 0; /* Set highest rate based on whether soc has gclk or not */ bmr &= ~(ATMEL_TC_QDEN | ATMEL_TC_POSEN); - if (priv->tc_cfg->has_gclk) + if (!priv->tc_cfg->has_gclk) cmr |= ATMEL_TC_TIMER_CLOCK2; else cmr |= ATMEL_TC_TIMER_CLOCK1;