From patchwork Wed Sep 6 07:58:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13375351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BA18EB8FB5 for ; Wed, 6 Sep 2023 07:58:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Wed, 06 Sep 2023 00:58:25 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z10-20020a2e7e0a000000b002b9ec22d9fasm3268324ljc.29.2023.09.06.00.58.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 00:58:25 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Abel Vesa , stable@vger.kernel.org Subject: [PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming Date: Wed, 6 Sep 2023 10:58:20 +0300 Message-Id: <20230906075823.7957-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> References: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_005831_437115_74BDAD87 X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the offset of this register to point to 0x00, as expected. Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550") Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets") Cc: Abel Vesa Cc: stable@vger.kernel.org Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 +- drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index cbb28afce135..41b9be56eead 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = { QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b), QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), }; static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = { @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = { QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07), QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40), QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), }; static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = { diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index 9510e63ba9d8..5409ddcd3eb5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -12,7 +12,6 @@ #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90 #define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188 #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 @@ -23,6 +22,7 @@ #define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc #define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 From patchwork Wed Sep 6 07:58:21 2023 Content-Type: text/plain; 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Wed, 06 Sep 2023 00:58:26 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z10-20020a2e7e0a000000b002b9ec22d9fasm3268324ljc.29.2023.09.06.00.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 00:58:25 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Abel Vesa Subject: [PATCH 2/4] phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers Date: Wed, 6 Sep 2023 10:58:21 +0300 Message-Id: <20230906075823.7957-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> References: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_005831_435709_CBAE7197 X-CRM114-Status: GOOD ( 10.49 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org For all other generations, we have been using just the QPHY prefix for the PCS registers. Remove the _USB part of the QPHY_USB prefix. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 38 +++++++++---------- .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 38 +++++++++---------- 2 files changed, 38 insertions(+), 38 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index 41b9be56eead..bff6231d7de3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -845,28 +845,28 @@ static const struct qmp_phy_init_tbl sm8550_usb3_rx_tbl[] = { }; static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = { - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10), }; static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = { - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), - QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68), }; static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = { diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index 5409ddcd3eb5..4fbef4eea7b5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -7,25 +7,25 @@ #define QCOM_PHY_QMP_PCS_USB_V6_H_ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc -#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 -#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc -#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188 -#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 -#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 -#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0 -#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 -#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 -#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 -#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc -#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 +#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 -#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 -#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c -#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 -#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44 +#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 +#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 +#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c +#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 +#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44 #endif From patchwork Wed Sep 6 07:58:22 2023 Content-Type: text/plain; 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Wed, 06 Sep 2023 00:58:27 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z10-20020a2e7e0a000000b002b9ec22d9fasm3268324ljc.29.2023.09.06.00.58.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 00:58:26 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Abel Vesa Subject: [PATCH 3/4] phy: qcom-qmp-usb: move PCS v6 register to the proper header Date: Wed, 6 Sep 2023 10:58:22 +0300 Message-Id: <20230906075823.7957-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> References: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_005829_500562_87D3AAD5 X-CRM114-Status: UNSURE ( 8.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The commit 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets") incorrectly added plain PCS registers to the PCS_USB header. Move them to a proper location. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 15 --------------- drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 15 +++++++++++++-- 2 files changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index 4fbef4eea7b5..7c16af0b1cc3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -7,21 +7,6 @@ #define QCOM_PHY_QMP_PCS_USB_V6_H_ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4 -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8 -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc -#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8 -#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc -#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 -#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 -#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 -#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 -#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 -#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 -#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 -#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc -#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec - #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h index 18c4a3abe590..c95d3fabd108 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -7,10 +7,21 @@ #define QCOM_PHY_QMP_PCS_V6_H_ /* Only for QMP V6 PHY - USB/PCIe PCS registers */ -#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8 +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc #define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 #define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 -#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 #define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec #endif From patchwork Wed Sep 6 07:58:23 2023 Content-Type: text/plain; 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Wed, 06 Sep 2023 00:58:27 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z10-20020a2e7e0a000000b002b9ec22d9fasm3268324ljc.29.2023.09.06.00.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 00:58:27 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, Abel Vesa Subject: [PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout Date: Wed, 6 Sep 2023 10:58:23 +0300 Message-Id: <20230906075823.7957-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> References: <20230906075823.7957-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_085831_592923_CC2EFAF3 X-CRM114-Status: GOOD ( 11.33 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 12 ++++++------ drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 ++ drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 4 ++++ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c index bff6231d7de3..9c71a132afea 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { }; static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { - [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET, - [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL, - [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1, - [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL, + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET, + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL, + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL, /* In PCS_USB */ - [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL, - [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h index 7c16af0b1cc3..0d0089898240 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h @@ -8,6 +8,8 @@ /* Only for QMP V6 PHY - USB3 have different offsets than V5 */ #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00 +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08 +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14 #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18 #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40 diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h index c95d3fabd108..496c36522e55 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -7,6 +7,10 @@ #define QCOM_PHY_QMP_PCS_V6_H_ /* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_SW_RESET 0x000 +#define QPHY_V6_PCS_PCS_STATUS1 0x014 +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040 +#define QPHY_V6_PCS_START_CONTROL 0x044 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8 #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc