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([2804:14c:485:4b61:2ec0:fcea:f38:ada4]) by smtp.gmail.com with ESMTPSA id z6-20020a9d7a46000000b006b9443ce478sm284191otm.27.2023.09.07.18.27.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 18:27:50 -0700 (PDT) From: Fabio Estevam To: shawnguo@kernel.org Cc: linux-arm-kernel@lists.infradead.org, Fabio Estevam Subject: [PATCH] arm64: dts: imx8mq-nitrogen: Fix PCA9546 I2C subnodes Date: Thu, 7 Sep 2023 22:27:39 -0300 Message-Id: <20230908012739.598908-1-festevam@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230907_182756_330713_CF107AE5 X-CRM114-Status: GOOD ( 10.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Fabio Estevam Per i2c-mux-pca954x.yaml, the PCA9546 I2C subnodes should be in the 'i2c@' format. Change it accordingly to fix the following schema warning: imx8mm-nitrogen-r2.dtb: i2c-mux@70: Unevaluated properties are not allowed ('i2c3@0' was unexpected) Signed-off-by: Fabio Estevam --- arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts index 8614c18b5998..767819cce886 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts @@ -142,7 +142,7 @@ i2c-mux@70 { #address-cells = <1>; #size-cells = <0>; - i2c1a: i2c1@0 { + i2c1a: i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; @@ -159,7 +159,7 @@ reg_arm_dram: regulator@60 { }; }; - i2c1b: i2c1@1 { + i2c1b: i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; @@ -176,7 +176,7 @@ reg_dram_1p1v: regulator@60 { }; }; - i2c1c: i2c1@2 { + i2c1c: i2c@2 { reg = <2>; #address-cells = <1>; #size-cells = <0>; @@ -193,7 +193,7 @@ reg_soc_gpu_vpu: regulator@60 { }; }; - i2c1d: i2c1@3 { + i2c1d: i2c@3 { reg = <3>; #address-cells = <1>; #size-cells = <0>; @@ -222,7 +222,7 @@ pca9546: i2c-mux@70 { #address-cells = <1>; #size-cells = <0>; - i2c4@0 { + i2c@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; @@ -257,14 +257,14 @@ lt8912_out: endpoint { }; }; - ddc_i2c_bus: i2c4@1 { + ddc_i2c_bus: i2c@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; clock-frequency = <100000>; }; - i2c4@3 { + i2c@3 { reg = <3>; #address-cells = <1>; #size-cells = <0>;